PRODUCTION METHOD FOR COPPER/CERAMIC JOINED BODY, PRODUCTION METHOD FOR INSULATED CIRCUIT BOARD, COPPER/CERAMIC JOINED BODY, AND INSULATED CIRCUIT BOARD

Abstract

A method of producing a copper/ceramic bonded body, the copper member having a composition having a Cu purity of 99.96 mass % or more, a balance of inevitable impurities, a P content of 2 mass ppm or less, and a total content of Pb, Se and Te of 10 mass ppm or less, the method includes bonding the laminated copper member and the ceramic member by pressing and heating, wherein an average crystal grain size of the copper member before bonding is 10 μm or more, an aspect ratio is 2 or less, and a pressing load is 0.05 MPa or more and 1.5 MPa or less, a heating temperature is 800° C. or higher and 850° C. or lower, and a holding time at the heating temperature is 10 minutes or longer and 90 minutes or shorter.

Claims

1. A method of producing a copper/ceramic bonded body with a copper member and a ceramic member bonded each other, the copper member having a composition having a Cu purity of 99.96 mass % or more, a balance of inevitable impurities, a P content of 2 mass ppm or less, and a total content of Pb, Se and Te of 10 mass ppm or less, the method comprises: a bonding step of bonding the copper member and the ceramic member laminated to each other by pressing the laminated copper member and ceramic member in a laminating direction and heating, wherein an average crystal grain size of the copper member before bonding is set to 10 μm or more, an aspect ratio, which means a ratio of a major axis to a minor axis of a crystal grain on a rolled surface, is set to 2 or less, and in the bonding step, a pressing load in the laminating direction is set to be in a range of 0.05 MPa or more and 1.5 MPa or less, a heating temperature is set to be in a range of 800° C. or higher and 850° C. or lower, and a holding time at the heating temperature is set to be in a range of 10 minutes or longer and 90 minutes or shorter.

2. The method of producing a copper/ceramic bonded body according to claim 1, wherein an aspect ratio R0 of the crystal grain on the rolled surface of the copper member before the bonding, an aspect ratio R1 of the crystal grain on the rolled surface of the copper member after the bonding, and an average crystal grain size D1 on the rolled surface of the copper member after the bonding satisfy the following relational expression RD,
Relational expression RD=D1×(R1/R0)<500.

3. The method of producing a copper/ceramic bonded body according to claim 1, wherein a S content in the copper member is set to be in a range of 2 mass ppm or more and 20 mass ppm or less.

4. . The method of producing a copper/ceramic bonded body according to claim 1, wherein a total content of Mg, Sr, Ba, Ti, Zr, Hf, and Y in the copper member is 10 mass ppm or less.

5. A method of producing an insulating circuit board with a ceramic substrate and a copper plate bonded to a surface of the ceramics substrate, the method comprising the step of bonding the ceramic substrate as the ceramic member and the copper plate as the copper member to each other by the method of producing a copper/ceramic bonded body according to claim 1.

6. A copper/ceramic bonded body comprising a copper member and a ceramic member bonded to each other, wherein the copper member has a composition having a Cu purity of 99.96 mass % or more, a balance of inevitable impurities, a P content of 2 mass ppm or less, and a total content of Pb, Se and Te of 10 mass ppm or less, in a cross section of the copper member, a maximum area ratio is set to 45% or less when a crystal orientation map of copper obtained by EBSD is trisected into (001) planes, (111) planes, and (101) planes, and a grain boundary length in a field of view of 1 mm.sup.2 in the cross section of the copper member is set to 10 mm or more and less than 30 mm.

7. The copper/ceramic bonded body according to claim 6, wherein as a result of observing the cross section of the copper member by an electron backscatter diffraction method, a proportion of twin boundaries represented by Σ3 grain boundaries to total grain boundaries is 50% or less.

8. The copper/ceramic bonded body according to claim 6, wherein, when an arithmetic average roughness of a surface of the copper member after conducting a temperature cycle test of holding at −45° C. for 30 minutes and holding at 250° C. for 30 minutes is defined as Ra.sub.1, and an arithmetic average roughness of the surface of the copper member before conducting the temperature cycle test is defined as Ra.sub.0, Ra.sub.1/Ra.sub.0 is in a range of 1.0 or more and 1.8 or less.

9. An insulating circuit board comprising a ceramic substrate and a copper plate bonded to a surface of the ceramic substrate, wherein the copper plate has a composition having a Cu purity of 99.96 mass % or more, a balance of inevitable impurities, a P content of 2 mass ppm or less, and a total content of Pb, Se and Te of 10 mass ppm or less, in a cross section of the copper plate, a maximum area ratio is set to 45% or less when a crystal orientation map of copper obtained by EBSD is trisected into (001) planes, (111) planes, and (101) planes, and a grain boundary length in a field of view of 1 mm.sup.2 in the cross section of the copper plate is set to 10 mm or more and less than 30 mm.

10. The insulating circuit board according to claim 9, wherein as a result of observing the cross section of the copper plate by an electron backscatter diffraction method, a proportion of twin boundaries represented by Σ3 grain boundaries to total grain boundaries is 50% or less.

11. The insulating circuit board according to claim 9, wherein, when an arithmetic average roughness of a surface of the copper plate after conducting a temperature cycle test of holding at −45° C. for 30 minutes and holding at 250° C. for 30 minutes is defined as Ra.sub.1, and an arithmetic average roughness of the surface of the copper plate before conducting the temperature cycle test is defined as Ra.sub.0, Ra.sub.1/Ra.sub.0 is in a range of 1.0 or more and 1.8 or less.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0052] FIG. 1 is a schematic explanatory view of a power module using an insulating circuit board produced by A method of producing an insulating circuit board, which is an embodiment of the present invention.

[0053] FIG. 2 is a flowchart showing the production method of the insulating circuit board which is the embodiment of the present invention.

[0054] FIG. 3A is a diagram of a crystal orientation map of copper obtained by EBSD in a cross section of a circuit layer in an example (Present Invention Example 21).

[0055] FIG. 3B is a diagram of a crystal orientation map of copper obtained by EBSD in a cross section of a circuit layer in an example (Comparative Example 9).

[0056] FIG. 4A is a diagram showing the results of measuring the grain boundary lengths of a cross section of a circuit layer in an example (Present Invention Example 16).

[0057] FIG. 4B is a diagram showing the results of measuring the grain boundary lengths of a cross section of a circuit layer in an example (Comparative Example 4).

[0058] FIG. 5 is a diagram showing an accumulated state of strain in a circuit layer after a temperature cycle test of Present Invention Example 10 in examples.

[0059] FIG. 6 is a diagram showing an accumulated state of strain in a circuit layer after a temperature cycle test of Comparative Example 7 in the examples.

DESCRIPTION OF EMBODIMENTS

[0060] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0061] A copper/ceramic bonded body according to the present embodiment is an insulating circuit board 10 configured by bonding a ceramic substrate 11 which is a ceramic member to a copper plate (circuit layer 12) and a copper plate (metal layer 13), which are copper members.

[0062] FIG. 1 shows the insulating circuit board 10 which is the embodiment of the present invention and a power module 1 using the insulating circuit board 10.

[0063] The power module 1 includes the insulating circuit board 10, a semiconductor element 3 bonded to one side (upper side in FIG. 1) of the insulating circuit board 10 with a first solder layer 2 interposed therebetween, and a heat sink 51 bonded to the other side (lower side in FIG. 1) of the insulating circuit board 10 with a second solder layer 8 interposed therebetween.

[0064] The insulating circuit board 10 includes the ceramic substrate 11, the circuit layer 12 disposed on one surface (upper surface in FIG. 1) of the ceramic substrate 11, and the metal layer 13 disposed on the other surface (lower surface in FIG. 1) of the ceramic substrate 11.

[0065] The ceramic substrate 11 prevents the electrical connection between the circuit layer 12 and the metal layer 13, and is made of silicon nitride in the present embodiment. Here, the thickness of the ceramic substrate 11 is set to be in a range of 0.2 to 1.5 mm, and is set to 0.32 mm in the present embodiment.

[0066] The circuit layer 12 is formed by bonding the copper plate made of a pure copper material to one surface of the ceramic substrate 11.

[0067] A circuit pattern is formed on the circuit layer 12, and one surface thereof (upper surface in FIG. 1) becomes a mounting surface on which the semiconductor element 3 is mounted. Here, the thickness of the circuit layer 12 is set to be in a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in the present embodiment.

[0068] The metal layer 13 is formed by bonding the copper plate made of a pure copper material to the other surface of the ceramic substrate 11.

[0069] Here, the thickness of the metal layer 13 is set to be in a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in the present embodiment.

[0070] The heat sink 51 is for cooling the above-mentioned insulating circuit board 10, and in the present embodiment, is formed of a radiating plate made of a material having good thermal conductivity. In the present embodiment, the heat sink 51 is made of copper or a copper alloy excellent in thermal conductivity. The heat sink 51 and the metal layer 13 of the insulating circuit board 10 are bonded to each other with the second solder layer 8 interposed therebetween.

[0071] Here, the pure copper material forming the circuit layer 12 and the metal layer 13 has a composition in which the purity of Cu is 99.96 mass % or more, the balance contains inevitable impurities, the amount of P is set to 2 mass ppm or less, and the total content of Pb, Se, and Te is set to 10 mass ppm or less.

[0072] In addition, in the pure copper material forming the circuit layer 12 and the metal layer 13, the S content is preferably set to be in a range of 2 mass ppm or more and 20 mass ppm or less.

[0073] Furthermore, in the pure copper material forming the circuit layer 12 and the metal layer 13, the total content of Mg, Sr, Ba, Ti, Zr, Hf, and Y, which are the inevitable impurities, is preferably 10 mass ppm or less.

[0074] In cross sections of the circuit layer 12 and the metal layer 13, the maximum area ratio when a crystal orientation map of copper obtained by EBSD is trisected into (001) planes, (111) planes, and (101) planes is set to 45% or less.

[0075] In addition, in the cross sections of the circuit layer 12 and the metal layer 13, the grain boundary length in a field of view of 1 mm.sup.2 is set to 10 mm or more and less than 30 mm.

[0076] In the present embodiment, as a result of observing the cross sections of the circuit layer 12 and the metal layer 13 by an electron backscatter diffraction method, it is preferable that the proportion of twin boundaries represented by Σ3 grain boundaries is 50% or less.

[0077] Furthermore, in the present embodiment, when the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 after conducting a temperature cycle test of holding at −45° C. for 30 minutes and holding at 250° C. for 30 minutes is defined as Ra.sub.1, and the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 before conducting the temperature cycle test is defined as Ra.sub.0, Ra.sub.1/Ra.sub.0 is preferably in a range of 1.0 or more and 1.8 or less.

[0078] Here, the reasons for defining the component composition, texture, and characteristics of the pure copper material forming the circuit layer 12 and the metal layer 13 as described above will be described below.

[0079] (Purity of Cu: 99.96 mass % or More)

[0080] Electric and electronic components for large current applications are required to have excellent conductivity and heat radiation in order to suppress heat generation during energization, and preferably use pure copper having particularly excellent conductivity and heat radiation.

[0081] Therefore, in the pure copper material forming the circuit layer 12 and the metal layer 13, the purity of Cu is defined as 99.96 mass % or more.

[0082] The purity of Cu is preferably 99.965 mass % or more, and more preferably 99.97 mass % or more. The upper limit of the purity of Cu is not particularly limited. However, in a case where the purity of Cu exceeds 99.999 mass %, a special refining step is required and the manufacturing cost increases significantly. Therefore, the purity of Cu is preferably set to 99.999 mass % or less.

[0083] (Amount of P: 2 mass ppm or Less)

[0084] P contained as an inevitable impurity is widely used as an element for detoxifying oxygen in copper. However, in a case where P is contained in a certain amount or more, the action of not only oxygen but also crystal grain growth suppressing elements present at the crystal grain boundaries is inhibited. Therefore, during heating to a high temperature, there is concern that the crystal grain growth suppressing elements may not sufficiently act, and there the coarsening and non-uniformity of crystal grains may occur.

[0085] Therefore, in the present embodiment, the amount of P in the pure copper material forming the circuit layer 12 and the metal layer 13 is limited to 2 mass ppm or less.

[0086] The amount of P is set to preferably 1.5 mass ppm or less, and more preferably 1 mass ppm or less.

[0087] (Total content of Pb, Se, and Te: 10 mass ppm or Less)

[0088] Pb, Se, and Te are elements that have a low solid solubility limit in Cu and have an action of suppressing the coarsening of crystal grains by segregating to grain boundaries, but promote local grain growth.

[0089] Therefore, in the present embodiment, in order to secure hot workability, the total content of Pb, Se, and Te in the pure copper material forming the circuit layer 12 and the metal layer 13 is limited to 10 mass ppm or less.

[0090] In order to control the crystal grains favorably, the total content of Pb, Se, and Te is set to preferably 9 mass ppm or less, and more preferably 8 mass ppm or less.

[0091] (S content: 2 mass ppm or More and 20 mass ppm or Less)

[0092] S is an element that has an action of suppressing the coarsening of crystal grains by suppressing crystal grain boundary movement and lowers hot workability.

[0093] Therefore, in the present embodiment, in a case where the S content in the pure copper material forming the circuit layer 12 and the metal layer 13 is set to 2 mass ppm or more, the effect of suppressing the coarsening of crystal grains by S can be sufficiently exerted, and it is possible to reliably suppress the coarsening of crystal grains even after heating. On the other hand, by limiting the S content to 20 mass ppm or less, local crystal grain growth can be controlled.

[0094] The lower limit of the S content is preferably 2.5 mass ppm or more, and more preferably 3 mass ppm or more. The upper limit of the S content is preferably 17.5 mass ppm or less, and more preferably 15 mass ppm or less.

[0095] (Total content of Mg, Sr, Ba, Ti, Zr, Hf, Y: 10 mass ppm or Less)

[0096] Mg, Sr, Ba, Ti, Zr, Hf, and Y contained as inevitable impurities may form compounds with the crystal grain coarsening suppressing elements (S, Se, Te, and the like) that suppress the coarsening of crystal grains by segregating to the crystal grain boundaries, and there is concern that the action of the crystal grain coarsening suppressing elements may be inhibited.

[0097] Therefore, in the present embodiment, in order to reliably suppress the coarsening of crystal grains after heating, the total content of Mg, Sr, Ba, Ti, Zr, Hf, and Y in the pure copper material forming the circuit layer 12 and the metal layer 13 is preferably set to 10 mass ppm or less.

[0098] The total content of Mg, Sr, Ba, Ti, Zr, Hf, and Y is preferably 7.5 mass ppm or less, and more preferably 5 mass ppm or less.

(Other Inevitable Impurities)

[0099] As inevitable impurities other than the above-mentioned elements, there are Ag, B, Bi, Ca, Sc, rare earth elements, V, Nb, Ta, Cr, Mo, W, Mn, Re, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Au, Zn, Cd, Hg, Al, Ga, In, Ge, Sn, As, Sb, Tl, Be, N, C, Si, Li, H, and O. Since there is concern that these inevitable impurities may reduce the conductivity the total content thereof is preferably set to 0.1 mass % or less.

[0100] The circuit layer 12 and the metal layer 13 made of the pure copper material having the above composition have an average crystal grain size in a range of 70 μm or more and 400 μm or less.

[0101] The lower limit of the average crystal grain size is preferably 90 μm or more, and more preferably 100 μm or more. The upper limit of the average crystal grain size is preferably 350 μm or less, and more preferably 300 μm or less.

[0102] Furthermore, in the circuit layer 12 and the metal layer 13, the ratio d.sub.max/d.sub.ave of the maximum crystal grain size d.sub.max to the average crystal grain size d.sub.ave in a range of 35 mm×35 mm is set to 7.5 or less.

[0103] The above-mentioned d.sub.max/d.sub.ave is preferably 6.0 or less, and more preferably 5.0 or less.

(Crystal Orientation of Copper by EBSD)

[0104] In the present embodiment, in a case where the crystal orientation is aligned in one direction, when a temperature cycle is applied, undulations tend to occur on the surfaces of the circuit layer 12 and the metal layer 13. Accordingly, there is concern that fracture and peeling may occur at the first solder layer 2 between the semiconductor element 3 and the circuit layer 12 and at the second solder layer 8 between the metal layer 13 and the heat sink.

[0105] Therefore, in the present embodiment, in the cross sections of the circuit layer 12 and the metal layer 13, the maximum area ratio when a crystal orientation map of copper obtained by EBSD is trisected into (001) planes, (111) planes, and (101) planes is set to 45% or less, and a crystal orientation that is not aligned in any of the (001) planes, (111) planes, and (101) planes but is random is achieved.

(Grain Boundary Length in Field of View of 1 mm.sup.2)

[0106] In the present embodiment, in the cross sections of the circuit layer 12 and the metal layer 13, when the grain boundary length in a field of view of 1 mm.sup.2 is 10 mm or more and less than 30 mm, a sufficient grain boundary length is secured, and strain can be accumulated at the grain boundaries when a temperature cycle is applied, so that it is possible to suppress the occurrence of undulations on the surfaces of the circuit layer 12 and the metal layer 13.

[0107] In the cross sections of the circuit layer 12 and the metal layer 13, the lower limit of the grain boundary length in the field of view of 1 mm.sup.2 is preferably 12 mm or more, and more preferably 15 mm or more. In addition, in the cross sections of the circuit layer 12 and the metal layer 13, the upper limit of the grain boundary length in the field of view of 1 mm.sup.2 is preferably 28 mm or less, and more preferably 26 mm or less.

(Proportion of Twin Boundaries)

[0108] The strain when the temperature cycle is applied is accumulated in the normal grain boundaries, but not at the twin boundaries.

[0109] Therefore, in this embodiment, as a result of observing the cross sections of the circuit layer 12 and the metal layer 13 by the electron backscatter diffraction method, the proportion of twin boundaries represented by Σ3 grain boundaries is preferably limited to 50% or less.

[0110] The proportion of twin boundaries is more preferably 45% or less, and even more preferably 40% or less.

[0111] (Ratio of Surface Roughnesses Before and After Temperature Cycle Applied)

[0112] In the present embodiment, when the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 after conducting a temperature cycle test of holding at −45° C. for 30 minutes and holding at 250° C. for 30 minutes is defined as Ra.sub.1, and the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 before conducting the temperature cycle test is defined as Ra.sub.0, in a case where Ra.sub.1/Ra.sub.0 is in a range of 1.0 or more and 1.8 or less, the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 after conducting the temperature cycle test is not significantly increased from before conducting the temperature cycle test, and the occurrence of undulations is reliably suppressed.

[0113] Ra.sub.1/Ra.sub.0 is more preferably 1.7 or less, and even more preferably 1.6 or less.

[0114] Next, a production method of the insulating circuit board 10 which is the present embodiment described above will be described with reference to FIG. 2.

<Copper Plate Preparation Step S01>

[0115] First, copper plates which are to become the circuit layer 12 and the metal layer 13 are prepared. The copper plates are formed of a pure copper material having the above-mentioned composition. In the copper plates before bonding, the average crystal grain size is set to 10 μm or more and the aspect ratio (major axis/minor axis) of the crystal grains on rolled surfaces is set to 2 or less by changing heat treatment conditions and a rolling reduction when the copper plate is produced.

<Laminating Step S02>

[0116] Next, as shown in FIG. 2, the copper plate obtained as described above to become the circuit layer 12 is laminated on one surface of the ceramic substrate 11 with an active brazing material interposed therebetween, and the copper plate obtained as described above to become the metal layer 13 is laminated on the other surface of the ceramic substrate 11 with an active brazing material interposed therebetween.

[0117] In the present embodiment, a paste of Ag-28 mass % Cu-5 mass % Ti alloy was used as the active brazing material.

<Bonding Step S03>

[0118] The copper plate, the ceramic substrate 11, and the copper plate which are laminated are loaded into a vacuum heating furnace in a state of being pressed in the laminating direction, and heated, whereby the copper plate and the ceramic substrate 11 are bonded to each other to form the circuit layer 12 and the copper plate and the ceramic substrate 11 are bonded to each other to form the metal layer 13.

[0119] Here, the pressing load in the laminating direction is set to be in a range of 0.05 MPa or more and 1.5 MPa or less, the heating temperature is set to be in a range of 800° C. or higher and 850° C. or lower, and the holding time at the heating temperature is set to be in a range of 10 minutes or longer and 90 minutes or shorter. In addition, the pressure in the vacuum heating furnace at the heating temperature is preferably set to be in a range of 1.0×10.sup.−4 Pa or more and 1.0×10.sup.−1 Pa or less.

[0120] In addition, in the present embodiment, it is preferable to adjust the pressing load, the heating temperature, and the holding time so that an aspect ratio (major axis/minor axis) R0 of the crystal grains on the rolled surfaces of the copper plates before bonding, an aspect ratio (major axis/minor axis) R1 of the crystal grains on the rolled surfaces of the copper plates (circuit layer 12 and metal layer 13) after the bonding, and an average crystal grain size D1 on the rolled surfaces of the copper plates (circuit layer 12 and metal layer 13) after the bonding satisfy the following relational expression RD.

Relational expression RD=D1×(R1/R0)<500

[0121] As described above, the insulating circuit board 10 according to the present embodiment is produced by the copper plate preparation step S01, the laminating step S02, and the bonding step S03.

(Heat Sink Bonding Step S04)

[0122] Next, the heat sink 51 is bonded to the other surface side of the metal layer 13 of the insulating circuit board 10.

[0123] In the present embodiment, the insulating circuit board 10 and the heat sink 51 are laminated with a solder material interposed therebetween and are loaded into a heating furnace such that the insulating circuit board 10 and the heat sink 51 are soldered to each other with the second solder layer 8 interposed therebetween.

(Semiconductor Element Bonding Step S05)

[0124] Next, the semiconductor element 3 is bonded to one surface of the circuit layer 12 of the insulating circuit board 10 by soldering.

[0125] The power module 1 shown in FIG. 1 is produced by the above steps.

[0126] According to the production method of the insulating circuit board 10 (copper/ceramic bonded body) of the present embodiment having the above configuration, since the amount of P in the copper plates forming the circuit layer 12 and the metal layer 13 is set to 2 mass ppm or less, the inhibition of the effect of the crystal grain growth suppressing elements present at the grain boundaries in a trace amount by P can be suppressed, and it is possible to suppress the coarsening and non-uniformity of the crystal grains in the copper plates (circuit layer 12 and metal layer 13) after bonding.

[0127] In addition, since elements such as Pb, Se, and Te have a low solid solubility limit in Cu and correspond to the crystal grain growth suppressing elements that suppress the coarsening of the crystal grains by segregation at the grain boundaries, the elements may be contained in a trace amount. However, these elements also have an effect of greatly reducing hot workability. Therefore, hot workability can be secured by limiting the total content of Pb, Se, and Te to 10 mass ppm or less. Therefore, it is possible to stably produce the copper plates which are to become the circuit layer 12 and the metal layer 13.

[0128] Furthermore, in the present embodiment, since the average crystal grain size of the copper plates before bonding is set to 10 μm or more and the aspect ratio (major axis/minor axis) of the crystal grains on the rolled surfaces is set to 2 or less, a large strain is not accumulated in the copper plates before bonding, the driving force for recrystallization becomes smaller, and in the subsequent bonding step S03, the local coarsening of the crystal grains can be suppressed even if the bonding is performed under the conditions that the pressing load in the laminating direction is in a range of 0.05 MPa or more and 1.5 MPa or less, the heating temperature is in a range of 800° C. or higher and 850° C. or lower, and the holding time at the heating temperature is in a range of 10 minutes or longer and 90 minutes or shorter.

[0129] Therefore, it is possible to suppress the coarsening and non-uniformity of the crystal grains in the copper plates (circuit layer 12 and metal layer 13) after bonding.

[0130] In addition, in the present embodiment, since the pressing load, heating temperature, and holding time in the bonding step S03 are adjusted so that the aspect ratio (major axis/minor axis) R0 of the crystal grains on the rolled surfaces of the copper plates before the bonding, the aspect ratio R1 of the crystal grains on the rolled surfaces of the copper plates (circuit layer 12 and metal layer 13) after the bonding, and the average crystal grain size D1 on the rolled surfaces of the copper plates (circuit layer 12 and metal layer 13) after the bonding satisfy the relational expression RD=D1×(R1/R0)<500, the local coarsening of the crystal grains in the copper plates (circuit layer 12 and metal layer 13) after the bonding can be reliably suppressed.

[0131] Furthermore, in the present embodiment, in a case where the S content in the copper plates forming the circuit layer 12 and the metal layer 13 is set to be in a range of 2 mass ppm or more and 20 mass ppm or less, it is possible to reliably suppress the coarsening and non-uniformity of the crystal grains in the copper plates (circuit layer 12 and metal layer 13) after the bonding by P, which is a crystal grain growth suppressing element.

[0132] Moreover, in the present embodiment, in a case where the total content of Mg, Sr, Ba, Ti, Zr, Hf, and Y in the copper plates forming the circuit layer 12 and the metal layer 13 is 10 mass ppm or less, the generation of compounds of these elements with S, Se, Te, and the like, which are crystal grain growth suppressing elements, and consumption of S, Se, Te, and the like can be suppressed, and the crystal grain growth suppressing effect by the crystal grain growth suppressing elements can be sufficiently exhibited. Therefore, even after the bonding, it is possible to reliably suppress the coarsening and non-uniformity of the crystal grains.

[0133] In the insulating circuit board 10 of the present embodiment, in the cross sections of the circuit layer 12 and the metal layer 13, since the maximum area ratio when the crystal orientation map of copper obtained by EBSD is trisected into (001) planes, (111) planes, and (101) planes is set to 45% or less and the grain boundary length in a field of view of 1 mm.sup.2 is set to 10 nun or more and less than 30 mm, even in a case where a temperature cycle is applied, the accumulation of strain in the circuit layer 12 and the metal layer 13 and the occurrence of undulations on the surfaces of the circuit layer 12 and the metal layer 13 can be suppressed.

[0134] In addition, in the present embodiment, as a result of observing the cross sections of the circuit layer 12 and the metal layer 13 by the electron backscatter diffraction method, in a case where the proportion of twin boundaries represented by Σ3 grain boundaries is 50% or less, in the circuit layer 12 and the metal layer 13, the proportion of normal grain boundaries is secured in the copper plate, strain can be accumulated in the normal grain boundaries when a temperature cycle is applied, and the occurrence of undulations on the surfaces of the circuit layer 12 and the metal layer 13 can be more accurately suppressed.

[0135] Furthermore, in the present embodiment, in a case where Ra.sub.1/Ra.sub.0 is in a range of 1.0 or more and 1.8 or less when the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 after conducting a temperature cycle test of holding at −45° C. for 30 minutes and holding at 250° C. for 30 minutes is defined as Ra.sub.1, and the arithmetic average roughness of the surfaces of the circuit layer 12 and the metal layer 13 before conducting the temperature cycle test is defined as Ra.sub.0, the surface roughness of the circuit layer 12 and the metal layer 13 is not significantly increased even after conducting the temperature cycle test, and it is possible to reliably suppress the occurrence of undulations.

[0136] While the embodiments of the present invention have been described above, the present invention is not limited thereto and can be modified as appropriate without departing from the technical spirit of the invention.

[0137] For example, although the circuit layer and the metal layer have been described as being formed of the copper plates made of the pure copper material described above, the circuit layer and the metal layer are not limited thereto. As long as at least one of the circuit layer and the metal layer is formed of the copper plate made of the pure copper material, the other may be formed of another copper or copper alloy, aluminum or an aluminum alloy, a laminate thereof, or the like.

[0138] Furthermore, in the present embodiment, although the ceramic substrate has been described as being made of silicon nitride, the ceramic substrate is not limited thereto. The ceramic substrate may be made of aluminum nitride or aluminum oxide.

[0139] In addition, in the present embodiment, the copper plate and the ceramic substrate have been described as being bonded by using an active brazing material, the copper plate and the ceramic substrate may be bonded by another bonding method such as a DBC method. In addition, although it has been described that the paste of Ag-28 mass % Cu-5 mass % Ti alloy is used as the active brazing material, an active brazing material having another composition may also be applied.

[0140] Furthermore, in the present embodiment, configurating the power module by mounting the power semiconductor element on the circuit layer of the insulating circuit board has been described, but the present embodiment is not limited thereto. For example, an LED module may be configured by mounting an LED element on the insulating circuit board, or a thermoelectric module may be configured by mounting a thermoelectric element on the circuit layer of the insulating circuit board.

EXAMPLES

[0141] A confirmatory experiment performed to confirm effectiveness of the present invention will be described.

Example 1

[0142] Cu materials with different compositions, initial grain sizes, and aspect ratios were obtained and used as copper strip materials for a circuit layer and a metal layer for an insulating board.

[0143] Next, copper plates (37 mm square, thickness 0.8 mm) to be the circuit layer and the metal layer were prepared by cutting the above-mentioned copper strip material, and were bonded to both surfaces of a 40 mm square ceramic substrate made of silicon nitride (thickness 0.32 mm) using an active brazing material of an Ag-28 mass % Cu-5 mass % Ti alloy under the conditions shown in Tables 3 and 4, whereby copper/ceramic bonded bodies were formed. In addition, the degree of vacuum of a vacuum furnace during bonding was set to 5×10.sup.−3 Pa.

[0144] The copper strip materials (copper plates) and copper/ceramic bonded bodies thus obtained were evaluated for the following items.

(Crystal Grain Size of Copper Plate before Bonding)

[0145] A 20 mm×20 mm sample was cut out from the obtained copper strip material, and the average crystal grain size was measured by a SEM-EBSD (Electron Backscatter Diffraction Patterns) measuring device.

[0146] A rolled surface was mechanically polished using water-resistant abrasive paper and diamond abrasive grains, and then subjected to finish polishing using a colloidal silica solution. Thereafter, using an electron scanning microscope, each measurement point (pixel) within a measurement range on the surface of a specimen was irradiated with an electron beam, and a grain boundary having an orientation difference of 15° or more between adjacent measurement points was defined as a high-angle grain boundary by orientation analysis according to backscatter electron diffraction, while a grain boundary having an orientation difference of less than 15° was defined as a low-angle grain boundary.

[0147] A crystal grain boundary map was creased using high-angle grain boundaries, five line segments of predetermined length and width were drawn on the crystal grain boundary map according to a cutting method of JIS H 0501, the number of completely cut crystal grains was counted, and the average value of the cutting lengths was described as the crystal grain size before bonding. The evaluation results are shown in Tables 3 and 4.

(Aspect Ratio R0 of Crystal Grains of Copper Plate before Bonding)

[0148] For the aspect ratio (major axis/minor axis) of the crystal grains on the rolled surface, a crystal grain boundary map of the rolled surface of the obtained copper strip material was produced using the SEM-EBSD (Electron Backscatter Diffraction Patterns) measuring device in the same manner as described above. For the map, five line segments were drawn in the plate thickness direction, five line segments were drawn in the rolling direction, the number of completely cut crystal grains was counted, the ratio of the major axis to the minor axis was taken as the aspect ratio (major axis/minor axis), and the average value thereof was calculated. The evaluation results are shown in Tables 3 and 4.

(Crystal Grain Size D1 of Copper Plate after Bonding)

[0149] A 30 mm×30 mm sample was cut out from the copper plate bonded to the ceramic substrate, the rolled surface was mirror-polished, etched, and photographed with an optical microscope so that the rolling direction was a width direction in the photograph. In the observation sites, ten fields of views were selected as sites in which a uniform grain size was formed in a field of view of about 1000×1000 μm.sup.2, and observation and measurement were performed in about 1000×1000 μm.sup.2. Then, regarding the crystal grain size, according to the cutting method of JIS H 0501, five line segments of predetermined length and width were drawn in the photograph, the number of completely cut crystal grains was counted, and the average value of the cutting lengths was described as the crystal grain size after a heat treatment. Those having an average crystal grain size after bonding of 400 μm or less were indicated as “O”, and those of more than 400 μin were indicated as “X”. The evaluation results are shown in Tables 3 and 4.

(Aspect Ratio R1 of Crystal Grains of Copper Plate after Bonding)

[0150] As described above, a crystal grain boundary map of the rolled surface of the sample collected from the copper plate bonded to the ceramic substrate was produced using the SEM-EBSD (Electron Backscatter Diffraction Patterns) measuring device in the same manner as described above. For the map, five line segments were drawn in the plate thickness direction, five line segments were drawn in the rolling direction, the number of completely cut crystal grains was counted, the ratio of the major axis to the minor axis was taken as the aspect ratio (major axis/minor axis), and the average value thereof was calculated. The evaluation results are shown in Tables 3 and 4.

(Variation of Grain Size of Copper Plate after Bonding)

[0151] As described above, for the sample collected from the copper plate bonded to the ceramic substrate, in a range of 30 mm×30 mm excluding twins, the average value of the major axis of the coarsest crystal grain and the minor axis cut by the grain boundary when a line was drawn perpendicular thereto was defined as the maximum crystal grain size d.sub.max, a case where the ratio d.sub.max/d.sub.ave of the maximum crystal grain size d.sub.max to the above-described average crystal grain size d.sub.ave was 10 or less was evaluated as “O”, and a case where d.sub.max/d.sub.ave exceeded 10 was evaluated as “X”. The evaluation results are shown in Tables 3 and 4.

(Ratio of Crystal Orientations in Crystal Orientation map by EBSD)

[0152] Crystal orientation ratio of copper: After bonding the ceramic substrate and the copper plate, a cross section of a copper plate portion of a ceramic circuit board was prepared at an arbitrary position, a crystal orientation map of the copper plate portion in the field of view was created by performing electron backscatter analysis (EBSD: AMETEK Inc., Hikari detector/SEM: ZEISS, Ultra 55) under the condition of an accelerating voltage of 15 kV, the crystal orientations of copper were then three-valued into (001) planes, (111) planes, and (101) planes, and the ratio of planes showing the highest value from the area ratios of the orientations was evaluated as the crystal orientation ratio.

(Grain Boundary Length/Proportion of Twin Boundaries)

[0153] From the above cross-sectional analysis results, the total grain boundary lengths of 1 mm of the copper plate portion were measured using OIM-data-collection software. In addition, the proportion of the grain boundaries corresponding to 3Σ to the total grain boundaries was defined as the proportion of twin boundaries.

(Surface Roughnesses Before and After Temperature Cycle Test) The plating surface roughness Ra after plating the copper plate after conducting 1000 thermal cycle tests under the conditions of a holding time of 30 minutes at 250° C. and a holding time of 30 minutes at −45° C. was evaluated using a contact type surface roughness meter (201P manufactured by Mitutoyo Corporation.

TABLE-US-00001 TABLE 1 Comionent composition (mass ratio) Three Seven elements elements Cu P in total Pb Se Te S in total Mg Sr Ba Ti Zr Hf Y % ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm Present  1 99.96 or more 0.9 5.0 2.5 0.2 2.3 5.5 4.6 0.6 0.5 0.2 2.0 0.6 0.5 0.2 Invention  2 99.96 or more 0.3 3.2 1.7 1.2 0.3 16.6 5.3 2.0 0.5 0.2 0.9 0.7 0.4 0.6 Example  3 99.96 or more 0.8 4.6 1.2 2.5 0.9 7.9 3.8 0.8 0.5 0.1 0.5 0.5 0.5 0.9  4 99.96 or more 1.8 5.6 2.1 1.3 2.2 4.9 5.7 2.6 0.3 0.2 1.1 0.1 0.8 0.6  5 99.96 or more 1.8 5.6 2.1 1.3 2.2 4.9 5.7 2.6 0.3 0.2 1.1 0.1 0.8 0.6  6 99.96 or more 1.8 5.6 2.1 1.3 2.2 4.9 5.7 2.6 0.3 0.2 1.1 0.1 0.8 0.6  7 99.96 or more 0.7 6.3 2.6 2.9 0.8 19.7 6.6 2.8 0.5 0.4 0.9 0.9 0.3 0.8  8 99.96 or more 0.9 2.4 0.2 1.2 1.0 4.8 5.2 1.1 0.3 0.2 1.8 0.2 0.7 0.9  9 99.96 or more 1.8 4.3 0.4 1.9 2.0 15.5 4.1 0.4 0.4 0.5 1.7 0.7 0.2 0.2 10 99.96 or more 1.0 5.7 2.8 1.1 1.8 12.6 6.9 3.0 0.3 0.1 2.0 0.4 1.0 0.1 11 99.96 or more 1.9 3.2 0.4 2.5 0.3 19.4 6.7 2.4 0.3 0.5 1.7 0.1 0.7 1.0 12 99.96 or more 2.0 6.8 2.8 2.1 1.9 15.7 5.3 1.6 0.4 0.5 1.2 0.6 0.7 0.3 13 99.96 or more 2.0 6.8 2.8 2.1 1.9 15.7 5.3 1.6 0.4 0.5 1.2 0.6 0.7 0.3 14 99.96 or more 2.0 6.8 2.8 2.1 1.9 15.7 5.3 1.6 0.4 0.5 1.2 0.6 0.7 0.3 15 99.96 or more 0.7 5.8 1.1 3.0 1.7 13.8 5.3 1.5 0.5 0.4 0.8 1.0 1.0 0.1 16 99.96 or more 0.3 4.4 2.6 0.7 1.1 2.1 7.0 3.0 0.5 0.5 1.3 1.0 0.2 0.5 17 99.96 or more 1.0 4.3 1.0 2.6 0.7 14.2 6.5 2.5 0.4 0.3 1.9 0.6 0.2 0.6 18 99.96 or more 1.8 6.2 2.7 1.3 2.2 13.4 4.4 0.9 0.3 0.3 1.1 1.0 0.3 0.5 19 99.96 or more 0.1 3.2 0.4 0.2 2.6 16.2 3.9 1.5 0.2 0.1 0.4 0.3 0.9 0.5 20 99.96 or more 0.9 2.0 0.2 1.5 0.3 18.8 4.5 1.4 0.2 0.1 1.4 0.4 0.2 0.8 21 99.96 or more 1.2 6.7 2.2 2.8 1.7 9.0 3.9 0.4 0.1 0.4 1.2 0.9 0.8 0.1 22 99.96 or more 1.2 4.2 1.9 1.2 1.1 18.5 5.7 1.4 0.1 0.4 1.8 0.9 1.0 0.1

TABLE-US-00002 TABLE 2 Component composition (mass ratio) Three Seven elements elements Cu P in total Pb Se Te S in total Mg Sr Ba Ti Zr Hf Y % ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm ppm Present 23 99.96 or more 1.5 4.0 2.2 0.9 0.9 19.9 4.8 1.1 0.2 0.3 1.1 0.9 1.0 0.2 Invention 24 99.96 or more 1.8 2.3 0.4 0.2 1.7 19.3 1.5 0.2 0.2 0.2 0.2 0.1 0.5 0.1 Example 25 99.96 or more 0.2 4.0 1.6 1.0 1.4 14.1 5.4 1.6 0.4 0.2 0.7 0.8 0.8 0.9 26 99.96 or more 0.6 5.4 1.4 1.6 2.4 10.4 3.8 0.3 0.2 0.5 1.3 0.6 0.3 0.6 27 99.96 or more 1.8 3.3 2.4 0.5 0.4 18.5 2.9 0.5 0.3 0.3 0.4 0.4 0.2 0.8 28 99.96 or more 1.3 5.7 1.6 1.5 2.6 17.5 4.8 1.9 0.1 0.3 0.8 0.1 0.9 0.7 29 99.96 or more 1.3 5.7 1.6 1.5 2.6 17.5 4.8 1.9 0.1 0.3 0.8 0.1 0.9 0.7 30 99.96 or more 1.3 5.7 1.6 1.5 2.6 17.5 4.8 1.9 0.1 0.3 0.8 0.1 0.9 0.7 31 99.96 or more 0.1 1.1 0.8 0.2 0.1 4.0 0.4 0.1 0.0 0.0 0.1 0.0 0.1 0.1 32 99.96 or more 0.2 1.6 1.2 0.3 0.1 4.0 0.7 0.2 0.1 0.0 0.1 0.2 0.1 0.0 Comparative  1 99.96 or more 5.0 6.8 0.8 3.0 3.0 14.1 12.1 5.0 1.2 3.0 1.6 0.3 0.5 0.5 Example  2 99.96 or more 1.6 23.5 4.2 9.8 9.5 2.0 2.2 1.0 0.4 0.2 0.1 0.3 0.1 0.1  3 99.96 or more 1.8 22.7 2.8 10.3 9.6 17.0 4.0 1.3 0.8 0.5 0.5 0.4 0.3 0.2  4 99.96 or more 1.7 6.8 1.9 2.1 2.8 10.5 5.3 2.6 0.3 0.1 1.4 0.3 0.1 0.5  5 99.96 or more 0.1 5.3 2.6 1.9 0.8 6.3 3.7 0.7 0.1 0.4 1.3 0.6 0.1 0.5  6 99.96 or more 0.5 4.9 2.4 0.5 2.0 14.5 7.0 3.0 0.4 0.3 1.6 0.4 0.8 0.5  7 99.96 or more 1.6 5.3 2.1 2.4 0.8 11.8 3.3 0.1 0.1 0.4 0.4 0.7 0.9 0.7  8 99.96 or more 0.5 4.6 2.0 0.9 1.7 11.6 5.8 2.6 0.4 0.1 1.9 0.2 0.1 0.5  9 99.96 or more 0.5 4.0 0.5 0.7 2.8 11.6 4.7 2.7 0.1 0.2 0.5 0.5 0.2 0.5

TABLE-US-00003 TABLE 3 Before heat treatment Bonding step After bonding Crystal Aspect Pressing Heating Holding Crystal Aspect Relational Variation grain size ratio load temperature time grain size ratio expression in crystal μm R0 MPa ° C. min D1 μm R1 R1/R0 RD grain size Present  1 12 1.087 0.1 840 30 135 1.022 0.94 127 O Invention  2 14 1.163 0.1 840 30 230 1.041 0.90 206 O Example  3 10 1.087 0.1 840 30 160 1.022 0.94 150 O  4 10 1.163 0.1 840 30 250 1.041 0.90 224 O  5 10 1.163 0.2 840 30 280 1.038 0.90 251 O  6 10 1.163 1.0 840 30 340 1.035 0.90 304 O  7 12 1.111 0.1 840 30 200 1.028 0.93 185 O  8 11 1.000 0.1 840 30 160 1.000 1.00 160 O  9 12 1.176 0.1 840 30 140 1.044 0.89 124 O 10 12 1.389 0.1 840 30 200 1.097 0.79 158 O 11 15 1.000 0.1 840 30 120 1.000 1.00 120 O 12 14 1.064 0.1 840 30 210 1.016 0.96 201 O 13 14 1.064 0.2 840 30 230 1.013 0.96 220 O 14 14 1.064 1.0 840 30 260 1.019 0.96 248 O 15 16 1.163 0.1 840 30 180 1.041 0.90 161 O 16 18 1.449 0.1 840 30 140 1.112 0.77 107 O 17 19 1.000 0.1 840 30 190 1.000 1.00 190 O 18 17 1.064 0.1 840 30 160 1.016 0.96 153 O 19 16 1.163 0.1 840 30 130 1.041 0.90 116 O 20 19 1.408 0.1 840 30 186 1.102 0.78 146 O 21 31 1.000 0.1 840 30 135 1.000 1.00 135 O 22 30 1.087 0.1 840 30 230 1.022 0.94 216 O

TABLE-US-00004 TABLE 4 Before heat treatment Bonding step After bonding Crystal Aspect Pressing Heating Holding Crystal Aspect Relational Variation grain size ratio load temperature time grain size ratio expression in crystal μm R0 MPa ° C. min D1 μm R1 R1/R0 RD grain size Present 23 28 1.190 0.1 840 30 280 1.048 0.88 246 O Invention 24 32 1.429 0.1 840 30 275 1.107 0.78 213 O Example 25 41 1.000 0.1 840 30 220 1.000 1.00 220 O 26 43 1.064 0.1 840 30 210 1.016 0.96 201 O 27 39 1.190 0.1 840 30 130 1.048 0.88 114 O 28 59 1.818 0.1 840 30 290 1.105 0.61 176 O 29 59 1.818 0.2 840 30 300 1.095 0.61 182 O 30 59 1.818 1.0 840 30 310 1.123 0.61 188 O 31 80 1.054 0.1 840 30 120 1.050 1.00 120 O 32 71 1.081 0.1 840 30 115 1.061 0.98 113 O Comparative  1 8 2.778 0.1 840 30 600 1.944 0.70 420 X example  2 15 1.563 0.1 840 30 210 1.400 0.90 188 X  3 20 1.778 0.1 840 30 250 1.300 0.73 183 X  4 10 1.163 2.0 840 30 680 1.041 0.90 609 O  5 14 1.064 2.0 840 30 720 1.016 0.96 688 O  6 59 1.818 2.0 840 30 930 1.205 0.66 616 O  7 4 1.645 0.1 840 30 843 1.398 0.85 717 O  8 8 1.453 0.1 840 30 726 1.235 0.85 617 O  9 3 1.243 0.1 840 30 868 1.057 0.85 738 O

TABLE-US-00005 TABLE 5 Crystal orientation map Grain boundary Ratio Ratio of Ratio of length in Proportion (001) (111) (101) field of view of twin Temperature planes planes planes of 1 mm.sup.2 boundaries cycle test % % % mm % Ra.sub.1/Ra.sub.0 Resent  1 26 30 44 23 48 1.3 Invention  2 30 43 27 11 11 1.3 Example  3 44 28 28 11 14 1.7  4 41 41 18 26 47 1.4  5 42 36 22 27 12 1.3  6 31 34 35 13 22 1.3  7 37 42 21 27 20 1.0  8 36 33 31 21 18 1.4  9 43 43 14 18 45 1.1 10 22 39 39 26 23 1.1 11 44 34 22 25 29 1.1 12 44 34 22 18 37 1.6 13 31 33 36 21 14 1.8 14 22 33 45 16 23 1.7 15 25 42 33 14 41 1.1 16 27 41 32 26 20 1.5 17 34 39 27 22 31 1.7 18 23 36 41 24 37 1.7 19 30 38 32 12 27 1.7 20 27 44 29 26 38 1.3 21 32 37 31 29 36 1.0 22 25 34 41 26 41 1.1

TABLE-US-00006 TABLE 6 Crystal orientation map Grain boundary Ratio Ratio of Ratio of length in Proportion (001) (111) (101) field of view of twin Temperature planes planes planes of 1 mm.sup.2 boundaries cycle test % % % mm % Ra.sub.1/Ra.sub.0 Present 23 44 34 22 20 24 1.5 Invention 24 32 39 29 11 30 1.0 Example 25 27 35 38 26 15 1.2 26 39 36 25 20 32 1.8 27 40 35 25 20 32 1.6 28 39 36 25 24 28 1.6 29 31 35 34 16 34 1.1 30 25 37 38 29 25 1.8 31 37 35 28 20 36 1.3 32 29 40 31 25 17 1.4 Comparative  1 60 22 18 29 39 2.1 Example  2 12 80 8 20 18 2.9  3 10 14 76 25 41 2.8  4 36 33 31 8 33 2.0  5 29 40 31 32 44 2.4  6 62 10 28 20 51 2.4  7 6 33 61 11 58 3.1  8 26 48 26 13 62 2.2  9 33 42 25 6 55 2.0

[0154] In Comparative Example 1, since the amount of P was larger than the range of the present invention, the average crystal grain size of the copper plate after bonding was as coarse as 600 μm, and the variation in the crystal grain size was large.

[0155] In Comparative Examples 2 and 3, the total content of Pb, Se, and Te was larger than the range of the present invention, and the variation in the crystal grain size of the copper plate after bonding was large.

[0156] In Comparative Examples 4 to 6, since the pressing load in the bonding step was as large as 2 MPa, the RD value was large, and the average crystal grain size of the copper plate after bonding was coarse (see FIG. 4B for Comparative Example 4).

[0157] In Comparative Examples 7 to 9, since the crystal grain size of the Cu strip material before bonding was too small, grain growth was promoted during bonding, and the average crystal grain size was coarse.

[0158] On the other hand, in Present Invention Examples 1 to 32 in which the amount of P was 2 mass ppm or less, the total content of Pb, Se, and Te was set to 10 mass ppm or less, and the bonding conditions were set to be in the ranges of the present invention, the average crystal grain of the copper plate after bonding was small, and the variation in the crystal grain size was small.

[0159] In addition, in Comparative Examples 1 to 3 and 6 to 8, the maximum area ratio when the crystal orientation map of copper obtained by EBSD in the cross section of the copper plate was trisected into (001) planes, (111) planes, and (101) planes exceeded 45%, and the surface roughness after the temperature cycle test was large (see FIG. 3B for Comparative Example 9).

[0160] In Comparative Examples 4 and 9, the grain boundary length in a field of view of 1 mm.sup.2 in the cross section of the copper member was less than 10 mm, and the surface roughness after the temperature cycle test was large (see FIG. 4B for Comparative Example 4).

[0161] In Comparative Example 5, the grain boundary length in a field of view of 1 mm.sup.2 in the cross section of the copper member exceeded 30 mm, and the surface roughness after the temperature cycle test was large.

[0162] In Comparative Example 7, the proportion of twin boundaries represented by Σ3 grain boundaries to the total grain boundaries exceeded 50%, and the surface roughness after the temperature cycle test was large (see FIG. 6).

[0163] Contrary to this, in Present Invention Examples 1 to 32, the maximum area ratio when the crystal orientation map of copper obtained by EBSD in the cross section of the copper plate was trisected into (001) planes, (111) planes, and (101) planes was 45% or less (see FIG. 3A for Present Invention Example 21), the grain boundary length in a field of view of 1 mm.sup.2 in the cross section of the copper plate was set to 10 mm or more and less than 30 mm (see FIG. 4A for Example 16 of the Present Invention), and the surface roughness before and after the temperature cycle test did not change significantly (see FIG. 5 for Example 10 of the Present Invention).

[0164] From the above, according to the present invention examples, it was confirmed that it is possible to provide A method of producing a copper/ceramic bonded body in which the coarsening and non-uniformity of crystal grains of a copper member can be suppressed even after bonding, A method of producing an insulating circuit board, a copper/ceramic bonded body, and an insulating circuit board.

INDUSTRIAL APPLICABILITY

[0165] According to the present invention, A method of producing a copper/ceramic bonded body in which the coarsening and non-uniformity of crystal grains of a copper member can be suppressed even after bonding and undulations on the surface of the copper member can be suppressed even in a case where a temperature cycle is applied, A method of producing an insulating circuit board, a copper/ceramic bonded body, and an insulating circuit board can be provided.

REFERENCE SIGNS LIST

[0166] 10: Insulating circuit board (copper/ceramic bonded body)

[0167] 11: Ceramic substrate

[0168] 12: Circuit layer

[0169] 13: Metal layer