PACKAGED STRUCTURE, ELECTRIC POWER CONTROL SYSTEM, AND MANUFACTURING METHOD

Abstract

A packaged structure includes a first substrate and a second substrate. Power units are disposed on a first surface of the first substrate. A control unit is disposed on a first surface of the second substrate, and the second substrate is connected to one end of the first substrate. The control unit is electrically connected to the power units. The control unit is configured to: receive an external input signal, collect an internal sensing signal, and control the power units to work. The first surface of the second substrate is disposed on a same side as the first surface of the first substrate. When the structure is used, a signal part and a power part are integrated. The power units are disposed on the first substrate, and the control unit is disposed on the second substrate, so that the signal part and the power part can be separately disposed.

Claims

1.-15. (canceled)

16. A packaged structure, comprising: a first substrate, wherein power units are disposed on a first surface of the first substrate; and a second substrate, wherein a control unit is disposed on a first surface of the second substrate, the second substrate is connected to a first end of the first substrate, the control unit is electrically connected to the power units, and the control unit is configured to: receive an external input signal, collect an internal sensing signal, and control the power units to work, wherein the first surface of the second substrate is disposed on a same side as the first surface of the first substrate.

17. The packaged structure according to claim 16, wherein the power units include a plurality of rows of power units that are disposed on the first substrate, each row of the plurality of rows of power units comprises at least one corresponding power unit arranged in a first direction, and corresponding power units in each row of the plurality of rows of power units are electrically connected by a first corresponding connecting part.

18. The packaged structure according to claim 17, wherein the first corresponding connecting part comprises a conductor, the conductor is in a multi-arch bridge shape, the conductor comprises a plurality of arch structures and a connecting part connected between adjacent arch structures, and the connecting part is electrically connected to the power units.

19. The packaged structure according to claim 16, wherein the control unit is electrically connected to the power units by a second connecting part, and the second connecting part comprises at least one flexible printed circuit board.

20. The packaged structure according to claim 19, wherein a conductive line is arranged on the second substrate, and the flexible printed circuit board is electrically connected to the control unit by the conductive line on the second substrate.

21. The packaged structure according to claim 16, wherein the first end of the second substrate is stacked on one end of the first substrate.

22. The packaged structure according to claim 21, wherein a second surface of the second substrate is connected to the first surface of the first substrate, a first soldering part is disposed on the second surface of the second substrate, a second soldering part is disposed on the first surface of the first substrate, and the first soldering part is soldered to the second soldering part, or wherein the first surface of the second substrate is connected to a second surface of the first substrate, a first soldering part is disposed on the first surface of the second substrate, a second soldering part is disposed on the second surface of the first substrate, and the first soldering part is soldered to the second soldering part.

23. The packaged structure according to claim 16, wherein the first end of the second substrate is disposed against one end of the first substrate.

24. The packaged structure according to claim 23, wherein a first soldering part is disposed on an end surface of the first end of the second substrate that is configured to abut against the first substrate, a second soldering part is disposed on an end surface of the one end that the first substrate that is configured to abut against the second substrate, and the first soldering part is soldered to the second soldering part.

25. The packaged structure according to claim 16, wherein a first lead part is disposed at a second end of the second substrate and away from the first substrate, and the first lead part is electrically connected to the control unit, and wherein a second lead part is disposed at an end of the first substrate and away from the second substrate, and the second lead part is electrically connected to the power units.

26. The packaged structure according to claim 16, wherein a power unit of the power units comprises a power chip, and a surface of the power chip and that has a pin is away from the first substrate.

27. The packaged structure according to claim 16, further comprising: a housing, wherein the housing has accommodation space inside, and the first substrate and the second substrate are located inside the housing.

28. The packaged structure according to claim 27, wherein a first region on the housing and that corresponds to a second surface of the first substrate has a first notch, and wherein a second region on the housing and that corresponds to the control unit has a second notch.

29. The packaged structure according to claim 16, wherein a first heat sink is disposed on a second surface of the first substrate, and wherein a second heat sink is disposed on a surface of the control unit that faces away from the second substrate.

30. An electric power control system, comprising: a packaged structure, wherein the packaged structure is configured to convert a direct current of a battery into an alternating current to supply the alternating current to a power apparatus, the packaged structure comprising: a first substrate, wherein power units are disposed on a first surface of the first substrate; and a second substrate, wherein a control unit is disposed on a first surface of the second substrate, the second substrate is connected to a first end of the first substrate, the control unit is electrically connected to the power units, and the control unit is configured to: receive an external input signal, collect an internal sensing signal, and control the power units to work, wherein the first surface of the second substrate is disposed on a same side as the first surface of the first substrate.

31. The electric power control system according to claim 30, wherein the power units include a plurality of rows of power units that are disposed on the first substrate, each row of the plurality of rows of power units comprises at least one corresponding power unit arranged in a first direction, and corresponding power units in each row of the plurality of rows of power units are electrically connected by a first corresponding connecting part.

32. The electric power control system according to claim 31, wherein the first corresponding connecting part comprises a conductor, the conductor is in a multi-arch bridge shape, the conductor comprises a plurality of arch structures and a connecting part connected between adjacent arch structures, and the connecting part is electrically connected to the power units.

33. The electric power control system according to claim 30, wherein the control unit is electrically connected to the power units by a second connecting part, and the second connecting part comprises at least one flexible printed circuit board.

34. The electric power control system according to claim 33, wherein a conductive line is arranged on the second substrate, and the flexible printed circuit board is electrically connected to the control unit by the conductive line on the second substrate.

35. The electric power control system according to claim 30, wherein the first end of the second substrate is stacked on one end of the first substrate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG. 1 is a schematic diagram of a three-dimensional structure of a packaged structure according to an embodiment of this application;

[0035] FIG. 2 is a schematic diagram of a structure of a first surface of a first substrate in a packaged structure according to an embodiment of this application;

[0036] FIG. 3 is a schematic diagram of a side-view structure of a first substrate in a packaged structure according to an embodiment of this application;

[0037] FIG. 4 is a schematic assembly diagram of a control chip and a second substrate in a packaged structure according to an embodiment of this application;

[0038] FIG. 5 is a schematic diagram of a structure of a first surface of a second substrate in a packaged structure according to an embodiment of this application;

[0039] FIG. 6 is a schematic diagram of a connection relationship between a first substrate and a second substrate in a packaged structure according to an embodiment of this application;

[0040] FIG. 7 is a schematic diagram of a disposition position of a soldering part in a packaged structure according to an embodiment of this application;

[0041] FIG. 8 is a schematic diagram of a structure of a soldering part in a packaged structure according to an embodiment of this application;

[0042] FIG. 9 is a schematic diagram of another structure of a soldering part in a packaged structure according to an embodiment of this application;

[0043] FIG. 10 is a schematic diagram of another connection relationship between a first substrate and a second substrate in a packaged structure according to an embodiment of this application; and

[0044] FIG. 11 is a flowchart of a manufacturing method for a packaged structure according to an embodiment of this application.

REFERENCE NUMERALS

[0045] 100—first substrate; 200—second substrate; 300—first connecting part; 400—second connecting part; 500—first soldering part; 600—second soldering part; 700—first lead part; 800—second lead part; 900—heat dissipation element; 000—housing; 110—power unit; 210—control unit; 220—chip carrier; 310—conductor; 111—power chip; 211—control chip; 212—drive chip.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0046] The following describes in detail embodiments of this application with reference to accompanying drawings.

[0047] For ease of understanding, an application scenario of a packaged structure that the embodiments of this application relate is first described. The packaged structure provided in the embodiments of this application is adaptable to an electric control system, for example, an in-vehicle electric power control system. The packaged structure may be specifically integrated into an electric vehicle, for example, may be used as a three-phase full-bridge inverter of a motor drive controller, to convert a direct current of a battery into an alternating current and then supply the alternating current to a motor. An existing packaged structure for a power module has only a power part, and therefore has relatively low integration and intelligence. In addition, the power part is electrically connected to a circuit board through metal wire bonding. On one hand, because a metal wire has a relatively large quantity of wire types and wire diameter types, there are a relatively large quantity of manufacturing process steps and device investments, causing not only relatively low manufacturing efficiency but also a relatively high failure rate. On the other hand, because a relatively large quantity of chips are integrated into the power part, when electrodes on the chips are connected to pins on the circuit board through metal wire bonding, a relatively large quantity of conducting wires are used and densely arranged. Consequently, there are risks such as wire sagging and a short-circuit due to wire sweep in a packaging process.

[0048] Based on this, the embodiments of this application provide a packaged structure. The packaged structure can package a signal part and a power part together, and therefore has relatively high product integration. In addition, in the packaged structure, the power part and the signal part are separately disposed, so that thermal interference caused by the power part to the signal part can be reduced, thereby improving product working reliability.

[0049] First, refer to FIG. 1. FIG. 1 is a schematic diagram of a three-dimensional structure of a packaged structure according to an embodiment of this application. As shown in FIG. 1, as an optional embodiment of this application, the packaged structure may include a first substrate 100 and a second substrate 200. A plurality of spaced power units 110 are disposed on a first surface of the first substrate 100. The plurality of power units 110 may be electrically connected by using a first connecting part 300. The plurality of power units 110 constitute a power part of a power module as a whole. The second substrate 200 is connected to one end of the first substrate 100. A control unit 210 is disposed on a first surface of the second substrate 200. The control unit 210 may be electrically connected to the power units 110 by using a second connecting part 400. The control unit 210 is a signal part of the power module.

[0050] In this embodiment, the power units 110 are disposed on the first substrate 100, the control unit 210 is disposed on the second substrate 200, and the second substrate 200 is connected to the first substrate 100, so that the signal part and the power part are integrated to meet product requirements for high integration and intelligence. In addition, the first substrate 100 and the second substrate 200 are independent of each other, so that the signal part and the power part can be separately disposed, to reduce thermal interference caused by the power part to the signal part during working, alleviate heat transmission and a temperature shock caused by a region in which the power part is located to a region in which the signal part is located, and prevent performance of the signal part from failing due to high temperature damage, thereby improving product reliability, and prolonging a product service life.

[0051] The plurality of power units no may be of an evenly-spaced and symmetrical spatial layout structure. During specific implementation, the plurality of power units 110 may be arranged into a plurality of rows in a direction from one end of the first substrate 100 to the other end of the first substrate 100 at a same row spacing, and there may be at least two power units 110 in each row. The direction from one end of the first substrate 100 to the other end of the first substrate 100 is defined as a first direction x, and the plurality of rows of power units 110 may be symmetrically distributed with respect to a midline of the first substrate 100 in the first direction. Power units 110 in a same row may be electrically connected by using one first connecting part 300.

[0052] During specific implementation, the power units 110 may be power chips 111. A metal-oxide-semiconductor field-effect transistor (MOSFET) may be selected as the power chip 11. For example, the power chip 11 may be specifically a silicon (Si), silicon carbide (SiC), or gallium nitride (GaN) MOSFET. The control unit 210 may include a control chip 211. For example, the control chip 211 may be an application-specific integrated circuit (ASIC) chip, or a digital signal processing (DSP) chip. The control unit 210 may further include a drive chip 212. In this case, both the control chip 211 and the drive chip 212 may be disposed on the second substrate 200. When both the control chip 211 and the drive chip 212 are disposed on the second substrate 200, the control chip 211 may be configured to receive an external input signal, for example, a control signal. After the control signal is processed by the control chip 211, a processed signal is sent to the drive chip 212. The drive chip 212 performs processing such as amplification, isolation, and filtering on the signal, and then sends a processed signal to the power chips 111 by using the second connecting part 400, to control the plurality of power chips in to execute a power-on instruction, a power-off instruction, or the like. The control chip 211 is also configured to: collect temperature information of the power chips in, temperature information of a chip-related accessory on the first substrate 100, and current information of the power chips in; and send the collected initial information, or perform processing and determining on the collected initial information and then send information obtained after the processing and determining.

[0053] A high thermal conductivity substrate with a relatively thick conductive material on both sides may be used as the first substrate 100, to adapt to a high-temperature usage scenario. For example, the first substrate 100 may be specifically a direct bond copper (DBC) ceramic substrate, a direct bond aluminum (DBA) ceramic substrate, an active metal brazing (AMB) aluminum nitride (AlN) or silicon nitride (Si.sub.3N.sub.4) ceramic substrate, or a zirconia toughened alumina (ZTA) direct bond copper (DBC) ceramic substrate. A thickness of a surface copper layer of the first substrate 100 is optionally 0.1 mm to 1.2 mm. For example, the thickness of the surface copper layer may be 0.1 mm, 1.05 mm, or 1.2 mm. For example, a printed circuit board (PCB) may be used as the second substrate 200. Alternatively, the foregoing DBC or DBA ceramic substrate, a direct plating copper (DPC) ceramic substrate, or the like may be used as the second substrate 200. A double-sided conductive material of the second substrate 200 may be thinner than that of the first substrate 100.

[0054] During specific implementation, a first conductive line is arranged on the first substrate 100, and a half-bridge circuit may be used as the first conductive line. The power chips 111 are electrically connected to the first conductive line arranged on the first substrate 100, thereby connecting the plurality of power chips 111 in parallel. The power chip 111 may be installed on the first substrate 100 in a bond pad up manner, that is, a surface that is of the power chip 111 and that has a pin is disposed away from the first substrate 100. During specific implementation, the power chip 111 may be fastened to the first substrate 100 through adhering.

[0055] In this embodiment, a flexible printed circuit board (FPC) may be used as the second connecting part 400. Based on the foregoing description, the PCB may be used as the second substrate 200, and the second connecting part 400 is electrically connected to the second substrate 200, that is, the FPC is electrically connected to the PCB. The power chips 111 may be electrically connected to the second substrate 200 by using cables laid out on the second connecting part 400, to be electrically connected to the control chip 211 by using cables laid out on the second substrate 200. Compared with a conducting wire connection manner, in this embodiment, the cables are laid out on the FPC, so that symmetrical line distribution can be implemented. The cable layout is not limited to laying out cables along a straight line. Therefore, the second connecting part 400 can be equidistantly connected to the power chips 111, to optimize a line arrangement in which the plurality of power chips 111 are connected in parallel, thereby achieving high layout symmetry. In addition, because the FPC can be manufactured into a regular plate-like structure, the control unit 210 can be connected to the power units 110 by using a relatively short line, to reduce a parasitic inductance; and further, a wire sagging risk can be reduced.

[0056] During specific implementation, the second connecting part 400 may be of a single-layer plate structure, or may be of a stacked multi-layer plate structure, and may be specifically designed based on a quantity of arranged lines. This is not limited in this application. A substrate of the second connecting part 400 may be made of a resinous material or a polyimide (PI) material. In addition, the second connecting part 400 may be one integral FPC, or may include a plurality of FPCs, and may be specifically designed based on an internal layout of the packaged structure. This is also not limited in this application.

[0057] With reference to the foregoing embodiment, arrangement and connection of the power chips 111 are described by using an example in which eight power chips 111 are included. The eight power chips 111 may be divided into two groups, each group may include four power chips 111, and drains of the two groups of power chips 111 are electrically connected by using the half-bridge circuit on the first substrate 100. In addition, the four power chips 111 in each group may be arranged into two rows, and sources of power chips 111 in each row are electrically connected by using one first connecting part 300. Gates of power chips 111 in a same group are further electrically connected to a second conductive line on the second substrate 200 by using the second connecting part 400, so that all the power chips 111 are electrically connected to the control chip 211 and the drive chip 212, and the control chip 211 can control all the power chips 111 to execute a power-on instruction, a power-off instruction, or the like.

[0058] Next, refer to FIG. 2 and FIG. 3. FIG. 2 is a schematic diagram of a structure of the first surface of the first substrate in the packaged structure according to an embodiment of this application. FIG. 3 is a schematic diagram of a side-view structure of the first substrate in the packaged structure according to an embodiment of this application. In the embodiments of this application, a conductor 310 may be used as the first connecting part. The conductor 310 may connect the plurality of power chips 111 together in parallel to meet requirements for power-on/off and heat dissipation. Compared with a manner in which a power chip 111 is electrically connected to a substrate through metal wire bonding in the conventional technology, in this embodiment, the conductor 310 is in a solid shape and is at a stable position after connection, so that wire sagging or a short-circuit due to wire sweep is not likely to occur, and reliability is relatively high. In addition, the conductor 310 has simple installation and manufacturing processes, and therefore also has relatively low manufacturing costs. Furthermore, the conductor 310 also has a relatively low contact resistance, thereby helping reduce energy consumption of the power part.

[0059] During specific implementation, the conductor 310 may be in a multi-arch bridge shape. The conductor 310 may include a plurality of arch structures and a connecting part connected between adjacent arch structures, and the connecting part may be configured to be connected to the power chip 111. During specific disposition, a soldering joint may be disposed on the connecting part, so that the conductor 310 can be electrically connected to the pin of the power chip 11 in a soldering manner. A material of the conductor 310 is not limited, for example, may be copper, copper-aluminum alloy, or copper-molybdenum alloy, or may be a material such as silicon carbide aluminum (AlSiC).

[0060] Next, refer to FIG. 4. FIG. 4 is a schematic assembly diagram of the control chip and the second substrate in the packaged structure according to an embodiment of this application. The second conductive line may be arranged on the second substrate 200, the second conductive line may be of a single-layer cable layout or a multi-layer cable layout, and a cable layout circuit may be laid out based on the control unit and an interfacing manner of the control unit. The control chip 211 is electrically connected to the second conductive line arranged on the second substrate 200. As shown in FIG. 4, the control chip 211 may be mounted onto the second substrate 200 in a bond pad flip manner, that is, a surface that is of the control chip 211 and that has a pin is disposed towards the second substrate 200, and the pin is electrically connected to the second conductive line on the second substrate 200. In this embodiment, the control chip 211 is installed in the bond pad flip manner, so that a wiring line can be shortened. This can reduce signal interference and reduce a parasitic parameter, and can further shorten a signal latency, to ensure a fast circuit response and a timely protection function response. In addition, this disposition manner can further avoid risks such as wire sagging due to a dense cable layout and a short-circuit due to wire sweep, and can also save cable layout space to help reduce a size of the second substrate 200.

[0061] It may be understood that when both the control chip 211 and the drive chip are disposed on the second substrate 200, the drive chip may also be mounted onto the second substrate 200 in the bond pad flip manner, and a pin of the drive chip is electrically connected to the second conductive line on the second substrate 200. The control chip 211 receives an external input signal and an internal feedback signal. After the signals are processed by the control chip 211, processed signals may be sent to the drive chip by using the second conductive line, and then the drive chip sends the signals to the power chips 111 by using the second conductive line and the second connecting part 400.

[0062] In the foregoing solution, both the control chip 211 and the drive chip may be electrically connected to the second substrate 200 by using the second conductive line on the second substrate 200. Therefore, no external connecting wire needs to be disposed on the second substrate 200, so that product requirements for high integration, high reliability, intelligence, and miniaturization can be met. From a process perspective, device investment costs can also be reduced, thereby improving production efficiency and a product yield.

[0063] As an optional solution, a heat dissipation element 900 may be installed on a surface that is of the control chip 211 and that faces away from the second substrate 200. Heat generated by the control chip 211 during working may be dissipated to the outside by using the heat dissipation element 900, thereby helping ensure performance and a service life of the control chip 211. When both the control chip 211 and the drive chip are disposed on the second substrate 200, a heat dissipation element 900 may also be installed on a surface that is of the drive chip and that faces away from the second substrate 200. The heat dissipation element 900 may be installed on the back of the control chip 211 or the drive chip through adhering. The heat dissipation element 900 may be specifically a heat dissipation patch. A graphite sheet or the like may be used as the heat dissipation patch.

[0064] Next, refer to FIG. 5. FIG. 5 is a schematic diagram of a structure of the first surface of the second substrate in the packaged structure according to an embodiment of this application. As shown in FIG. 5, chip carriers 220 may be further disposed corresponding to installation positions of the control chip and the drive chip on the second substrate 200, and the chip carriers 220 are disposed on the first surface of the second substrate 200. The chip carrier 220 includes a plurality of bumps, configured to be interconnected to pins of the control chip or the drive chip, to facilitate fast installation of the control chip and the drive chip. A quantity of bumps included in the chip carrier 220 and a bump distribution status may be set through matching based on an installed chip.

[0065] Refer to FIG. 6 together. FIG. 6 is a schematic diagram of a connection relationship between the first substrate and the second substrate in the packaged structure according to an embodiment of this application. As shown in FIG. 6, in the first direction, the second substrate 200 has a first end away from the first substrate 100. A first lead part 700 may be disposed in a region that is on the first surface of the second substrate 200 and that is close to the first end. The first lead part 700 is electrically connected to the second conductive line arranged on the second substrate 200, to be electrically connected to the control chip 211 and the drive chip. The control chip 211 may receive an external control signal by using the first lead part 700. One end of the second connecting part 400 is connected to the first surface of the second substrate 200, and is electrically connected to the control chip 211 and the drive chip by using the second conductive line. The power chips 111 are installed on the first surface of the first substrate 100. It should be noted that the first surface of the first substrate 100 is disposed on a same side as the first surface of the second substrate 200. In addition, in the first direction, the first substrate 100 has a second end away from the second substrate 200, a second lead part 800 may be disposed in a region that is on the first surface of the first substrate 100 and that is close to the second end, and the second lead part 800 is electrically connected to the first conductive line arranged on the first substrate 100, to be electrically connected to the power chips 111.

[0066] During specific implementation, a bare copper frame or an electroplated frame may be used for the lead part. A shape of an end part of the lead part may be a planer shape, or may be a step shape with a bend.

[0067] In a specific application scenario, the second lead part 800 may be connected to an external power supply battery and an external load. During specific implementation, the second lead part 800 may have three wiring terminals. Two wiring terminals may be respectively connected to a positive electrode and a negative electrode of the battery, and the other wiring terminal may be connected to the load as an output terminal.

[0068] Refer to FIG. 7 together. FIG. 7 is a schematic diagram of a disposition position of a soldering part in the packaged structure according to an embodiment of this application. As shown in FIG. 7, the connection relationship between the second substrate 200 and the first substrate 100 may be that the second substrate 200 is stacked on the first substrate 100. In the first direction, an end that is of the second substrate 200 and that is close to the first substrate 100 may be stacked on the first surface of the first substrate 100, and the second substrate 200 may be disposed in parallel to the first substrate 100. The second substrate 200 may be physically connected to the first substrate 100 in a soldering manner, so that the two substrates structurally become a whole. During specific implementation, a first soldering part 500 may be disposed on the second surface of the second substrate 200, and a second soldering part 600 may be disposed on the first surface of the first substrate 100. The second substrate 200 can be fastened to the first substrate 100 only by soldering the first soldering part 500 to the second soldering part 600.

[0069] In some other embodiments, an end that is of the second substrate 200 and that is close to the first substrate may be alternatively stacked under a second surface of the first substrate 100. When the two substrates are connected in a soldering manner, a first soldering part 500 may be disposed on the first surface of the second substrate 200, and a second soldering part 600 may be disposed on the second surface of the first substrate 100.

[0070] Next, refer to FIG. 8 and FIG. 9. FIG. 8 is a schematic diagram of a structure of the soldering part in the packaged structure according to an embodiment of this application. FIG. 9 is a schematic diagram of another structure of the soldering part in the packaged structure according to an embodiment of this application. During specific implementation, as shown in FIG. 8, the first soldering part 500 and the second soldering part may be in a strip shape. Alternatively, as shown in FIG. 9, the first soldering part 500 and the second soldering part each may be formed by arranging a plurality of soldering bumps. When the first substrate is assembled to the second substrate 200, a position of the first soldering part 500 may be enabled to correspond to that of the second soldering part, to complete soldering of the two substrates. When both the first soldering part 500 and the second soldering part are in a strip shape, or when one of the first soldering part 500 and the second soldering part is in a strip shape and the other soldering part is formed by arranging a plurality of soldering bumps, alignment difficulty between the first soldering part 500 and the second soldering part is relatively low. When the first soldering part 500 and the second soldering part each are formed by arranging a plurality of soldering bumps, a quantity of soldering bumps of the first soldering part 500 may be the same as a quantity of soldering bumps of the second soldering part, and there may be a same spacing between adjacent soldering bumps, so that soldering bumps of the first soldering part 500 may be disposed in a one-to-one correspondence with soldering bumps of the second soldering part, thereby more reliably connecting the first soldering part 500 to the second soldering part.

[0071] With reference to the schematic diagram of the connection relationship between the first substrate and the second substrate in the packaged structure according to the embodiment of this application in FIG. 6, in an embodiment, the whole formed by connecting the first substrate 100 and the second substrate 200 is disposed in a housing 000, so that the signal part and the power part are packaged together by using the housing 000. The second surface of the first substrate 100, that is, an opposite surface of a surface that is of the first substrate 100 and on which the power chips 111 are disposed may be completely or partially exposed to the outside of the housing 000. A specific implementation may be disposing a notch in a region that is on the housing 000 and that corresponds to the second surface of the first substrate 100. The back of the control chip 211, that is, the surface that is of the control chip 211 and on which the heat dissipation element may be installed may be completely or partially exposed to the outside of the housing 000. In other words, the heat dissipation element on the back of the control chip 211 may be completely or partially exposed. Specifically, a notch may be disposed in a region that is on the housing 000 and that corresponds to the control chip 211. Likewise, when both the control chip 211 and the drive chip are installed on the second substrate 200, the heat dissipation element on the back of the drive chip may also be completely or partially exposed. Specifically, a notch may be disposed in a region that is on the housing 000 and that corresponds to the drive chip. The notch may be integrally formed during formation of the housing 000 according to a preset design, or may be formed by removing a material based on a specific corresponding region after the housing 000 is formed.

[0072] Based on the foregoing description, the first connecting part 300 and the second connecting part 400 are wrapped in the housing 000. A pin part that is of the first lead part 700 and that is connected to the second substrate 200 and a pin part that is of the second lead part 800 and that is connected to the first substrate 100 may also be wrapped in the housing 000.

[0073] During specific implementation, the housing 000 may be formed through injection molding or potting of an epoxy molding compound (EMC). This material has a strong capability of resisting a high temperature and aging, and has relatively low costs. A coefficient of thermal expansion of the epoxy molding compound is optionally 9×10.sup.−6/° C. to 17×10.sup.−6/° C. Within this range, overall warpage of the packaged structure can be conveniently controlled, thereby ensuring installation flatness and reliability of the packaged structure.

[0074] In addition, external heat sinks may be further disposed on the second surface of the first substrate 100, the back of the control chip 211, and the back of the drive chip that are exposed to the outside of the housing 000, to enhance an overall heat dissipation capability of the packaged structure. During specific implementation, the heat sink may be a heat dissipation metal plate of an air-cooled heat sink or a water-cooled heat sink. It should be noted that the heat dissipation element on the back of the control chip 211 and the heat dissipation element on the back of the drive chip may exist together with the heat sinks.

[0075] FIG. 10 is a schematic diagram of another connection relationship between the first substrate and the second substrate in the packaged structure according to an embodiment of this application. As shown in FIG. 10, the connection relationship between the second substrate 200 and the first substrate 100 may be alternatively that the second substrate 200 is disposed against the first substrate 100. During specific implementation, in the first direction, an end surface of an end that is of the second substrate 200 and that is close to the first substrate 100 abuts against an end surface of an end that is of the first substrate 100 and that is close to the second substrate 200, thereby connecting the second substrate 200 to the first substrate 100. Similarly, the second substrate 200 may be physically connected to the first substrate 100 in a soldering manner, so that the two substrates structurally become a whole. During specific implementation, a first soldering part may be disposed on the end surface of the second substrate 200, and a second soldering part may be disposed on the end surface of the first substrate. The second substrate 200 can be fastened to the first substrate 100 only by soldering the first soldering part to the second soldering part.

[0076] FIG. 11 is a flowchart of a manufacturing method for a packaged structure according to an embodiment of this application. The packaged structure shown in FIG. 6 is used as an example below to describe a manufacturing method for the packaged structure.

[0077] First, a plurality of power chips 111 are installed on a first substrate 100 in a plurality of rows in a first direction. The power chip 11 may be installed on a first surface of the first substrate 100 in a bond pad up manner. A control chip 211 and a drive chip are installed on a second substrate 200. The control chip 211 and the drive chip may be installed on a first surface of the second substrate 200 in a bond pad flip manner, and the control chip 211 and the drive chip are electrically connected by using a second conductive line on the second substrate 200.

[0078] Solder is printed on an end that is of the first substrate 100 and that is in the first direction, the solder is printed on an end that is of the second substrate 200 and that is in the first direction, and the end that is of the first substrate 100 and on which the solder is printed is soldered to the end that is of the second substrate 200 and on which the solder is printed, so that the first substrate 100 and the second substrate 200 form a whole.

[0079] When solder paste is used as the solder, the first substrate 100 and the second substrate 200 that are connected to become the whole may be placed in a reflow oven for reflow soldering. When sintered silver is used as the solder, the first substrate 100 and the second substrate 200 that are connected to become the whole may be placed in an oven for high temperature baking, to enhance connection stability between the first substrate 100 and the second substrate 200. In some other embodiments, high thermal conductivity silver paste, electroless nickel/immersion gold (ENIG), plated nickel, plated gold, or the like may be alternatively used as the solder.

[0080] In the first direction, power chips 111 in a same row are electrically connected to each other by using a first connecting part 300.

[0081] The power chips 111 are electrically connected to the second conductive line on the second substrate 200 by using a second connecting part 400, to electrically connect the power chips 111 to the control chip 211 and the drive chip.

[0082] A first lead part 700 is electrically connected to an end that is of the second substrate 200 and that is away from the first substrate 100, and a second lead part 800 is electrically connected to an end that is of the first substrate 100 and that is away from the second substrate 200.

[0083] Plastically packaging is performed on the first substrate 100 and the second substrate 200 that are connected to become the whole, so that plastically packaging is performed on the first substrate 100, the second substrate 200, the power chips 111, the control chip 211, the drive chip, the first connecting part 300, the second connecting part 400, a pin part that is of the first lead part 700 and that is connected to the second substrate 200, and a pin part that is of the second lead part 800 and that is connected to the first substrate 100. For a component or a region that requires heat dissipation, for example, plastically packaging regions corresponding to a second surface of the first substrate 100, the back of the control chip 211, and the back of the drive chip, a plastically packaging compound may be removed after the plastically packaging, to expose the heat dissipation surfaces, so that external heat sinks can be installed. During specific implementation, the first substrate 100 and the second substrate 200 that are connected to become the whole may be placed in a plastically packaging mold, the plastically packaging compound in a molten state may be injected into the plastically packaging mold to wrap the foregoing parts on which plastically packaging needs to be performed, and a part obtained after the plastically packaging is placed in an oven for baking and curing and then an extra spillage part is removed.

[0084] In addition, the manufacturing method may further include other steps. Examples are as follows:

[0085] After the plastically packaging, the packaged structure is preliminarily cleaned, and specifically, may be cleaned by using water-based solder in cooperation with pure water, or by using chemical solder in cooperation with a chemical agent. After the preliminary cleaning, plasma cleaning may be further performed to remove foreign matters on a surface of the plastically packaging structure, thereby enhancing a plastically packaging binding force.

[0086] After the plastically packaging, for pins that are of the first lead part 700 and the second lead part 800 and that are exposed to the outside of the plastically packaging compound, extra parts are cut off, and the pins are formed.

[0087] The pin parts that are of the first lead part 700 and the second lead part 800 and that are exposed to the outside of the plastically packaging compound are electroplated. For example, tin may be plated on the pin parts, to facilitate subsequent wiring.

[0088] A functional test is performed on a product, and a qualified product is packed into a warehouse as required.