Merged PiN Schottky (MPS) Diode With Plasma Spreading Layer And Manufacturing Method Thereof

Abstract

A method for manufacturing a merged PiN Schottky (MPS) diode may include steps of providing a substrate having a first conductivity type; forming an epitaxial layer with the first conductivity type on top of the substrate; forming a plurality of regions with a second conductivity type under a top surface of the epitaxial layer; forming a plasma spreading layer; depositing and patterning a first Ohmic contact metal on the regions with the second conductivity type; depositing a Schottky contact metal on top of the entire epitaxial layer; and forming a second Ohmic contact metal on a backside of the substrate. In another embodiment, the step of forming a plurality of regions with a second conductivity type may include steps of depositing and patterning a mask layer on the epitaxial layer, implanting P-type dopant into the epitaxial layer, and removing the mask layer.

Claims

1. A semiconductor device comprising: a substrate having a first conductivity type; an epitaxial layer having the first conductivity type deposited on one side of the substrate; a plurality of regions having a second conductivity type formed under a top surface of the epitaxial layer; a first Ohmic metal patterned and deposited on top of the regions with the second conductivity type; a Schottky contact metal deposited on top of the entire epitaxial layer to form a Schottky junction; and a second Ohmic metal deposited on a backside of the substrate, wherein a plasma spreading layer is formed in each of the regions, and the plasma spreading layer is configured to diffuse plasma when a surge current occurs, so the surge current and heat generated inside the semiconductor device can be evenly and efficiently dispersed over the semiconductor device.

2. The semiconductor device of claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type; and each of the regions is a P+ region.

3. The semiconductor device of claim 1, wherein the semiconductor device is a merged PiN Schottky (MPS) diode.

4. The semiconductor device of claim 2, wherein a PN junction formed between each of the P+ regions and N-type drift regions is turned on when the surge current occurs, and plasmas are generated under the PN junction.

5. The semiconductor device of claim 2, wherein each P+ region has a plurality of hexagonal cells with one or more P+ rings and a plasma spreading layer that has a plurality of P+ type diagonal lines passing through the hexagonal cells and P+ rings.

6. The semiconductor device of claim 2, wherein the plasma spreading layer can be formed in other shapes.

7. The semiconductor device of claim 4, wherein each P+ region has a plurality of hexagonal cells with one or more P+ rings and a plasma spreading layer that has a plurality of P+ type diagonal lines passing through the hexagonal cells and P+ rings.

8. The semiconductor device of claim 4, wherein the plasma spreading layer can be formed in other shapes.

9. A method for manufacturing a merged PiN Schottky (MPS) diode comprising steps of: providing a substrate having a first conductivity type; forming an epitaxial layer with the first conductivity type on top of the substrate; forming a plurality of regions with a second conductivity type under a top surface of the epitaxial layer; forming a plasma spreading layer in each region; depositing and patterning a first Ohmic contact metal on the regions with the second conductivity type; depositing a Schottky contact metal on top of the entire epitaxial layer; and forming a second Ohmic contact metal on a backside of the substrate, wherein the plasma spreading layer is configured to diffuse plasma when a surge current occurs, so the surge current and heat generated inside the semiconductor device can be evenly and efficiently dispersed over the MPS diode.

10. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 9, wherein the first conductivity type is N-type and the second conductivity type is P-type; and each of the regions is a P+ region.

11. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 10, wherein a PN junction formed between each of the P+ regions and N− type drift regions is turned on when the surge current occurs, and plasmas are generated under the PN junction.

12. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 10, wherein each P+ region has a plurality of hexagonal cells with one or more P+ rings, and a plasma spreading layer that has a plurality of P+ type diagonal lines passing through the hexagonal cells and P+ rings.

13. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 9, wherein the plasma spreading layer can be formed in other shapes.

14. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 11, wherein each P+ region has a plurality of hexagonal cells with one or more P+ rings, and a plasma spreading layer that has a plurality of P+ type diagonal lines passing through the hexagonal cells and P+ rings.

15. The method for manufacturing a merged PiN Schottky (MPS) diode of claim 10, wherein the plasma spreading layer can be formed in other shapes.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 is a cross-section view of the merged PiN Schottky (MPS) diode in the present invention.

[0018] FIG. 2 is a schematic view of a layout design of a merged PiN Schottky (MPS) diode with two types of hexagonal cells.

[0019] FIG. 3 is a schematic view of a merged PiN Schottky (MPS) diode with a first type of plasma spreading layer.

[0020] FIG. 4 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 3 with one layer of hexagonal cells between the adjacent plasma spreading layer.

[0021] FIG. 5 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 3 with two layers of hexagonal cells between the adjacent plasma spreading layer.

[0022] FIG. 6 is a schematic view of a merged PiN Schottky (MPS) diode with a second type of plasma spreading layer.

[0023] FIG. 7 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 6 with one layer of hexagonal cells between the adjacent plasma spreading layer.

[0024] FIG. 8 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 6 with two layers of hexagonal cells between the adjacent plasma spreading layer.

[0025] FIG. 9 is a schematic view of a merged PiN Schottky (MPS) diode with a third type of plasma spreading layer.

[0026] FIG. 10 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 9 with one layer of hexagonal cells between the adjacent plasma spreading layer.

[0027] FIG. 11 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 9 with two layers of hexagonal cells between the adjacent plasma spreading layer.

[0028] FIG. 12 is a schematic view of a merged PiN Schottky (MPS) diode with a fourth type of plasma spreading layer.

[0029] FIG. 13 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 12 with one layer of hexagonal cells between the adjacent plasma spreading layer.

[0030] FIG. 14 is a schematic view of the merged PiN Schottky (MPS) diode in FIG. 12 with two layers of hexagonal cells between the adjacent plasma spreading layer.

[0031] FIG. 15 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 6.

[0032] FIG. 16 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 7.

[0033] FIG. 17 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 8.

[0034] FIG. 18 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 12.

[0035] FIG. 19 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 13.

[0036] FIG. 20 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer after symmetric transformation of plasma spreading layer shown in FIG. 14.

[0037] FIG. 21 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer with the combination of the plasma spreading layers shown in FIGS. 3 and 15.

[0038] FIG. 22 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer with the combination of the plasma spreading layers shown in FIGS. 4 and 16.

[0039] FIG. 23 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer with the combination of the plasma spreading layers shown in FIGS. 5 and 17.

[0040] FIG. 24 is a schematic view of a merged PiN Schottky (MPS) diode with a cross-networking plasma spreading layer with the combination of the plasma spreading layers shown in FIGS. 9 and 18.

[0041] FIG. 25 is a schematic view of a merged PiN Schottky (MPS) diode with an alternative cross-networking plasma spreading layer.

[0042] FIG. 26 is a schematic view of a merged PiN Schottky (MPS) diode with another cross-networking plasma spreading layer.

[0043] FIGS. 27A to 27G illustrate flow diagrams of the method for manufacturing a merged PiN Schottky (MPS) diode in the present invention.

[0044] FIG. 28 is a block diagram illustrating the method for manufacturing a merged PiN Schottky (MPS) diode in the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0045] The detailed description set forth below is intended as a description of the presently exemplary device provided in accordance with aspects of the present invention and is not intended to represent the only forms in which the present invention may be prepared or utilized. It is to be understood, rather, that the same or equivalent functions and components may be accomplished by different embodiments that are also intended to be encompassed within the spirit and scope of the invention.

[0046] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood to one of ordinary skill in the art to which this invention belongs. Although any methods, devices and materials similar or equivalent to those described can be used in the practice or testing of the invention, the exemplary methods, devices and materials are now described.

[0047] All publications mentioned are incorporated by reference for the purpose of describing and disclosing, for example, the designs and methodologies that are described in the publications that might be used in connection with the presently described invention. The publications listed or discussed above, below and throughout the text are provided solely for their disclosure prior to the filing date of the present application. Nothing herein is to be construed as an admission that the inventors are not entitled to antedate such disclosure by virtue of prior invention.

[0048] As used in the description herein and throughout the claims that follow, the meaning of “a”, “an”, and “the” includes reference to the plural unless the context clearly dictates otherwise. Also, as used in the description herein and throughout the claims that follow, the terms “comprise or comprising”, “include or including”, “have or having”, “contain or containing” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. As used in the description herein and throughout the claims that follow, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.

[0049] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the embodiments. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

[0050] In one aspect as shown in FIG. 1, a merged PiN Schottky (MPS) diode 10 may include a silicon carbide substrate 12 having a first conductivity type, an epitaxial layer 13 with the first conductivity type formed on the substrate 12. In one embodiment, the doping concentration in the epitaxial layer 13 is lower than that in the substrate 12. The merged PiN Schottky (MPS) diode 10 may further include a plurality of regions 14 having a second conductivity type different from the first conductivity type, and formed on the surface of the epitaxial layer 13.

[0051] A first Ohmic contact metal 18 is formed on top of each of the regions of the second conductivity type, and a Schottky contact metal 19 is placed on top of the entire epitaxial layer 13 to form a Schottky junction 16. A second Ohmic contact 17 is formed by a cathode electrode 11 on the back side of the substrate 12.

[0052] In one embodiment, the first conductivity is N type, and the second conductivity type is P type. It is noted that in the merged PiN Schottky (MPS) diode structure, a PN junction can be formed by a P+ region 14, and a N-type drift region 15 can be turned on under surge current condition, forming a parallel operation mode between the PN junction and the Schottky junction 16, providing device with better surge current capability.

[0053] It is noted that the layout design of the merged PiN Schottky (MPS) diode 10 can be strip cell structure, circle cell structure or polygon cell structure. The one-dimensional strip structure has the drawback that the P+ region occupies too much active area, resulting in insufficient Schottky area for normal current operation, leading to a large forward voltage drop of the device. However, two-dimensional circles will also leads to a large P+ percentage because circular cells cannot form a close-packed layout. Therefore, compared with regular polygon cell structure, the device will also have larger forward voltage drop due to inadequate Schottky area under normal current operation.

[0054] In one embodiment, FIG. 2 illustrates a merged PiN Schottky (MPS) diode structure, and as shown in FIG. 3, a plasma spreading layer is being introduced on the MPS diode in FIG. 2. The plasma spreading layer design can connect the P+ hexagonal islands and the outer P+ rings. During surge current shock, the PN junction formed by the large P+ hexagon region 14 and N-type drift layer 15 is first turned on, then the bipolar effect takes place and the electron-holes are created. With the plasma spreading layer, the electron-hole plasma can be dispersed to the whole area of the device, so the high surge current and dissipated energy can be evenly distributed within the device to effectively prevent the device from being damaged caused by localized heating, and to improve the surge current capability of the device.

[0055] According to FIG. 3, the merged PiN Schottky (MPS) diode with different arrangements of the plasma spreading layer can be obtained, as shown in FIGS. 4 and 5. Furthermore, there can be n layers of hexagonal cells between the adjacent the plasma spreading layers, where n can be 0 to 200.

[0056] As shown in FIG. 6 for a second embodiment, a plasma spreading layer can be rotated by 60 degrees from that in FIG. 3. According to FIG. 6, the merged PiN Schottky (MPS) diode with different arrangements of the plasma spreading layer can be obtained, as shown in FIGS. 7 and 8. Furthermore, there can be n layers of hexagonal cells between the adjacent plasma spreading layer, where n can be 0 to 200.

[0057] FIG. 9 shows a third embodiment of a plasma spreading layer in the present invention. Similarly, the merged PiN Schottky (MPS) diode with different arrangements of the plasma spreading layer can be obtained, as shown in FIGS. 10 and 11. Furthermore, there can be n layers of hexagonal cells between the adjacent plasma spreading layer, where n can be 0 to 200.

[0058] As shown in FIG. 12 for a fourth embodiment, a plasma spreading layer can be rotated by 60 degrees from that in FIG. 9. According to FIG. 12, the merged PiN Schottky (MPS) diode with different arrangements of the plasma spreading layer can be obtained, as shown in FIGS. 13 and 14. Furthermore, there can be n layers of hexagonal cells between the adjacent plasma spreading layer, where n can be 0 to 200.

[0059] As shown in FIG. 15 for a fifth embodiment, a merged PiN Schottky (MPS) diode with a plasma spreading layer obtained by symmetric transformation. For instance, the plasma spreading layer shown in FIG. 15 is obtained by the symmetric transformation of the plasma spreading layer stricture shown in FIG. 6; and FIGS. 16 and 17 show different arrangements of the plasma spreading layer of the fifth embodiment on the MPS diode.

[0060] Similarly, a sixth embodiment of a layout design shown in FIG. 18 can be obtained after the symmetric transformation of the plasma spreading layer in FIG. 12; and FIGS. 19 and 20 show different arrangements of the plasma spreading layer of the sixth embodiment on the MPS diode.

[0061] In addition to the symmetric transformation of rotated plasma spreading layer, based on the different design shown in FIG. 3 to FIG. 20, more layout designs with new cross-networking plasma spreading layer structure can be obtained through different combinations. Four instances are provided in FIGS. 21 to 26. It is important to note that the design of the plasma spreading layers in the present invention are also applicable to other hexagonal cells designs that may not be shown here. Moreover, the design of the plasma spreading layers in the present invention can also be applied to different geometric cells, such as circular cells, regular octagonal cells and other polygonal cells.

[0062] In another aspect, as shown in FIGS. 27A to 27G, and 28, a method for manufacturing a merged PiN Schottky (MPS) diode may include steps of providing a substrate having a first conductivity type 210; forming an epitaxial layer with the first conductivity type 220 on top of the substrate; forming a plurality of regions with a second conductivity type under a top surface of the epitaxial layer 230; forming a plasma spreading layer in each region 240; depositing and patterning an Ohmic contact metal on the regions with the second conductivity type 250; depositing a Schottky contact metal on top of the entire epitaxial layer 260; and forming an Ohmic contact metal on a backside of the substrate 270.

[0063] In one embodiment, the epitaxial layer is made of N-type silicon carbide. In another embodiment, the step of forming a plurality of regions with a second conductivity type under a top surface of the epitaxial layer 230 may include steps of depositing and patterning a mask layer 20 on the epitaxial layer 2301, implanting P-type dopant into the epitaxial layer 2302, and removing the mask layer 2303. It is noted that the dopant can be aluminum or boron.

[0064] In a further embodiment, the step of depositing and patterning an Ohmic contact metal on the regions 240 may include a step of annealing the Ohmic metal to enable the metal to be in direct contact with the epitaxial layer. In still a further embodiment, the step of depositing a Schottky contact metal on top of the entire epitaxial layer 250 may include a step of conducting a low temperature annealing of the Schottky contact metal.

[0065] Having described the invention by the description and illustrations above, it should be understood that these are exemplary of the invention and are not to be considered as limiting. Accordingly, the invention is not to be considered as limited by the foregoing description, but includes any equivalent.