Microelectromechanical component and method for producing same

Abstract

In a microelectromechanical component according to the invention, at least one microelectromechanical element (5), electrical contacting elements (3) and an insulation layer (2.2) and thereon a sacrificial layer (2.1) formed with silicon dioxide are formed on a surface of a CMOS circuit substrate (1) and the microelectromechanical element (5) is arranged freely movably in at least a degree of freedom. At the outer edge of the microelectromechanical component, extending radially around all the elements of the CMOS circuit, a gas- and/or fluid-tight closed layer (4) which is resistant to hydrofluoric acid and is formed with silicon, germanium or aluminum oxide is formed on the surface of the CMOS circuit substrate (1).

Claims

1. A microelectromechanical component consists of at least one microelectromechanical element, electrical contacting elements, an insulation layer, and a sacrificial layer of silicon dioxide on a surface of a CMOS circuit substrate, the at least one microelectromechanical element is freely moveable in at least one direction, and the at least one micromechanical element is moveable because of a partial removal of the sacrificial layer, wherein at the outer edge of the microelectromechanical component, which extends radially around all the elements of the CMOS circuit substrate, a gas or fluid-tight closed layer resistant to hydrofluoric acid and consisting of silicon, germanium or aluminum oxide is located on the surface of the CMOS circuit substrate.

2. The component as claimed in claim 1, wherein the fluid-tight closed layer is formed with amorphous silicon.

3. The component as claimed in claim 1, wherein the fluid-tight closed layer consists of doped amorphous silicon or a chemical compound of silicon and germanium.

4. The component as claimed in claim 1, wherein a barrier layer composed of aluminum oxide is located on the surface of the microelectromechanical component and the microelectromechanical element is capable of moving.

5. The component as claimed in claim 1, wherein the fluid-tight closed layer is coated with at least one further layer, and the at least one further layer is a metal.

6. A method for producing the at least one microelectromechanical element as claimed in claim 1, applying the insulation layer comprising silicon dioxide on a surface of the CMOS circuit substrate; embedding electrical contacting elements into the insulation layer; forming in the insulator layer at an outer edge at least one trench extending as far as the surface of the CMOS circuit substrate extending radially around all elements of the CMOS circuit substrate; filling the at least one trench, at least in its bottom region, with the fluid-tight closed layer formed with silicon, germanium, a chemical compound of silicon and germanium or aluminum oxide; applying to the sacrificial layer a material with which at least one microelectromechanical element is formed; and then etching the sacrificial layer to partially remove it using hydrofluoric acid, wherein movability of the at least one microelectromechanical element is obtained.

7. The method as claimed in claim 6, substantially filling the at least one trench with silicon, germanium or aluminum oxide.

8. The method as claimed in claim 6, covering the fluid-tight closed layer with at least one further metal layer in the at least one trench.

9. The method as claimed in claim 6, forming in the sacrificial layer a closed barrier layer composed of aluminum oxide and, on that surface of the barrier layer which faces in the direction of the at least one microelectromechanical element, electrical contact elements or electrodes required for the actuation of the microelectromechanical element which are electrically conductively connected to the electrical contacting elements arranged below the barrier layer, and removing material of the sacrificial layer above the barrier layer by etching to achieve movability of the microelectromechanical element.

10. The method as claimed in claim 6, partially removing the material of the sacrificial layer by etching with hydrofluoric acid as liquid or gas.

11. The method as claimed in claim 6, depositing silicon or aluminum oxide in the at least one trench by means of PE-CVD technology, sputtering or ALD and forming the fluid-tight closed layer.

Description

DESCRIPTION OF THE DRAWINGS

(1) The invention will be explained in greater detail below by way of example seen in the drawings.

(2) FIG. 1A shows a sectional illustration through one example of a MEMS component according to the invention, in which a micromechanical element is not yet freely movable;

(3) FIG. 1B shows a sectional illustration through a further example of a MEMS component according to the invention, in which a micromechanical element is not yet freely movable;

(4) FIG. 2 shows a sectional illustration through a standard CMOS circuit substrate;

(5) FIG. 3 shows a sectional illustration through the CMOS circuit substrate, in which CMOS elements on its surface have been covered in a region with an insulator layer composed of silicon dioxide;

(6) FIG. 4 shows a sectional illustration of the CMOS circuit according to FIG. 3, in which perforations (vias) have been formed through the insulator layer;

(7) FIG. 5 shows a sectional illustration of the example according to FIG. 4, in which a metallization and structuring of the metal have been carried out in order to form electrical through contacts on the CMOS and electrical contacting elements;

(8) FIG. 6 shows a sectional illustration through one example according to FIG. 5, in which through the perforations electrical through contacts (vias) at the radially outer edge around the elements of the CMOS circuit a trench extending radially around has been formed down to the silicon wafer;

(9) FIG. 7 shows a sectional illustration of the CMOS circuit with the insulator layer according to FIG. 6, in which the surface has been coated with aSiB and the trench has been filled with aSiB in the process;

(10) FIG. 8 shows a sectional illustration of the example shown in FIG. 7, in which a part of the deposited aSiB has been removed again apart from the trench region;

(11) FIG. 9 shows a sectional illustration of the example according to FIG. 8, in which a further region has been formed with an insulator layer composed of silicon dioxide on the surface in a manner covering the trench filled with aSiB;

(12) FIG. 10 shows a sectional illustration of the example according to FIG. 9, in which the surface of the insulator layer has been planarized;

(13) FIG. 11 shows a sectional illustration of the example according to FIG. 10, in which a perforation (via) has been shaped on the planarized surface and a metal layer having contact with the silicon layer has been formed in said perforation and also on the surface;

(14) FIG. 12 shows a sectional illustration of the example according to FIG. 11, in which electrical contacting elements and electrical conductor tracks have been formed by locally defined removal of the metal layer;

(15) FIG. 13 shows a sectional illustration of the example according to FIG. 12, in which a further region of the insulator layer has been formed and the electrical contacting elements have been embedded therein;

(16) FIG. 14 shows a sectional illustration of the example according to FIG. 13, in which a planarization of the surface of the insulator layer has been carried out;

(17) FIG. 15 shows a sectional illustration of the example according to FIG. 14, in which a barrier layer composed of aluminium oxide or aSi has been formed on the planarized surface of the sacrificial layer;

(18) FIG. 16 shows a sectional illustration of the example according to FIG. 15, in which perforations have been formed in a locally defined manner through the barrier layer composed of aluminium oxide or aSi;

(19) FIG. 17 shows a sectional illustration of the example according to FIG. 16, in which the perforations have been led as far as electrical contacting elements arranged within the insulator layer;

(20) FIG. 18 shows a sectional illustration of the example according to FIG. 17, in which a metallization has been applied on the surface and electrical through contacts have been formed as far as the electrical contacting elements;

(21) FIG. 19 shows a sectional illustration of the example according to FIG. 18, in which the final metallization has been removed in a locally defined manner;

(22) FIG. 20 shows a sectional illustration of the example according to FIG. 19, in which a sacrificial layer for the MEMS element has been formed on the surface of the metallized CMOS circuit;

(23) FIG. 21 shows a sectional illustration of the example according to FIG. 20, in which the surface of the sacrificial layer has been planarized;

(24) FIG. 22 shows a sectional illustration of the example according to FIG. 21, in which, in the previously formed region of the sacrificial layer, a perforation has been formed as far as an electrical contacting element;

(25) FIG. 23 shows a sectional illustration of the example according to FIG. 22, in which material for forming a microelectromechanical element has been applied on the planarized surface of the previously applied region of the sacrificial layer right into the perforation formed last;

(26) FIG. 24 shows a sectional illustration of the example according to FIG. 23, in which a locally defined material removal of the material for the formation of a microelectromechanical element has been carried out, and

(27) FIG. 25 shows a sectional illustration through a finished produced example of a MEMS component according to the invention, in which a region of the sacrificial layer has been removed, with the result that the microelectromechanical element is movable.

DETAILED DESCRIPTION OF THE DRAWINGS

(28) With the following figures, the intention is to elucidate how an example of a MEMS component according to the invention can be produced progressively in method steps.

(29) FIG. 1A shows an example in which a micromechanical element 5 is not yet freely movable. In this case, on the surface of a CMOS circuit substrate 1, a sacrificial layer 2.1 is formed in the upper region of the MEMS component, said upper region being intended to be removed in order to attain the movability of the MEMS element 5, and underneath an insulator layer 2.2 composed of silicon dioxide is formed in the region of the CMOS circuit, a plurality of electrical contacting elements 3 being embedded in said insulator layer. At the radially outer edge of the MEMS component, a layer 4 composed of aSiB is formed in a manner extending around on the surface of the CMOS circuit substrate 1 and is enclosed by sacrificial and insulator layer material at the other surfaces.

(30) A barrier layer 7 composed of aluminium oxide is formed at a distance from that surface of the sacrificial layer 2.1 against which the microelectromechanical element 5 still bears here, said barrier layer having perforations through which are led through the electrical through contacts 8 to electrical contacting elements 3. In this example, the microelectromechanical element 5 is intended to be a pivotable element that reflects electromagnetic radiation.

(31) The example shown in FIG. 1B differs from the example according to FIG. 1A merely in the way in which the layer 4 is formed. Said layer is led as far as the barrier layer 7.

(32) FIG. 2 shows a CMOS circuit substrate 1 with CMOS elements 15 that is available as standard as a starting point for production.

(33) FIG. 3 shows how a region of an insulator layer 2.2 composed of silicon dioxide has been deposited on the surface of the CMOS circuit substrate 1 by means of a PE-CVD method.

(34) Contact holes (vias) 9 were formed in a locally defined manner, by means of reactive ion etching, into the sacrificial layer 2 formed in this way, said contact holes being led from the surface of the heretofore formed region of the insulator layer 2.2 as far as electrical contacts of the CMOS circuit substrate 1 (FIG. 4).

(35) Further electrical contactings 3 and electrical through contacts 10 were formed by deposition of a metal by sputtering and by lithographic patterning, which can be gathered from FIG. 5.

(36) FIG. 6 shows how the semifinished product shown in FIG. 5 has been processed further by virtue of the fact that at the radially outer edge of the MEMS component in the material of the insulator layer 2.2 a trench 6 extending radially around has been formed by reactive ion etching, said trench extending as far as the surface of the CMOS circuit substrate 1.

(37) FIG. 7 reveals how the entire surface has been coated with aSiB 4.1 by means of a PE-CVD method. The trench 6 was also filled completely with the aSiB 4.1 in the process.

(38) After that, aSiB 4.1 was removed in a locally defined manner lithographically and by reactive ion etching in a locally defined manner, such that it remains only in the region of the later guard ring as layer 4, which can be gathered from FIG. 8. The surface of the layer 4 need not be formed in a patterned manner as in this example, it can also be flat and planar, as is shown in FIG. 1b.

(39) After that in turn, a region of the insulator layer 2.2 was deposited again by a PE-CVD method, such that the surface is formed completely with the silicon dioxide and the layer 4 is also covered therewith (FIG. 9).

(40) FIG. 10 shows how the surface of the insulator layer 2.2 formed up until then and the aSiB forming the layer 4 have been planarized by means of chemical mechanical polishing.

(41) On the planarized surface of the insulator layer 2.2 formed up until then, a via 10 was etched and a continuous layer 11 composed of AlSiCu, said layer contacting the aSiB in the layer 4, was formed by sputtering (FIG. 11).

(42) It can be gathered from FIG. 12 how a part of the layer 11 has been removed in a locally defined manner lithographically and by etching and electrical contacting elements and/or conductor tracks 3 have been formed thereby.

(43) It can be gathered from FIGS. 13 and 14 that a further region of the insulator layer 2.2 is formed on the surface by means of a PE-CVD method and the electrical contacting elements 3 produced last are embedded therein. The surface of the insulator layer 2.2 was than planarized again by chemical mechanical polishing.

(44) FIG. 15 shows the formation of a barrier layer 7 composed of aluminium oxide on the entire surface of the insulator layer 2.2. The barrier layer 7 can be formed by means of ALD (atomic layer deposition). It should form a closed layer.

(45) In accordance with FIG. 16, perforations 7.1 are formed into the barrier layer 7 in a locally defined manner by means of reactive ion etching.

(46) The perforations 7.1 can be deepened further by means of reactive ion etching and in the process locally defined removal of insulator layer material, with the result that the enlarged vias 7.2 can be formed, which are led as far as electrical contacting elements 3. This is illustrated in FIG. 17.

(47) In accordance with FIG. 18, a metal layer 12 is applied again on the surface by sputtering, said metal layer being used to form through contacts 8 to the electrical contacting elements 3 formed last beforehand. The AlSiCu alloy or TiAl can again be used for this purpose.

(48) With FIG. 19, the intention is to elucidate how a locally defined removal of the metal layer 12 is intended to be effected lithographically and by means of etching, said removal resulting in the formation of further electrical contacting elements 3 and also electrodes 13 on the surface of the barrier layer 7.

(49) For the formation of a microelectromechanical element 5, further sacrificial layer material is then deposited on the surface by means of PE-CVD technology, with the result that therein the last formed electrical contacting elements 3, the electrodes 13 and the barrier layer 7 are enclosed by material of the sacrificial layer 2.1 (FIG. 20).

(50) In accordance with FIG. 21, the surface of the sacrificial layer 2.1 is planarized again by chemical mechanical polishing.

(51) It can be gathered from FIG. 22 that a further perforation 14 is formed, by reactive ion etching, through the sacrificial layer material proceeding from the surface as far as an electrical contacting element 3 embedded in the sacrificial layer 2.1 and arranged above the barrier layer 7.

(52) After that, a layer of the material 5.1 with which the microelectromechanical element 5 is intended to be formed is formed and the perforation 14 is concomitantly filled with the material 5.1, with the result that in the case of an electrically conductive material for a microelectromechanical element 5 an electrically conductive connection to the corresponding electrical contacting element 3 can be produced. The layer can be formed by sputtering in the case of a metal and by a PE-CVD method in the case of other materials such as, for example, silicon (FIG. 23).

(53) A part of the material with which the microelectromechanical element 5 is intended to be formed can be removed again by means of lithography and etching, as a result of which the dimensioning and geometric shape of the microelectromechanical element 5 can be influenced (FIG. 24).

(54) After that, at the surface sacrificial layer material is removed by wet or vapor phase etching using hydrofluoric acid, with the result that the microelectromechanical element 5, embodied as a pivotable reflective element in this case, is pivotable freely movably about at least one axis. Here it is also possible to expose a part of the layer 4 at the outer edge, but this need not be the case.

(55) An example of a MEMS component according to the invention that has been processed in this way can be gathered from FIG. 25.