OPTOELECTRONIC EMITTING DEVICE AND METHOD FOR CONTROLLING AN OPTOELECTRONIC EMITTING DEVICE

Abstract

An optoelectronic emitting device includes a plurality of optoelectronic semiconductor components with a respective drive circuit. Each of said driving circuits includes a first circuit branch having said respective optoelectronic semiconductor component and a first transistor for controlling the current flow through said optoelectronic semiconductor component, and a capacitor for driving said first transistor with said capacitor voltage. The first circuit branches of the drive circuits of a first group of the optoelectronic semiconductor components are connected between a supply potential and a common first reference potential line. The capacitors of the drive circuits of the first group of the optoelectronic semiconductor components are coupled to a common second reference potential line.

Claims

1-6. (canceled)

7. An optoelectronic emitting device, with: a plurality of optoelectronic semiconductor components having a respective drive circuit, wherein each of said drive circuits comprises a first circuit branch and a second circuit branch, wherein the first circuit branch comprises the respective optoelectronic semiconductor component, a first transistor for controlling the current flow through the optoelectronic semiconductor component, and a third transistor, the second circuit branch comprising a capacitor for driving the first transistor with the capacitor voltage and a second transistor for coupling the capacitor to a programming line, the third transistor blocking current flow through the optoelectronic semiconductor component when the second transistor couples the capacitor to the programming line, and the third transistor having a control terminal connected to a control terminal of the second transistor.

8. The optoelectronic emitting device according to claim 7, wherein the first transistor and the third transistor are connected in series.

9. The optoelectronic emitting device according to claim 7, having a control unit which controls the second and third transistors in such a way that the third transistor blocks a current flow through the optoelectronic semiconductor component when the second transistor couples the capacitor to the programming line.

10. A method for controlling an optoelectronic emitting device, wherein the optoelectronic emitting device comprises a plurality of optoelectronic semiconductor components having a respective drive circuit, wherein each of said drive circuits comprises a first circuit branch and a second circuit branch, wherein the first circuit branch comprises the respective optoelectronic semiconductor component, a first transistor for controlling the current through the optoelectronic semiconductor component, and a third transistor, the second circuit branch comprising a capacitor for controlling the first transistor with the capacitor voltage and a second transistor for coupling the capacitor to a programming line, and wherein the method comprises: providing a control signal; and controlling at least one of the drive circuits with the control signal in such a way that the second transistor couples the capacitor to the programming line and at the same time the third transistor blocks a current flow through the optoelectronic semiconductor component.

11. The method according to claim 10, wherein the at least one drive circuit is controlled in such a way that the second transistor decouples the capacitor from the programming line and at the same time the third transistor permits a current flow through the optoelectronic semiconductor component.

12. An optoelectronic emitting device, comprising: a plurality of optoelectronic semiconductor components having a respective drive circuit, wherein each of said driving circuits comprises a first circuit branch comprising the respective optoelectronic semiconductor component and a first transistor for controlling the current flow through said optoelectronic semiconductor component, and a capacitor for driving said first transistor with said capacitor voltage, wherein the drive circuits are coupled to a reference potential layer, and wherein the optoelectronic semiconductor components are arranged in a first plane and the reference potential layer extends in a second plane which is parallel to the first pane.

13. (canceled)

14. The optoelectronic emitting device according to claim 12, wherein an electrically insulating layer is arranged between the drive circuits and the reference potential layer and a through hole is led from each drive circuit through the electrically insulating layer to the reference potential layer.

15. The optoelectronic emitting device according to claim 12, wherein the reference potential layer is made of a transparent, electrically conductive oxide and in particular of indium tin oxide.

16. The optoelectronic emitting device according to claim 12, wherein the reference potential layer comprises a network of a plurality of conductor paths.

17. A display with one or more optoelectronic emitting devices according to claim 7.

18. The optoelectronic emitting device according to claim 7, each driving circuit comprising a second circuit branch comprising the capacitor and a second transistor for coupling the capacitor to a programming line.

19. The optoelectronic emitting device according to claim 7, wherein at least one of the first transistor or the second transistor is a thin-film transistor.

20. The optoelectronic emitting device according to claim 7, wherein at least one of the first reference potential line or the second reference potential line is made of a transparent, electrically conductive oxide comprising indium tin oxide.

21. The optoelectronic emitting device according to claim 7, wherein the optoelectronic semiconductor components are arranged in a matrix of rows and columns and the optoelectronic semiconductor components of the first group are arranged in a same row or column.

Description

[0050] In the following, examples of the invention are explained in detail with reference to the attached drawings. In these show schematically:

[0051] FIG. 1 section of a circuit diagram of a conventional design example of an optoelectronic emitting device;

[0052] FIG. 2A to 2C Excerpts of circuit diagrams of an example of an optoelectronic emitting device according to the first aspect;

[0053] FIG. 3 section of a circuit diagram of an example of an optoelectronic emitting device design according to the second aspect; and

[0054] FIGS. 4A and 4B Excerpts of circuit diagrams of a design example of an optoelectronic emitting device according to the fourth aspect.

[0055] In the following detailed description, reference is made to the attached drawings, which form part of this description and in which, for illustration purposes, specific examples of designs are shown in which the invention can be exercised. Since components of design examples can be positioned in a number of different orientations, the terminology of directions is for illustration purposes only and is in no way restrictive. It is understood that other examples of execution can be used and structural or logical changes can be made without deviating from the scope of protection. It is understood that the features of the different execution examples described herein may be combined with each other, unless specifically stated otherwise.

[0056] The following detailed description should therefore not be understood in a restrictive sense. In the figures, identical or similar elements are marked with identical reference signs, where appropriate.

[0057] FIG. 1 shows an excerpt from a schematic circuit diagram of an optoelectronic emitting device 10, which is not in accordance with the invention and is a component of a display. FIG. 1 shows a line of a pixel matrix. The line contains N pixels. Only pixels 1 and N are shown.

[0058] Each of the pixels has three subpixels with a respective LED 11, 12 or 13 for the colors red, green and blue. Each subpixel is assigned a control circuit, which is also called a 2T1C pixel circuit, because it comprises a first transistor 15, a second transistor 16 and a capacitor 17.

[0059] Ground terminals of the first transistor 15 and the capacitor 17 of each control circuit are connected to a common ground potential line 18.

[0060] A supply voltage V_LED is applied to the anode terminals of diodes 11, 12, 13. A programming voltage Data_ij can be applied to the current-carrying paths of the second transistors 16, where i denotes the respective pixel (i=1, . . . , N) and j indicates the color of the subpixel, i.e. red, green, or blue (j=R, G, B). Furthermore, a signal LS (line select) can be applied to the control terminals of the second transistors 16 in order to apply the programming voltages Data_ij to the capacitors 17.

[0061] A disadvantage of the circuit shown in FIG. 1 is that the current flowing through the LEDs 11, 12, 13, which is connected to the common ground potential line 18, causes a voltage loss over the length of the ground potential line 18. For example, a design of the ground potential line 18 as an aluminum conductor track with a width of approx. 10 μm, a thickness of 500 nm and a length of 10 cm (corresponds to the display width) results in a resistance of 520 Ohm. If a LED current of for example 200 μA flows on the ground potential line 18, this leads to a voltage swing of up to 1 V between the first pixel and the N. pixel.

[0062] Since the capacitors 17 have one connection to the common ground potential line 18, the voltage swing over the entire length of the ground potential line 18 distorts the gate-source programming voltage. Depending on the brightness, the current of the display as well as the image content, this can lead to signal interference, especially disturbing flickering, as well as different brightness.

[0063] FIG. 2A shows a section of a schematic circuit diagram of an optoelectronic emitting device 19, which is part of a display.

[0064] The optoelectronic emitting device 19 shown in FIG. 2A is an example of an optoelectronic emitting device as described in the first aspect of the application.

[0065] In FIG. 2A, only one pixel is shown for ease of graphical representation. The optoelectronic emitting device 19 has a matrix of pixels arranged in rows and columns, all of which comprise the same structure as the pixel shown in FIG. 2A.

[0066] Each of the pixels comprises three sub-pixels with a respective optoelectronic semiconductor component in the form of an LED 11, 12 or 13 for the colors red, green or blue. Each pixel is assigned a control circuit 20, which is similar to the control circuit shown in FIG. 1. The control circuits 20 each contain a first circuit branch 21 and a second circuit branch 22 as well as a first transistor 15, a second transistor 16 and a capacitor 17. The first and second transistors 15, 16 are thin film transistors.

[0067] In the first circuit branch 21 of a respective control circuit 20 the respective LEDs 11, 12 or 13 and the current-carrying path, i.e. the drain-source path, of the first transistor 15 are connected in series. In the second circuit branch 22 one terminal of the drain-source path of the second transistor 16 is connected to a programming line 25 and the other terminal of the drain-source path of the second transistor 16 is connected to a terminal of the capacitor 17. This terminal of capacitor 17 is also connected to a control terminal, i.e. the gate terminal, of the first transistor 15.

[0068] A supply voltage V_LED is applied to the anode terminals of LEDs 11, 12 and 13 during operation of the optoelectronic emitting device 19. A programming voltage Data_1R, Data_1G or Data_1B can be applied to the programming lines 25. Furthermore, a signal LS can be applied to the control connections, i.e. the gate connections, of the second transistors 16. The LS signal is used to select a line of the pixel matrix. Consequently, the signal LS is identical for all pixels and subpixels of a line.

[0069] A reference potential connection of the first circuit branch 21, i.e. the connection of the drain-source path of the first transistor 15 facing away from LED 11, 12 or 13, is connected to a common first ground potential line 26, i.e. a common first reference potential line. Furthermore, a reference potential connection of capacitor 17 is connected to a common second ground potential line 27, i.e. a common second reference potential line.

[0070] All reference potential connections of the first circuit branches 21 of a line, i.e. a first group of pixels or LEDs, are connected to the first ground potential line 26 and all reference potential connections of the capacitors 17 of a line are connected to the second ground potential line 27. This is shown schematically in FIG. 2B. There the pixels 1 to N of a line of the optoelectronic emitting device 19 are shown, which are connected to the first and second ground potential line 26 and 27, respectively, as described above. For each additional line of the optoelectronic emitting device 19, two separate ground potential lines are provided.

[0071] To program the pixels, the second transistors 16 of a line are simultaneously driven with a voltage LS, which causes the drain-source paths of the second transistors 16 to become electrically conductive and thus the respective programming voltage Data_ij is applied to the capacitors 17. The voltage to which the respective capacitor 17 is charged by the programming is applied to the gate terminal of the respective first transistor 15 and determines the gate-source voltage of the first transistor 15.

[0072] The gate-source voltage of the first transistor 15 determines the current that can flow through the respective LED 11, 12 or 13, which in turn determines the brightness of the light emitted by the respective LED 11, 12 or 13.

[0073] By separating the ground potential line into a first ground potential line 26 and a separate second ground potential line 27, it is prevented that the comparatively high currents flowing through the first ground potential line 26 falsify the programmed voltages of the capacitors 17.

[0074] The voltage losses on the first ground potential line 26 can be compensated by a higher supply voltage V_LED, since the first transistors 15 are operated in saturation and the dynamic voltage drop at the drain-source section of the respective first transistor 15 drops. This has no influence on the LED current.

[0075] The first ground potential line 26, over which the LED current flows, is made of a transparent, electrically conductive oxide, especially indium tin oxide. Since only small currents flow via the second ground potential line 27, this line can be relatively narrow and made of a transparent, electrically conductive oxide or another electrically conductive material.

[0076] FIG. 2A shows a so-called common anode arrangement in which the supply voltage V_LED is applied to the anode terminals of LEDs 11, 12 and 13. Typically, the first transistors 15 are n-channel TFTs with a channel of indium-gallium-zinc oxide (IGZO). Alternatively, LEDs 11, 12 and 13 can also be arranged in a so-called common cathode arrangement.

[0077] A common cathode arrangement is shown as an example in FIG. 2C.

[0078] In the first circuit branches 21, the respective LED 11, 12 or 13 are arranged between the first transistor 15 and the first ground potential line 26, i.e. the cathode terminals of the LEDs 11, 12 and 13 are connected to the first ground potential line 26. Here the first transistors 15 can be implemented as p-channel TFTs or n-channel TFTs. Otherwise the circuit from FIG. 2C is identical to the circuit from FIG. 2A.

[0079] FIG. 3 shows a section of a schematic circuit diagram of an optoelectronic emitting device 30, which is part of a display.

[0080] The optoelectronic emitting device 30 shown in FIG. 3 is an example of an optoelectronic emitting device according to the second aspect of the application. Furthermore, a method of controlling the optoelectronic emitting device 30 is described below. This method is an example of a method according to the third aspect of the application.

[0081] The optoelectronic illuminator 30 is identical to the optoelectronic illuminator 19 shown in FIG. 2A except for the differences noted below.

[0082] Unlike the optoelectronic emitting device 19, the optoelectronic emitting device 30 does not comprise two separate ground potential lines, but only one ground potential line 31 per pixel line. The ground potential line 31 is connected to both the ground connections of the first circuit branches 21 and the ground connections of the capacitors 17.

[0083] Furthermore in the first circuit branches 21, a third transistor 32 with the LEDs 11, 12 or 13 and the first transistors 15 are connected in series. The third transistors 32 can be arranged as shown in FIG. 3 between LED 11, 12 or 13 and the first transistor 15 or alternatively between the line for the supply voltage V_LED and LED 11, 12 or 13. The third transistors 32 can be designed as thin film transistors and especially as p-channel TFTs.

[0084] Furthermore, the second transistor 16 and the third transistor 32 are controlled by a control unit not shown in FIG. 3. During programming of the subpixels, the second transistors 16 are switched on to allow charging of the capacitors 17 to the desired voltage, and the third transistors 32 are switched off so that no LED current flows during programming. Once programming is complete, the second transistors 16 are switched off and the third transistors 32 are switched on to allow LED current to flow.

[0085] In the execution example shown in FIG. 3, the second transistors 16 are designed as n-channel TFTs and the third transistors 32 as p-channel TFTs. Furthermore, the gate terminals of the second and third transistors 16, 32 are connected to each other and are controlled by the same signal LS. This causes the second and third transistors 16, 32 to be switched on and off alternately.

[0086] As a result, signal disturbances such as ground bounce are eliminated, because during programming no LED currents and therefore only small currents flow via the ground potential line 31. Consequently, a thin ground potential line 31 can be used, which increases the transparency of the display.

[0087] The voltage losses on the ground potential line 31 caused by the LED currents can be compensated by a higher supply voltage V_LED, since the first transistors 15 are operated in saturation and the dynamic voltage drops at the drain-source path of the respective first transistor 15. This has no influence on the LED current.

[0088] FIG. 4A shows an excerpt from a schematic circuit diagram of an optoelectronic emitting device 35, which is part of a display.

[0089] The optoelectronic emitting device 35 shown in FIG. 4A is an example of an optoelectronic emitting device design according to the fourth aspect of the application.

[0090] The optoelectronic emitting device 35 is identical to the optoelectronic emitting device 19 shown in FIG. 2A except for the differences noted below.

[0091] The optoelectronic emitting device 35 does not comprise two separate ground potential lines, but a common large-area ground potential layer 36, to which the ground connections of the first circuit branches 21 and the ground connections of the capacitors 17 are connected.

[0092] The ground potential layer 36 is isolated from the supply voltage V_LED and the control signals by a large-area dielectric layer 37. From the control circuits 20 of each subpixel a respective via 38 extends through the dielectric layer 37 to the ground potential layer 36.

[0093] The LEDs 11, 12 and 13 can be arranged in one plane, and the first and second transistors 15, 16 can be arranged in another plane. Both layers can have a certain thickness to accommodate the components in the respective layer. The ground potential layer 36 can be arranged in a further plane parallel to the first two planes.

[0094] The ground potential layer 36 can be made of a transparent, electrically conductive oxide and especially of indium tin oxide, which increases the transparency of the ground potential layer 36.

[0095] In FIG. 4B the ground potential layer 36 is shown in a top view.

[0096] As in FIG. 4B, the ground potential layer 36 can consist of a continuous layer that can extend over all pixels. The LED current is distributed over the entire ground potential layer 36, resulting in lower voltage drops.

[0097] Alternatively, the ground potential layer 36 can consist of a close-meshed network of conductor paths, especially nanowires.

[0098] This reduces the capacitive load on the gate terminals of the second transistors 16 and the programming lines 25.

REFERENCE CHARACTER LIST

[0099] 10 optoelectronic emitting device [0100] 11 LED [0101] 12 LED [0102] 13 LED [0103] 15th transistor [0104] 16 second transistor [0105] 17 capacitor [0106] 18 ground potential line [0107] 19 optoelectronic emitting device [0108] 20 Control circuit [0109] 21 first circuit branch [0110] 22 second circuit branch [0111] 25 programming line [0112] 26 ground potential line [0113] 27 second ground potential line [0114] 30 optoelectronic emitting device [0115] 31 ground potential line [0116] 32 transistor [0117] 35 optoelectronic emitting device [0118] 36 mass potential layer [0119] 37 dielectric layer [0120] 38 plated through hole