LASER DIODE CHIP

Abstract

A laser diode chip is described, comprising: an n-type semiconductor region (3), a p-type semiconductor region (5), and an active layer (4) arranged between the n-type semiconductor region (3) and the p-type semiconductor region (5), an n-type contact (9) and a p-type contact (8), at least one heating element (14) arranged on a side of the laser diode chip facing the p-type semiconductor region (5), the heating element (14) functioning as a resistance heater, and at least one metallic seed layer (7, 11), wherein the heating element comprises a part (11) of the seed layer, and wherein the p-type contact (8) is arranged on a further part (7) of the seed layer (7, 11).

Claims

1. A laser diode chip comprising: an n-type semiconductor region (3), a p-type semiconductor region (5), and an active layer (4) arranged between the n-type semiconductor region (3) and the p-type semiconductor region (5), an n-type contact (9) and a p-type contact (8), at least one heating element (14) arranged on a side of the laser diode chip facing the p-type semiconductor region (5), the heating element (14) functioning as a resistance heater, and at least one metallic seed layer (7, 11), wherein the heating element comprises a part (11) of the seed layer, and wherein the p-type contact (8) is arranged on a further part (7) of the seed layer (7, 11).

2. The laser diode chip according to claim 1, wherein the heating element (14) is a conductor track (10, 11).

3. The laser diode chip according to any one of the preceding claims, wherein the laser diode chip is arranged on a heat sink (1), and wherein the active layer (4) is arranged between the heating element (14) and the heat sink (1).

4. The laser diode chip according to any one of the preceding claims, wherein the heating element (14) and the p-contact (8) comprise the same material.

5. The laser diode chip according to any one of the preceding claims, wherein the heating element (14) comprises at least one of the metals gold, titanium, platinum or palladium.

6. The laser diode chip according to any one of the preceding claims, wherein the heating element (14) is connected to electrical contacts which are not connected to the p-contact (8) or the n-contact (9) of the laser diode chip.

7. The laser diode chip according to any one of claims 1 to 6, wherein the heating element (14) comprises a common contact with the laser diode chip.

8. The laser diode chip according to any one of the preceding claims, wherein the heating element (14) is arranged above the p-contact (8) of the laser diode chip, wherein a passivation layer (12) is arranged between the heating element (14) and the p-contact (8).

9. The laser diode chip according to any one of the preceding claims, wherein the laser diode chip comprises a ridge waveguide (13), and wherein the heating element (14) is arranged parallel to the ridge waveguide (13).

10. The laser diode chip according to any one of the preceding claims, wherein the p-type semiconductor region (5) is covered in regions with a passivation layer (6), and wherein the heating element (14) is arranged on the passivation layer (6).

11. The laser diode chip according to one of the preceding claims, wherein the heating element (14) comprises a galvanic layer.

12. The laser diode chip according to any one of the preceding claims, wherein a current path through the p-type semiconductor region (5) is formed between the heating element (14) and the p-type contact (8).

13. The laser diode chip according to any one of the preceding claims, wherein the heating element (14) is configured to be connected to a control device configured to control the heating power of the heating element (14).

14. The laser diode chip according to claim 13, wherein the control device is configured to control the heating power such that an emission wavelength is within a predetermined tolerance in a target value range.

Description

[0027] The laser diode chip is explained in more detail below with reference to exemplary embodiments in connection with FIGS. 1 to 8.

[0028] In the Figures:

[0029] FIG. 1A shows a schematic representation of a cross-section through the laser diode chip according to a first example,

[0030] FIG. 1B shows a schematic representation of a perspective view of a laser diode chip according to the first example,

[0031] FIG. 1C shows a detailed view of the laser diode chip according to the first example,

[0032] FIGS. 2A and 2B show respectively exemplary representations of the circuits of the heating element and the laser diode chip,

[0033] FIG. 3A shows a schematic representation of a cross-section through the laser diode chip according to a second example,

[0034] FIG. 3B shows a schematic representation of a perspective view of a laser diode chip according to the second example,

[0035] FIG. 3C shows a detailed view of the laser diode chip according to the second example,

[0036] FIG. 3D shows a further detailed view of the laser diode chip according to the second example,

[0037] FIG. 4A shows a schematic representation of a cross-section through the laser diode chip according to a third example,

[0038] FIG. 4B shows a schematic representation of a top view of the laser diode chip according to a fourth example,

[0039] FIG. 5 shows a schematic representation of a cross-section through the laser diode chip according to a fifth example,

[0040] FIG. 6 shows a schematic representation of a cross-section through the laser diode chip according to a sixth example,

[0041] FIG. 7 shows a schematic representation of a cross-section through the laser diode chip according to a seventh example,

[0042] FIG. 8 shows a schematic representation of a cross-section through the laser diode chip according to an eighth example.

[0043] Components that are the same or have the same effect are each given the same reference signs in the figures. The components shown, as well as the proportions of the components with respect to each other, are not to be regarded as true to scale.

[0044] In FIGS. 1A, 1B, and 1C, an exemplary embodiment of the laser diode chip is shown in a cross-sectional view, a top view, and a detailed top view, respectively. The laser diode chip comprises a semiconductor layer sequence 2 with an n-type semiconductor region 3, an active layer 4, and a p-type semiconductor region 5.

[0045] The active layer 4 may be formed, for example, as a pn junction, a double heterostructure, a single quantum well structure or a multiple quantum well structure. In this context, the term quantum well structure includes any structure in which charge carriers undergo quantization of their energy states by confinement. In particular, the term quantum well structure does not contain any indication of the dimensionality of the quantization. Thus, it includes, but is not limited to, quantum wells, quantum rods, quantum dots, and any combination of these structures.

[0046] The semiconductor layer sequence 2 of the laser diode chip is preferably based on a III-V compound semiconductor material, in particular an arsenide, nitride or phosphide compound semiconductor material. For example, the semiconductor layer sequence 2 may include In.sub.xAl.sub.yGa.sub.1-x-yN, In.sub.xAl.sub.yGa.sub.1-x-yP or In.sub.xAl.sub.yGa.sub.1-x-yAs, each with 0≤x≤1, 0≤y≤1, and x+y≤1. In this regard, the III-V compound semiconductor material need not necessarily comprise a mathematically exact composition according to any of the above formulas. Rather, it may comprise one or more dopants as well as additional constituents. For the sake of simplicity, however, the above formulas include only the essential constituents of the crystal lattice, even if these may be replaced in part by small amounts of additional substances. The material selection is based on the desired emission wavelengths of the laser diode chip.

[0047] A ridge waveguide 13 (ridge) is formed in the p-type semiconductor region 5. The ridge waveguide 13 can be formed by patterning the p-type semiconductor region 5, for example, by a photolithographic method. For electrical contacting, the laser diode chip comprises an n-type contact 9 and a p-type contact 8, which are implemented as metal layers, for example.

[0048] The p-contact 8 arranged on the p-type semiconductor region 5 can be a gold layer, for example. In particular, the p-contact 8 may be formed by electrodeposition on a seed layer 7. The thickness of the p-contact may be, for example, between 1 μm and 10 μm, in particular about 5 μm.

[0049] The seed layer 7 can be, for example, a titanium-palladium-gold layer sequence. The thickness of the seed layer 7 may be, for example, about 470 nm. In the exemplary embodiment, the p-contact 8 is electrically conductively connected to the p-type semiconductor region 5 only at the upper side of the ridge waveguide 13. Outside the ridge waveguide 13, the p-contact 8 is electrically isolated from the p-type semiconductor region 5 by a passivation layer 6.

[0050] The laser diode chip comprises a heating element 14 on a side facing the p-type semiconductor region 5. In the exemplary embodiment shown here, the heating element 14 is formed as a conductor track arranged above the ridge waveguide 13 and the p-type contact 8. In the present case, the heating element 14 is not electrically conductively connected to the p-contact 8, but is insulated from the p-contact 8 by a passivation layer 12. The passivation layer 13 can be, for example, an oxide layer or nitride layer, in particular a silicon oxide layer or silicon nitride layer. Like the p-contact 8, the heating element 14, which is designed as a conductor track, can be produced by electrodeposition of a metal layer 10 on a seed layer 11. The metal layer 10 may be, for example, a gold layer. Since the heating element 14 can be formed from the same material as the p-contact 8 and, in particular, can be produced using the same manufacturing process, the heating element 14 can be realized with comparatively low manufacturing effort.

[0051] As can be seen in the top view in FIG. 1B, the heating element 14 can be designed as a conductor track, the length of which preferably essentially corresponding to the length of the ridge waveguide 13. In this way, it can be achieved that the active layer 4 is uniformly heated by the heating element 14. The heating element 14 comprises an ohmic resistance, which in particular results from the length and the cross-sectional area of the heating element 14. The ohmic resistance, and thus the heating power or the current/voltage operating point, can be adjusted by, in particular, the material, the layer thickness, the width and/or the length of the heating element 14. For example, the layer thickness of the heating element 14 can be between 1 μm and 10 μm, in particular about 5 μm. The width of the heating element 14 is preferably between 5 μm and 30 μm.

[0052] The heating element 14 can comprise contact pads at its ends for making electrical contact. By energizing the heating element, a heating power is generated by which the semiconductor layer sequence 2 including the active layer 4 can be heated. By adjusting the heating power, the temperature-dependent emission wavelength of the laser diode chip can be influenced in a targeted manner. Here it is advantageous that the heating element 14 is arranged directly above the semiconductor layer sequence 2 of the laser diode chip, in particular therefore not on a carrier or a heat sink 1 of the laser diode chip. In this way, direct thermal contact with the semiconductor layer sequence can be advantageously achieved. The mass to be heated is therefore advantageously small. The heating element 14 described here can therefore be used for fast and effective control of the temperature of the semiconductor layer sequence and of the emission wavelength dependent on the temperature.

[0053] The laser diode chip is advantageously connected to a heat sink 1 at the n-contact 9. In this case, the light-emitting active layer 4 is located between the heating element 14 and the heat sink 1. The enables efficient heating of the active layer 4, since no parasitic heat paths exist between the heating element 14 and the heat sink 1.

[0054] Two variants are basically conceivable for the electrical connection of the heating element 14, which are shown in FIGS. 2A and 2B. FIG. 2A shows a variant in which the circuits for the laser diode chip and the heating element 14 are completely separate. For example, the heating element 14 comprises two contacts h+, h− which are separated from contacts p, n of the laser diode chip. This makes the control of the actuation simple, but requires four electrical contacts with a corresponding effort in contacting. The previously shown exemplary embodiment of FIGS. 1A to 1C shows such a variant.

[0055] As shown in FIG. 2B, a contact h of the heating element 14 may alternatively be connected to a contact p of the laser diode chip, preferably the p-contact. This common contact can be used to independently control the current flow through the laser diode chip and the heating element 14 when the laser diode chip and the heating element 14 are operated simultaneously. To simplify the control, it is also conceivable to operate the laser diode chip and the heating element 14 only alternately and not simultaneously.

[0056] An exemplary embodiment of the laser diode chip in which the heating element 14 and the laser diode chip comprise a common contact is shown in FIGS. 3A to 3D. In this exemplary embodiment, the heating element 14 is a part of a metal layer 8, 10 implemented as a conductor track, which may comprise gold in particular. In this example, the metal layer 8, 10 forms both the heating element 14 and the p-contact 8. This has the advantage that no further layers need to be applied for the manufacture of the heating element 14 and thus the manufacturing effort is low. FIG. 3A shows a cross-section of the laser diode chip. FIG. 3B shows how the heating element 14 is designed as a conductor track by omitting the metal layer. The detailed view in FIG. 3C shows a contact pad 14a for the heating element 14. As can be seen in the further detailed view in FIG. 3D, one end of the conductor track forming the heating element 14 is connected to the p-contact 8.

[0057] FIG. 4A shows in cross-section a variation of the previous embodiment. In this example, the heating element 14 is formed by the patterned seed layer 11. Since the seed layer 11 is thinner and comprises a higher resistivity than the metal layer forming the p-contact 8, the ohmic resistance is higher than in the example of FIG. 3, all other dimensions being equal. This allows other heating powers and/or other current/voltage operating points to be realized.

[0058] The two cross-sections shown in the examples of FIGS. 3A and 4A can also be arranged alternately parallel to the longitudinal axis of the ridge waveguide 13. Such an example is shown schematically in plan view in FIG. 4B. In this example, the cross-section along line AB corresponds to FIG. 4A and the cross-section along line CD corresponds to the example shown in FIG. 3A. In the longitudinal direction, the heating element 14 comprises alternating first regions in which only the seed layer 11 is present and second regions in which an additional metal layer 10 is applied to the seed layer 11. The metal layer 10 is, for example, a gold layer with a thickness of about 1 μm to 20 μm, in particular about 5 μm, which is preferably produced by electroplating. The metal layer 10 comprises in particular the same material as the p-contact 8 and can be manufactured and structured simultaneously with the p-contact 8. Current can flow with lower resistance through the first regions of the heating element 14 with the metal layer 10, while the resistance is higher in the second regions without a metal layer above the seed layer 11. The ratio between the first regions and the second regions is another design parameter that can be used to adjust the ohmic resistance of the heating element 14.

[0059] FIGS. 5 and 6 show further variations of the previous examples. In these examples, the heating element 14 is arranged directly above the ridge waveguide 13, but in contrast to FIG. 1 not above the p-type contact 8. The supply of the operating current for the laser diode chip takes place from the laterally arranged p-type contact 8 via the seed layer 7 to the ridge waveguide 13. The seed layer 7 is electrically insulated in regions from the p-type semiconductor region 5 by a passivation layer 6, for example a silicon oxide layer or a silicon nitride layer. A further passivation layer 12 is applied to this seed layer 7 in the region of the ridge waveguide 13 as electrical insulation. A seed layer 11 is arranged on the passivation layer 12. The seed layer 11 can comprise, for example, titanium, platinum, palladium and/or gold, and in particular the seed layer 11 can comprise a Ti—Pd—Au or Ti—Pt—Au layer sequence.

[0060] In the exemplary embodiment of FIG. 5, the seed layer 11 itself functions as the heating element 14. In this example, in particular, no further metal layer is arranged over the seed layer. The heating element is advantageously arranged above the ridge waveguide 13 so that the heating power reaches the radiation-emitting active layer particularly effectively. The heating element 14 is thus arranged close to the ridge waveguide 13 and on the side facing away from the heat sink 1. Compared with FIG. 1, there is no heat spreading due to the p-contact 8 and the associated loss of heating power. Compared to the examples of FIGS. 3 and 4, parasitic heat paths through the semiconductor material and the associated losses in heating power are dispensed with.

[0061] In the exemplary embodiment of FIG. 6, the seed layer 11 with an applied metal layer 10 acts as heating element 14.

[0062] The metal layer 10 is, for example, a gold layer with a thickness of about 1 μm to 20 μm, in particular about 5 μm, which is preferably produced by electroplating. The metal layer 10 comprises in particular the same material as the p-contact 8 and can be manufactured and structured simultaneously with the p-contact 8.

[0063] As in the previous example of FIG. 4B, an alternating arrangement in the longitudinal direction of the heating element 14 of first regions in which only the seed layer 11 is present and second regions in which a metal layer 10 is applied to the seed layer 11 is also conceivable in the examples of FIGS. 5 and 6.

[0064] FIG. 7 shows another possibility of placing the heating element 14 close to the ridge waveguide 13. In this exemplary embodiment, a passivation layer 12 is applied to the seed layer 7, which serves to grow the p-contact 8. A structured conductive seed layer 11 is arranged on the passivation layer 12 as a heating element 14. The seed layer 11 is, for example, a titanium-platinum-gold layer sequence. Heating elements 14 formed in this manner extend into the recess adjacent to the ridge waveguide 13 on both sides, thus bringing the heating power closer to the ridge waveguide 13 than in the embodiment shown in FIG. 4A.

[0065] In addition, it is shown in FIG. 7 that the heating elements 14 can advantageously be mounted on both sides and symmetrically with respect to the ridge waveguide 13. The advantage is that in this way a symmetrical temperature distribution in the ridge waveguide 13 can be achieved. In this way, the beam profile or the distribution of the laser modes of the laser diode chip is prevented from becoming asymmetrical. The symmetrical arrangement of the heating elements 14 is also conceivable in the exemplary embodiments according to FIGS. 3 and 4A.

[0066] FIG. 8 shows another exemplary embodiment of the laser diode chip. In this example, the heating element 14 is not a structure of the layers deposited on the semiconductor material, but the semiconductor material itself. The heating current is supplied via a heating contact, in particular a metal layer 10, and flows from there to the p-type contact 8. In this way, in addition to the current path 16 leading through the active layer 4 to the n-type contact 9, a further current path 15 is generated in the p-type semiconductor region 5, which does not lead to the n-type contact. The current flow along this current path 15 heats the semiconductor material so that the p-type semiconductor region 5 acts as a heating element. The advantage in this embodiment is, first, that the semiconductor material itself is directly heated, and second, that no fine patterning of the layers is necessary. However, in this embodiment, it should be prevented, if possible, that heating current flows on a parasitic current path to the n-contact 9. One possibility is that the heating element 14 and the laser diode chip are not operated simultaneously, as described above.

[0067] All of the previously described exemplary embodiments are characterized by the fact that the additional effort required in the manufacture of the laser diode chip is minimal, since the heating elements 14 can each be implemented with materials that are applied anyway during the manufacture of the laser diode chip. In addition, the heating elements 14 do not influence the performance data of the laser diode chip, or only to a small extent, so that the laser diode chips have no disadvantages compared to structurally identical laser diode chips without heating elements.

[0068] Due to the low mass to be heated, low heating powers are necessary to bring the active layer 4 to the target temperature and thus stabilize the wavelength. This also allows for high heating rates to achieve fast wavelength matching. Due to the low mass, faster cooling rates are also achieved when the laser diode chip is thermally connected to a heat sink 1. This allows agile control of the temperature and thus the emission wavelength.

[0069] Control of the emission wavelength can also be used to compensate for any production-related dispersion of the wavelength of multiple laser diode chips by controlling the temperature of the laser diode chip as a function of wavelength so that the laser emits at the desired wavelength.

[0070] For example, when the heating element 14 of the laser diode chip is used to control the emission wavelength, the control can be accomplished by directing at least a portion of the emitted radiation to an optical filter that comprises a transmission window at the desired emission wavelength. In other words, the optical filter is a narrow band filter that is transparent only in a narrow wavelength range around the desired emission wavelength. In this case, the heating power of the heating element can be controlled such that a detector element behind the narrowband optical filter detects a maximum intensity. When the wavelength of the emitted radiation changes, the heating power can be controlled such that the intensity detected by the detector element is maximized.

[0071] The invention is not limited by the description based on the exemplary embodiments. Rather, the invention encompasses any new feature as well as any combination of features, which particularly includes any combination of features in the claims, even if this feature or combination itself is not explicitly specified in the claims or exemplary embodiments.

LIST OF REFERENCE SIGNS

[0072] 1 heat sink

[0073] 2 semiconductor layer sequence

[0074] 3 n-type semiconductor region

[0075] 4 active layer

[0076] 5 p-type semiconductor region

[0077] 6 passivation layer

[0078] 7 seed layer

[0079] 8 p-type contact

[0080] 9 n-contact

[0081] 10 metal layer

[0082] 11 seed layer

[0083] 12 passivation layer

[0084] 13 ridge waveguide

[0085] 14 heating element

[0086] 14a contact pad

[0087] 15 current path

[0088] 16 current path