BAW RESONATOR WITH IMPROVED TOP ELECTRODE CONNECTION

Abstract

A BAW resonator comprises a bottom electrode, a piezoelectric layer and a top electrode. A top electrode connection is arranged in a plane above the top electrode. For doing this a spacer is arranged on the top electrode. A capping layer is sitting on the spacer distant from the top electrode such that an air-filled gap to the top electrode is kept. The top electrode connection can now be arranged above the capping layer. An electrically conductive path connects the top electrode and the top electrode connection. Such a resonator needs only one lateral design and can provide a low-ohmic interconnection of resonators e.g. in a filter circuit.

Claims

1. A BAW resonator, comprising a bottom electrode; a piezoelectric layer; a top electrode; a spacer arranged on the top electrode; a capping layer sitting on the spacer and keeping an air-filled gap to the top electrode; a top electrode connection arranged above the capping layer; and an electrically conductive path connecting top electrode and top electrode connection.

2. The BAW resonator of claim 1, wherein the spacer is a conductive frame sitting on a margin of an active resonator area to provide the electrically conductive path.

3. The BAW resonator of claim 1, wherein the capping layer is a dielectric layer with release holes; and wherein an organic sealing layer covers the capping layer.

4. The BAW resonator of claim 1, wherein the spacer is a conductive frame sitting on a margin of an active resonator area; wherein an organic sealing layer covers the capping layer; wherein a top metal layer is arranged on top of the organic sealing layer; and wherein an electrical contact between the spacer and the top metal layer is made by the organic sealing layer being filled with a conductive filler, or by a frame-like or frame-shaped through-contact through the organic sealing layer, the latter being electrically isolating.

5. The BAW resonator of claim 1, wherein the piezoelectric layer, the top electrode, the spacer and the organic sealing layer are structured to have the same first base area wherein the bottom electrode has second base area larger than the first base area to enable use of the bottom electrode as an etch-stop layer.

6. The BAW resonator of claim 1, wherein a multitude of similar BAW resonators are arranged one besides the other on a common substrate; wherein between each of the BAW resonators and the substrate a Bragg mirror is arranged; wherein the bottom electrode and the Bragg mirrors under each of the BAW resonators are structured and hence electrically isolated against each other; wherein the space between the BAW resonators on the substrate is filled with a filler dielectric; wherein the filler dielectric has a planarized surface; and wherein the top electrode connection is arranged on top of the planarized surface of the filler dielectric.

7. The BAW resonator of claim 1, comprising lateral structures on top of the top electrode inwardly adjacent to the conductive frame, the lateral structures having mainly a constant cross section and adapted to confine and form the main mode.

8. A method of forming a BAW resonator, comprising A) arranging on a substrate a Bragg mirror by depositing and structuring an alternating sequence of high and low impedance layers; B) forming on top of the topmost low impedance layer a bottom electrode layer and structuring the same; C) depositing a piezoelectric layer on the bottom electrode; D) depositing and structuring a top electrode layer on the piezoelectric layer; E) forming a frame-like conductive spacer on the top electrode layer in a margin area surrounding an active area of the BAW resonator; F) forming a capping layer on the conductive spacer keeping an air-filled gap to the top electrode layer; and G) forming a top electrode connection by depositing and structuring a metal layer above the capping layer.

9. The method of claim 8, comprising after step E): E1) depositing and structuring a sacrificial layer (OS); F1) forming the capping layer on the sacrificial layer; F2) forming release holes in the capping layer; F3) removing the sacrificial layer through the release holes by dry or wet etching or dissolving in a solvent; F4) depositing a sealing layer on the capping layer; and G) forming a top electrode connection above the capping layer by depositing and structuring a metal layer having electrical contact to the conductive spacer.

10. The method of claim 9, wherein steps A) to F) or A) to F4) comprise parallel processing of a multitude of BAW resonators arranged adjacent to each other on the surface of the substrate such that the multitude of BAW resonators are completely separated from each other; wherein in a step F5) performed after step F) or F4), a filler dielectric is deposited over the entire surface to fill the spaces between the separated BAW resonators; and wherein in a step F6), the surface of the filler dielectric is planarized in a CMP process.

11. The method of claim 8, wherein step G) comprises forming a frame-like or frame-shaped through contact through the sealing layer and applying a metal layer for the top electrode connection in direct contact with a top of the frame-shaped through contact.

12. The method of claim 8, wherein in a step F5), a metal top is formed above each BAW resonator on top of the sealing layer terminating in lateral directions with the outer edge of the frame-shaped through contact.

13. The method of claim 10, wherein in the planarizing step F6), the surface of the metal top is exposed; and wherein in step G), the top electrode connection connects metal tops of different BAW resonators or to an I/O pad or to LC elements.

Description

[0018] In the following the invention will be explained in more detail with reference to preferred embodiments and the accompanied figures. The figures are drawn schematically only and not to scale. Hence, neither relative nor absolute dimensions can be gathered from the drawings.

[0019] FIG. 1 shows a Bragg mirror deposited on a substrate in a schematic cross-section

[0020] FIG. 2 shows the arrangement of FIG. 1 after applying and structuring a bottom electrode

[0021] FIG. 3 shows the arrangement of FIG. 2 after applying a piezoelectric layer

[0022] FIG. 4 shows the arrangement of FIG. 3 after applying and structuring a top electrode layer

[0023] FIG. 5 shows the arrangement of FIG. 4 after applying and structuring lateral structures on the top electrode layer

[0024] FIG. 6 shows the arrangement of FIG. 5 after applying a conductive spacer

[0025] FIG. 7 shows the arrangement after applying and structuring a sacrificial layer

[0026] FIG. 8 shows the arrangement after applying and structuring a capping layer

[0027] FIG. 9 shows the arrangement after removing the sacrificial layer

[0028] FIG. 10 shows the arrangement after applying and structuring an electrically conductive sealing layer

[0029] FIG. 11A shows the arrangement of FIG. 10 after applying and structuring a top metal layer on an electrically conductive sealing layer

[0030] FIG. 11B shows the arrangement of FIG. 11A where additionally the piezoelectric layer is structured to flush with an outer edge of the spacer

[0031] FIG. 12 shows the arrangement of FIG. 9 after applying and structuring an electrically isolating sealing layer

[0032] FIG. 13 shows the arrangement of FIG. 12 after producing a frame-like through-contact

[0033] FIG. 14A shows the arrangement of FIG. 13 after applying and structuring a top metal layer

[0034] FIG. 14B shows a similar arrangement like FIG. 14A with a piezoelectric layer structured to flush with an outer edge of the spacer

[0035] FIG. 15 shows an arrangement of at least two adjacently arranged BAW resonators according to FIG. 11B after filling the space between the BAW resonators with a filler dielectric

[0036] FIG. 16 shows an arrangement of at least two adjacently arranged BAW resonators according to FIG. 14B after filling the space between the BAW resonators with a filler dielectric

[0037] FIG. 17 shows a schematic block diagram of a filter circuit using the proposed BAW resonator.

[0038] On a suitable substrate SU like silicon for example an acoustic Bragg mirror BM is formed and structured. The Bragg mirror BM comprises two mirrors M1, M2 respectively formed of a pairs of mirror layers. In the Bragg mirror BM, high impedance layer HI and low impedance layers LI are alternating. The mirror layers may slightly vary in thickness to set a desired reflection band. High impedance layer HI may comprise W and low impedance layers LI comprise SiO.sub.2. Additional thin adhesion or orientation-promoting layers may be deposited below a mirror pair, e.g. Ti or AlN. Each conductive high impedance mirror layer HI is structured to be restricted to the area of the later resonator. Low impedance layers LI need not be structured.

[0039] Optionally CMP planarization of the topmost mirror layer of SiO.sub.2 can be employed for the mirror layers and or the later bottom electrode layers.

[0040] FIG. 1 shows the completed Bragg mirror BM in a schematic cross-section.

[0041] FIG. 2 shows the arrangement of FIG. 1 after applying a bottom electrode layer BE and structuring to the desired active area of the later resonator. The bottom electrode BE is formed using a highly conductive AlCu layer and a high impedance layer e.g. a W layer or a Mo layer. Again a thin adhesion or orientation-promoting layer may be employed between the bottom electrode and uppermost mirror, e.g. Ti or AlN. Also a capping and/or etch-stop layer such as TiN may be applied to the top of the AlCu layer to allow patterning of additional resonator detuning material located between the Tungsten and AlCu layer of the bottom electrode BE.

[0042] Atop the bottom electrode BE a piezoelectric layer PL of e.g. AlN or AlScN is formed. The thickness thereof is set to lower than half the wavelength of the desired resonance frequency due the additional mass loading effect from being attached to the top/bottom electrodes BE and mirror M. FIG. 3 shows the arrangement after applying a piezoelectric layer.

[0043] A top electrode TE may be formed from a stack of layers. The conductive metal may selected from the same group of metals like the bottom electrode. The stack may e.g. comprise when starting from the top surface of the piezoelectric layer PL a thin adhesive layer like a Ti layer for example, a conductive layer e.g. a tungsten layer and an AlCu layer, a thin TiN layer and optionally a dielectric layer of e.g. SiN are deposited. The SiN layer provides device passivation and can serve as frequency fine-tuning trimming layer.

[0044] FIG. 4 shows the arrangement after applying and structuring the top electrode layer TE.

[0045] On the top electrode layer TE near the outer edge thereof a lateral structure LS is formed that is suitable to support the acoustic main mode and to suppress undesired spurious lateral modes by reflection thereof if optimally designed. Further, by these lateral structures a lateral velocity profile is formed. These lateral structures are known from the art and may be formed from a metal and/or a dielectric. FIG. 5 shows the arrangement at this stage.

[0046] In the next step a conductive spacer CS is deposited and structured. The spacer may comprise the same metal like the top electrode, e.g. Tungsten, Mo or AlCu. However, any other conductive material is also possible. The spacer is arranged directly adjacent to the outer edge of the top electrode TE. Hence, the edges of both structures are flushing. FIG. 6 shows the arrangement with the conductive spacer CS. Due to the reflective effect of the lateral structures LS there is very low acoustic energy that can extend outwardly from the center of the resonator to extend over the lateral structures. Hence, there is no mechanical effect of the conductive spacer that may interact with the acoustic wave. The acoustic is not disturbed by the conductive spacers.

[0047] In the next step a sacrificial layer OS is deposited. Preferably a photoresist is used for this purpose to allow direct structuring thereof. The sacrificial layer OS is restricted to the surface of the top electrode that is enclosed by the conductive spacer CS. FIG. 7 shows the arrangement after applying and structuring a sacrificial layer OS.

[0048] On the plane surface of the OS layer a capping layer CL is applied and structured. Release holes RH are provided in the capping layer CL. Further, in an annular margin area of the capping layer CL the outer edge of the conductive spacer CS is exposed. FIG. 8 shows the arrangement after applying and structuring the capping layer CL. SiO.sub.2 or any other suitable dielectric can be used as a preferred material for the capping layer.

[0049] Now the material of the sacrificial layer OS can be removed through the release holes RH preferably by a wet chemical treatment with a solvent for example. Dry etching is also possible and avoids removal of residual wet chemicals.

[0050] FIG. 9 shows the arrangement after that release. Between capping layer CL and top electrode TE an air-filled gap GP has formed.

[0051] In the next step the release holes are closed/sealed with a sealing layer SL. According to a variant a conductive high-viscosity polymer like BCB (Benzocyclobutene) can be used for this purpose. For achieving suitable electrical conductivity, the polymer is filled with a conductive filler. Suitable conductive fillers are chosen from Graphite, Graphene, BCB, carbon nano-tubes, metal nano-particles and metal nano-rods. A structuring step restricts the area of the sealing layer SL to the area of the capping layer CL. FIG. 10 shows the arrangement after applying and structuring a sealing layer.

[0052] An enforcement of the sealing layer SL and a solderable contact pad or a highly conductive conductor line is achieved by a thick top metal layer TM applied by deposition onto the sealing layer SL. A base metallization can be sputtered and structured before enforcing it by plating in a galvanic or current-less step. FIG. 11A shows the arrangement after applying and structuring a top metal layer.

[0053] According to a further variant the piezoelectric layer PL is etched away in those areas where it is exposed and not covered by the top electrode TE. FIG. 11B shows the arrangement which differs from the arrangement of FIG. 11A in that exposed areas of the piezoelectric layer PL have been removed..

[0054] FIG. 11B shows a similar arrangement which starts from the arrangement of FIG. 11 after applying and structuring a top metal layer on an electrically conductive sealing layer. In this example, the sealing layer SL is electrically conductive and exposed areas of the piezoelectric layer PL have been removed.

[0055] In FIG. 12 a variant is shown, wherein contrary to the arrangement of FIG. 10 a non-conducting sealing layer SL is used.

[0056] As the sealing layer SL is non-conductive a through-contact to the conductive spacer CS is necessary. Hence, a frame-like through-contact TC consisting of a metal bump frame can be produced and deposited. This through-contact TC electrically couples to the spacer CS. FIG. 13 shows the so produced arrangement.

[0057] FIG. 14A shows the arrangement after applying and structuring a top metal layer TM onto the sealing layer SL thereby electrically conducting the through-contact TC.

[0058] FIG. 14B shows a similar arrangement like FIG. 14A except to the fact that the piezoelectric layer PL has been structured to flush with an outer edge of the spacer CS. Etching can be done before after applying top metal TM that may serve as an etching mask.

[0059] However, depending on the used etching system any other layer like bottom electrode or a layer applied above the bottom electrode may serve as an etching mask. Of course, additionally applied masks can also be used. Etching of the piezoelectric layer PL may be done at any former stage shown in any of FIGS. 4 to 9.

[0060] This means that the arrangements shown in FIGS. 12 and 14B can be produced another way without using the stage shown in FIG. 14A.

[0061] In FIGS. 1 to 14 single BAW resonators have been shown. However, most applications of BAW resonators use a circuit comprising a multitude of BAW resonators interconnected to each other according to a filter circuit for example. For doing this the top metal layer provides an ideal pad structure for electrically connecting the BAW resonator via its top electrode TE.

[0062] FIGS. 15 and 16 show arrangements of at least two adjacently arranged BAW resonators according to FIGS. 11B and 14B after filling the space between the two shown BAW resonators with a filler dielectric FD. A CVD process using TEOS as a precursor can be used for depositing filler dielectric.

[0063] The top metal TM of the two BAW resonators is connected via a top electrode connection TEC formed by a respective metallic structure applied onto the filler dielectric FD. Similarly the top electrode connection TEC may be guided to other devices (not shown in the figure), to an external terminal or to integrated passive LC elements.

[0064] FIG. 15 complies with the arrangement of FIG. 11B with a conductive sealing layer. FIG. 16 complies with an arrangement according to FIG. 14B with a frame-shaped through-contact through a con-conductive sealing layer SL.

[0065] In a circuit comprising a multitude of BAW resonators interconnected to each other according to FIGS. 15 and 16 electrical contact to the bottom electrode BE is also necessary. Contact can be provided by vias that are etched through the filler dielectric for example. The larger area of the bottom electrode BE extending over the active resonator area can be used as an etch stop when producing respective vias.

[0066] FIG. 17 shows a schematic block diagram of a filter circuit using the proposed BAW resonator in a ladder-type arrangement. The filter circuit comprises series BAW resonators BR.sub.S and parallel BAW resonators BR.sub.P that may be formed according to the invention. In this filter circuit a respective series BAW resonator BR.sub.S and an according parallel BAW resonator BR.sub.P form a basic section BS.sub.LT of the ladder-type arrangement. The total circuit comprises an arbitrary number of basic sections BS.sub.LT that can be circuited in series to achieve a desired filter function.

[0067] The proposed invention provides the following advantages: [0068] No CMP is needed when the piezo layer is removed completely in outer regions because structure inhomogeneities that can arise when the piezoelectric layer is applied over the edges of structured mirror layers are removed and hence do not disturb any more. [0069] only one lateral edge design needs to be optimized [0070] by the new design a size reduction is achieved as resonators can be arranged as close to one another as possible and interconnection routing can be done above (via top electrode connection TEC) and below the piezoelectric instead of in between resonators. [0071] the top surface of each resonator is robust and suitable for a multitude of contacting techniques [0072] the robust top surface of each resonator may allow to omit further packaging [0073] a BAW resonator with lower ohmic losses is achievable when using thick interconnections (top metal TM and top electrode connection TEC) [0074] the BAW resonator has high power durability as the interconnections fulfil an additional function as heat spreaders.

[0075] The invention is not limited by the shown figures and described concrete embodiments and can thus be varied without departing from the scope given by the claims.

LIST OF USED REFERENCE SYMBOLS

[0076] AR active resonator region [0077] BE bottom electrode [0078] BM Bragg mirror [0079] BRP parallel BAW resonator [0080] BRS series BAW resonator [0081] BS basic section of a filter circuit [0082] CL capping layer, e.g. [0083] CP cap [0084] CS conductive spacer, e.g. [0085] FD filler dielectric [0086] GP air-filled gap [0087] HI high impedance mirror layer [0088] LI low impedance mirror layer [0089] M1, M2 mirror (pair of mirror layers) [0090] OS sacrificial layer [0091] PL piezoelectric layer [0092] RH release hole [0093] SL organic sealing layer [0094] SU substrate [0095] TC frame-like through-contact [0096] TE top electrode [0097] TEC top electrode connection [0098] TM top metal layer