Integrated package structure for MEMS element and ASIC chip and method for manufacturing the same

Abstract

An integrated package method for MEMS element and ASIC chip includes forming a re-layout layer on a front surface of an ASIC wafer; coating an organic compound layer on the re-layout layer and applying a lithography process to the organic compound layer to from a microcavity array; aligning and bonding an electrode connection pad layer on a front surface of an MEMS element with the microcavity array to form a closed cavity structure; thinning and exposing a silicon substrate on a back surface of the MEMS element to a desired thickness; applying the lithographic process on the MEMS element to expose the electrode connection pad layer and an electrical contact area of the re-layout layer; and manufacturing a metal connection member connected to the electrode connection pad layer and the electrical contact area. An integrated package structure for MEMS element and ASIC chip is also provided.

Claims

1. An integrated package method for MEMS element and ASIC chip, the integrated package method comprising: applying a lithographic process on an ASIC wafer to deposit and form a re-layout layer; spin-coating an organic compound layer on the re-layout layer to form a bonding layer, and applying the lithography process to the bonding layer to form a microcavity array; aligning and bonding an electrode connection pad layer on a front surface of an MEMS element with the microcavity array to form a closed cavity structure; thinning and polishing a silicon substrate on a back surface of the MEMS element being bonded to a desired thickness; applying the lithographic process on the MEMS element to form a connection portion outwardly protruding from the electrode connection pad layer, and forming an open hole on the bonding layer to expose an electrical contact area of the re-layout layer; and manufacturing a metal connection member on the connection portion and the bonding layer so as to allow the electrode connection pad layer to be electrically connected to the electrical contact area.

2. The integrated package method according to claim 1, wherein the MEMS element is an ultrasonic sensor, a bulk acoustic wave sensor, or a piezoelectric energy storage device.

3. The integrated package method according to claim 1, wherein in the MEMS element, the silicon substrate is stacked on an oxidation layer, the oxidation layer is staked on a lower electrode layer, the lower electrode layer is stacked on a piezoelectric layer, the piezoelectric layer is stacked on an upper electrode layer, the upper electrode layer is stacked on a surface passivation layer, and the surface passivation layer is stacked on the electrode connection pad layer.

4. The integrated package method according to claim 1, wherein the re-layout layer is an aluminum (Al) layer, a copper (Cu) layer, or an aluminum copper alloy (Al/Cu) layer.

5. The integrated package method according to claim 1, wherein the bonding layer is made of benzocyclobutene (BCB).

6. The integrated package method according to claim 1, wherein the closed cavity structure is a vacuum closed cavity.

7. The integrated package method according to claim 1, wherein in the step of thinning and polishing a silicon substrate on a back surface of the MEMS element being bonded to a desired thickness, the desired thickness is less than or equal to 10 μm.

8. The integrated package method according to claim 1, wherein the electrode connection pad layer is an aluminum (Al) layer, a copper (Cu) layer, or an aluminum cooper alloy (Al/Cu) layer.

9. The integrated package method according to claim 1, wherein the metal connection member is a solder pad, a lead wire, or a solder ball.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The disclosure will become more fully understood from the detailed description given herein below for illustration only, and thus not limitative of the disclosure, wherein:

(2) FIG. 1 illustrates a cross-sectional view of an integrated package structure according to an exemplary embodiment of the instant disclosure;

(3) FIG. 2 illustrates a cross-sectional view showing a step of an integrated package method according to an exemplary embodiment of the instant disclosure, where the step is forming a re-layout layer;

(4) FIG. 3 illustrates a cross-sectional view showing a step of the integrated package method of the exemplary embodiment, where the step is forming a bonding layer;

(5) FIG. 4 illustrates a cross-sectional view showing a step of the integrated package method of the exemplary embodiment, where the step is bonding to form a closed cavity structure;

(6) FIG. 5 illustrates a cross-sectional view showing a step of the integrated package method of the exemplary embodiment, where the step is thinning and polishing; and

(7) FIG. 6 illustrates a cross-sectional view showing a step of the integrated package method of the exemplary embodiment, where the step is forming a connection portion.

DETAILED DESCRIPTION

(8) The instant disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. The drawings of the present invention are merely illustrative for easier understanding of the instant disclosure, and the specific proportions thereof can be adjusted according to design requirements. The above-described relative relationship of the elements in the drawings described herein will be understood by those skilled in the art to refer to the relative positions of the members, and therefore, the same members may be turned over and the like, which are all within the scope of the instant disclosure.

(9) As shown in FIG. 1, an integrated package structure for MEMS element and ASIC chip according to an exemplary embodiment of the instant disclosure is illustrated. The integrated package structure comprises an ASIC wafer 100, an MEMS element 200, a re-layout layer 300, a bonding layer 400, and a metal connection member 500. The re-layout layer 300 is on a surface of the ASIC wafer 100 and comprises an electrical contact area. The re-layout layer 300 is an aluminum (Al) layer, a copper (Cu) layer, or an aluminum copper alloy layer (Al/Cu) layer. The bonding layer 400 is on a surface of the re-layout layer 300 and comprises a microcavity array 410 and an open hole. The open hole corresponds to the electrical contact area. The bonding layer 400 is made of benzocyclobutene (BCB) or other organic compound(s).

(10) Please refer to FIG. 6. The electrode connection pad layer 270 of the MEMS element 200 is aligned and bonded with the microcavity array 410 of the bonding layer 400 to form a closed cavity structure. A connection portion 271 is outwardly protruding from the electrode connection pad layer 270. The closed cavity structure is a vacuum closed cavity. The electrode connection pad layer 270 is an aluminum (Al) layer, a copper (Cu) layer, or an aluminum copper alloy (Al/Cu) layer. The metal connection member 500 is electrically connected to the connection portion 271 and the electrical contact area 310. The metal connection member 500 is a solder pad, a lead wire, or a solder ball.

(11) The MEMS element 200 is a multi-layer thin film stacked structure array, and the MEMS element 200 sequentially comprise a silicon substrate 210, an oxidation layer 220, a lower electrode layer 230, a piezoelectric layer 240, an upper electrode layer 250, a surface passivation layer 260, and an electrode connection pad layer 270. A thickness of the silicon substrate 210 is about in a range from 200 to 500 μm. The lower electrode layer 230 may be selected from a group consisting of molybdenum (Mo), aluminum (Al), and copper (Cu). The piezoelectric layer 240 may be made of aluminum nitride (AlN), and a thickness of the piezoelectric layer 240 may be in a range from 0.1 to 5 mm. The upper electrode layer 250 may be selected from a group consisting of molybdenum (Mo), aluminum (Al), and copper (Cu). The surface passivation layer 260 may be made of silicon dioxide (SiO.sub.2). The electrode connection pad layer 270 may be an aluminum (Al) layer, a copper (Cu) layer, or an aluminum copper alloy (Al/Cu) layer. However, the MEMS element 200 herein is provided for illustrative purposes, but not limitations to the embodiments of the instant disclosure. The MEMS element 200 may be an ultrasonic sensor, a bulk acoustic wave sensor, a piezoelectric energy storage device, or the like.

(12) Preferably, in some embodiments, after the package procedure is completed, the thickness of the silicon substrate 210 is not greater than 10 mm. The lower electrode layer 230 adopts Mo, the piezoelectric layer 240 adopts AlN, and the thickness of the piezoelectric material layer is in a range from 0.1 to 5 mm. The upper electrode layer 250 adopts Al. The surface passivation layer 260 and the oxidation layer 220 adopt silicon dioxide. The electrode connection pad layer 270 adopts AlN. The circuit in the ASIC wafer 100 is a signal processing circuit corresponding to the MEMS element 200.

(13) Please refer to FIG. 2. According to one or some embodiments of the instant disclosure, an integrated package method for MEMS element and ASIC chip is also provided. The integrated package method may be accomplished in chip or wafer scales. The integrated package method mainly includes following step (1) to step (6).

(14) Step (1): as shown in FIG. 2, a re-layout layer 300 is manufactured on the ASIC wafer 100 so as to re-layout the electrode connection pad layer 270 of the MEMS element 200, and the re-layout layer 300 is provided as an electrical contact area for components subsequently stacked on the electrode connection pad layer 270. Step (2): as shown in FIG. 3, by spin-coating, an organic compound layer is manufactured on the re-layout layer 300 to from a bonding layer 400, and a lithography process is applied to the bonding layer 400 to form a microcavity array 410.

(15) Step (3): as shown in FIG. 4, for the MEMS element 200, in a wafer to wafer or a chip to wafer manner, the electrode connection pad layer 270 of the MEMS element 200 and the microcavity array 410 are aligned with each other, and are bonded with each other in a vacuum condition to form a closed cavity structure. Step (4): as shown in FIG. 5, the silicon substrate 210 of the MEMS element 200 which is already bonded to the ASIC wafer 100 is thinned and polished to a desired thickness, thereby ensuring the performance of the MEMS element 200.

(16) Step (5): as shown in FIG. 6, an etching process is applied to expose a portion of the electrode connection pad layer 270 on the front surface of the MEMS element 200 to form a connection portion 271 outwardly protruding from the electrode connection pad layer 270, and an open hole is formed on the bonding layer 400 to expose the electrical contact area 310 of the re-layout layer 300. The etching applied to the silicon substrate 210 of the MEMS element 200 may be the deep reactive-ion etching (DRIE). The etching applied to the oxidation layer 220 and the bonding layer 240 may be reactive-ion etching (RIE).

(17) Step (6): as shown in FIG. 1, a metal connection member 500 is manufactured on the connection portion 271 and the bonding layer 400 so as to allow the electrode connection pad layer 270 to be electrically connected to the electrical contact area 310. The metal connection member 500 may be a patterned Al electrode, and the metal connection member 500 may be solder pad, a lead wire, or a solder ball.

(18) Furthermore, before the metal connection member 500 is manufactured, a dielectric layer may be manufactured in advance for electrical isolation. The dielectric layer may adopt inorganic dielectric materials such as silicon dioxide (SiO.sub.2), silicon nitride (Si.sub.3N.sub.4), and the like, or may adopt organic dielectric materials such as polyimide (PI), benzocyclobutene (BCB), and the like.

(19) While the instant disclosure has been described by the way of example and in terms of the preferred embodiments, it is to be understood that the invention need not be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, the scope of which should be accorded the broadest interpretation so as to encompass all such modifications and similar structures.