Orthogonal precoding for sidelobe suppression

Abstract

A transmitter of a DFT-based communications system including an orthogonal precoder for transforming modulated data symbols using a unitary transform, wherein the data 5 symbols are mapped to subcarriers of the transmitter and the computational complexity of the transform is linear with respect to the number of the subcarriers.

Claims

1. A transmitter of a DFT-based communications system including: an orthogonal precoder for transforming modulated data symbols using a unitary transform that controls out-of-band power; wherein the data symbols are mapped to subcarriers of the transmitter and the computational complexity of said transform is linear with respect to the number of the subcarriers, wherein said transform is a generalised Householder transform, wherein a block reflector is the generalised Householder transform, and said precoder generates a precoded symbol vector
ξ=x−G(G.sup.Hx), for each uncoded symbol vector x of the modulated data symbols, and G is a matrix that controls out-of-band power spectral density of the transmitter and G.sup.H is its conjugate transpose.

2. The transmitter as claimed in claim 1, wherein said precoder further applies a generalised Householder reflection on other subcarriers to reduce PAPR.

3. A transmitter of a DFT-based communications system including: an orthogonal precoder for transforming modulated data symbols using a unitary transform that controls out-of-band power; wherein the data symbols are mapped to subcarriers of the transmitter and the computational complexity of said transform is linear with respect to the number of the subcarriers, wherein said transform is generalised Householder transform, wherein said generalised Householder transform uses successive Householder reflections by applying a predetermined set of Householder vectors g.sub.1, . . . , g.sub.R, and the precoder generates a precoded symbol vector ξ from each uncoded symbol x of the modulated data symbols by executing: a) Set i:=1 and set ξ:=x, b) Update ξ so that ξ:=ξ−g.sub.i(g.sub.i.sup.H ξ), c) Increment i, d) If i≤R, repeat from step b), otherwise finish and R is a constant.

4. The transmitter as claimed in claim 3, wherein said precoder further applies a generalised Householder reflection on other subcarriers to reduce PAPR.

5. A transmitter of a DFT-based communications system including: an orthogonal precoder for transforming modulated data symbol using a unitary transform that controls out-of-band power; wherein the data symbol are mapped to subcarriers of the transmitter and the computational complexity of said transform is linear with respect to the number of the subcarriers, wherein said transform is a generalised Householder transform, wherein said generalised Householder transform uses a WY representation and Householder vectors g.sub.1, . . . , g.sub.R are combined into matrices W and Y by performing: a) Set W:=−g.sub.1, Y:=g.sub.1 and i:=2, b) Update W and Y so that W:=(W, −g.sub.i−WY.sup.Hg.sub.i) and Y:=(Y,g.sub.i), c) Increment i, d) If i≤R, repeat from step b), otherwise finish; and R is a constant and a precoded symbol vector ξ is generated from each uncoded symbol x of the modulated data symbols by executing ξ=x+W(Y.sup.Hx).

6. The transmitter as claimed in claim 5, wherein said precoder further applies a generalised Householder reflection on other subcarriers to reduce PAPR.

7. A receiver of a DFT-based communications system including: an orthogonal decoder that controls out-of-band power using a unitary transform for recovering modulated data symbols from precoded symbol vectors having data symbols allocated to subcarriers of the receiver, wherein that the computational complexity of the transform is linear with respect to the number of the subcarriers, wherein said transform is a generalised Householder transform, and using a block reflector as the generalised Householder transform, wherein the decoder recovers the uncoded symbol vector
x=ξ−G(G.sup.Hξ), of the modulated data symbols from each received precoded symbol vector ξ, where G is a matrix that controls out-of-band power spectral density and G.sup.H is its conjugate transpose.

8. The receiver as claimed in claim 7, wherein said decoder further applies a generalised Householder reflection to recover modulated data symbols of other subcarriers encoded to reduce PAPR.

9. A receiver of a DFT-based communications system including: an orthogonal decoder that controls out-of-band power using a unitary transform for recovering modulated data symbols from precoded symbol vectors having data symbols allocated to subcarriers of the receiver, wherein, that the computational complexity of the transform is linear with respect to the number of the subcarriers, wherein said transform is generalised Householder transform, and wherein said generalised Householder transform uses successive Householder reflections by applying a predetermined set of Householder vectors g.sub.1, . . . , g.sub.R, in an opposite order to decode precoded symbols.

10. The receiver as claimed in claim 9, wherein said decoder further applies a generalised Householder reflection to recover modulated data symbols of other subcarriers encoded to reduce PAPR.

11. A receiver of a DFT-based communications system including: an orthogonal decoder that controls out-of-band power using a unitary transform for recovering modulated data symbols from precoded symbol vectors having data symbols allocated to subcarriers of the receiver, wherein that the computational complexity of the transform is linear with respect to the number of the subcarriers, wherein said transform is a generalised Householder transform, and wherein said generalised Householder transform uses a WY matrix representation and each received precoded symbol vector ξ is decoded to recover an uncoded symbol vector of said data symbols by executing x=ξ+W(Y.sup.Hξ).

12. The receiver as claimed in claim 11, wherein said decoder further applies a generalised Householder reflection to recover modulated data symbols of other subcarriers encoded to reduce PAPR.

13. An orthogonal precoding process for a DFT based communications systems, including: receiving modulated data symbols as a data vector; and applying a unitary transform to said data vector that controls out-of-band power, wherein said transform is a generalised Householder transform, and wherein a block reflector is the generalized Householder transform, and the process generates a precoded symbol vector
ξ=x−G(G.sup.Hx), for each uncoded symbol vector x of the modulated data symbols, and G is a matrix that controls out-of-band power spectral density of a transmitter and G.sup.H is it conjugate transpose.

14. The orthogonal precoding process as claimed in claim 13, further including using a generalised Householder reflection on subcarriers of a transmitter to reduce PAPR and in a receiver to recover modulated data symbols of the subcarriers.

15. An orthogonal precoding process for a DFT based communications systems, including: receiving modulated data symbols as a data vector; and applying a unitary transform to said data vector that controls out-of-band power, wherein said transform is a generalised Householder transform, and wherein said generalised Householder transform uses successive Householder reflections by applying a predetermined set of Householder vectors g.sub.1, . . . , g.sub.R, and the process generates a precoded symbol vector ξ from each uncoded symbol x of the modulated data symbols by executing: d) Set i:=1 and set ξ:=x, e) Update ξ so that ξ:=ξ−g.sub.i(g.sub.i.sup.Hξ), f) Increment i, d) If i≤R, repeat from step b), otherwise finish and R is a constant.

16. The orthogonal precoding process as claimed in claim 15, further including using a generalised Householder reflection on subcarriers of a transmitter to reduce PAPR and in a receiver to recover modulated data symbols of the subcarriers.

17. An orthogonal precoding process for a DFT based communications systems, including: receiving modulated data symbols as a data vector; and applying a unitary transform to said data vector that control out-of-band power, wherein said transform is a generalised Householder transform, and wherein said generalised Householder transform uses a WY representation and Householder vectors g.sub.1, . . . , g.sub.R are combined into matrices W and Y by performing: e) Set W:=−g.sub.1, Y:=g.sub.1 and i:=2, f) Update W and Y so that W:=(W, −g.sub.i−WY.sup.Hg.sub.i) and Y:=(Y, g.sub.i), g) Increment i, h) If i≤R, repeat from step b), otherwise finish; and R is a constant and a precoded symbol vector ξ is generated from each uncoded symbol x of the modulated data symbols by executing ξ=x+W(Y.sup.Hx).

18. The orthogonal precoding process as claimed in claim 17, further including using a generalised Householder reflection on subcarriers of a transmitter to reduce PAPR and in a receiver to recover modulated data symbols of the subcarriers.

Description

DRAWINGS

(1) Preferred exemplary embodiments of the present invention will now be described further with reference to the accompanying drawings wherein:

(2) FIG. 1 is a block diagram of a DFT-based communications system;

(3) FIG. 2 is a flow chart of an orthogonal precoding process used by the system; and

(4) FIG. 3 is a block diagram of a power spectral density of orthogonally precoded OFDM signals based on E-UTRA parameters.

DESCRIPTION

(5) A DFT-based digital communications system 100, as shown in FIG. 1, can use either OFDM or SC-FDMA to transmit data symbols of a data source 110. For SC-FDMA additional M-point DFT and IDFT modules 116 and 138 are used, and for OFDM the modules 116 and 138 are omitted.

(6) The system 100 includes a transmitter 102 and a receiver 104. The transmitter 100 receives a stream of complex-valued symbols from the digital signal source 110, with the data of the signal to be transmitted encoded in the symbols using a modulation format such as QPSK or QAM. The data symbols are aggregated by a serial to-parallel converter (S/P) 112 into data vectors of length N to form an OFDM symbol. The group of symbols of the OFDM symbol can be represented as an uncoded symbol vector, x ∈ E C.sup.N. The output of the S/P 112 is passed to an orthogonal precoder 114 to apply a precoding matrix P ∈.sup.M×N P.sup.H P=I, with M>N, that is used to generate a precoded symbol vector ξ. For SC-FDMA, the precoded symbol vector is then Fourier-transformed by an M-point DFT 116.

(7) A resulting subcarrier mapping input vector, s, contains the complex amplitudes which are assigned by a subcarrier mapper 118 to the subcarrier frequencies used by the transmitter 102 and receiver 104. That is,
s=ξ=Px or s=Wξ=WPx
for OFDM or SC-FDMA, respectively, where W is the matrix of coefficients of the unitary DFT module 116 whose elements are

(8) $w_{k,\ell }=\frac{1}{\sqrt{M}}\exp \left[\frac{-j2\pi \left(k-1\right)\left(\ell -1\right)}{M}\right]\mathrm{for}1\le k,\ell \le M.$

(9) To unify the notation, s=Qx where Q=P for OFDM or WP for SC-FDMA.

(10) The uncoded symbol vector x has a smaller dimension than the precoded symbol vector, and a coding rate λ=N/M which is less than unity. To consider an uncoded symbol vector that has the same dimension as the precoded vector a zero-padded uncoded symbol vector x can be defined as

(11) $x=\left(\begin{array}{c}{0}_R\\ \stackrel{\_}{x}\end{array}\right)$

(12) where 0.sub.R is a vector of all zeros having dimension R=M−N. Correspondingly,
s=ξ=Px or s=Wξ=WPx
for OFDM or SC-FDMA, respectively, where P is formed by prepending orthonormal column vectors to P to complete a basis of .sup.M. That is, P is a unitary matrix.

(13) As above, to unify the notation
s=Qx.  (1)

(14) The subcarrier amplitudes s.sub.1, . . . , s.sub.M are mapped by the subcarrier mapper 118 to subcarriers k.sub.1, . . . , k.sub.M where each k.sub.i lies within an interval of length K≥M. A K-point inverse DFT module 120 produces a discrete time signal segment in vector form. A parallel-to-serial converter (P/S) 124 produces serial samples from the vector produced by the IDFT 120 and a cyclic prefix (CP) is prepended by a symbol CP prepender module 126. An advantage of DFT-based systems such as OFDM and SC-FDMA using a cyclic prefix (CP) is that simple equalisation can be carried out independently on each subcarrier. The OFDM or SC-FDMA symbol output by the CP module 126 is then converted to analog, filtered, amplified, up-converted and radiated by the transmitter 120 onto a communications channel 106 of a communications network 106 to the receiver 104. Although a cyclic prefix module 126 is used, orthogonal precoding as described herein is also applicable and effective when zero padding (ZP) is used instead of a CP.

(15) The communications network 106 is a fixed or wireless telecommunications network that supports a digital communications channel 108 that uses DFT based communications processes such as OFDM or SC-FDMA. The network 106 may be a digital television or audio broadcasting network, DSL network, internet network, power line network and/or a 4G and next generation mobile network.

(16) The receiver 104 performs the signal processing operations of the transmitter 102 in reverse order. The receiver 104 has a stripping module 130 to remove the cyclic prefix (CP) and pass the received symbol to a serial to parallel converter so it can be applied to a K-point DFT 134. The transformed vector produced is equalised and subcarrier demapped by a subcarrier demapper 136 to reconstruct the transmitted symbol vector. This is applied to an M-point IDFT module 138 for SC-FDMA. The symbol vector is then decoded by an orthogonal decoder 140 that applies and performs the reverse transformation to the precoder 114. The symbol vector output is then parallel to serial converted by a parallel to serial converter 146 to reproduce the original modulated signal (except it may include noise and interference) at a data sink 148 for subsequent demodulation and use.

(17) The components of the transmitter 102 and receiver 104, including the precoder and decoder modules 114 and 140, are each implemented as an Application Specific Integrated Circuit (ASIC). Alternatively the components can be implemented using at least one Field Programmable Gate Array (FPGA) or in firmware on a Digital Signal Processor (DSP) chip, such as those produced by Altera Corporation, Xilinx Inc. and Texas Instruments Inc. The complex baseband continuous-time signal segment output by the transmitter 102 has the form

(18) $y\left(t\right)=\underset{i=1}{\overset{M}{.Math.}}{s}_i\exp \left(j2\pi k_i{f}_{s}t\right)$

(19) for −T.sub.cp≤t<T.sub.s where ƒ.sub.s is the subcarrier spacing, T.sub.s=1/ƒ.sub.s is the useful symbol duration and T.sub.cp is the cyclic prefix duration. The sum T=T.sub.cp+T.sub.s is the symbol period.

(20) With y(t) assumed to be zero outside the time interval (−T.sub.cp, T.sub.s), its spectrum is

(21) $\begin{array}{c}Y\left(f\right)=\underset{i=1}{\overset{M}{.Math.}}{a}_i^{*}\left(f\right)s_i\mathrm{where}\\ a_i\left(f\right)=T\exp \left[-j\pi \left(T_s-T_{\mathrm{cp}}\right)\left(f-k_i{f}_s\right)\right].Math.\mathrm{sinc}\left[\left(T_s+T_{\mathrm{cp}}\right)\left(f-k_i{f}_s\right)\right]\end{array}$

(22) and sinc (x)≙ sin(x)/x.

(23) With the functions a.sub.i(ƒ), i=1, . . . , M, grouped as a column vector a(ƒ):
Y(ƒ)=a.sup.H(ƒ)s.

(24) Given that the transmitted signal is a train of symbols of the form y(t) transmitted serially, end-to-end over the channel 108, and with each symbol assumed to be independent of all others, the power spectral density (PSD) is

(25) $\begin{array}{cc}{G}_Y\left(f\right)=\frac{\eta }{T}{.Math.{\stackrel{\_}{Q}}^{H}a\left(f\right).Math.}^2& \left(2\right)\end{array}$

(26) where η is the power assigned to each symbol in the source stream, i.e., the power assigned to each element of x.

(27) To suppress sidelobes, van de Beek describes selecting a set of out-of-band frequencies M={ƒ.sub.1, . . . , ƒ.sub.R} such that the PSD G.sub.y (ƒ.sub.r)=0 for r=1, . . . , R. It follows from equation (2) that the vectors a(ƒ.sub.1), . . . , a(ƒ.sub.R) should be in the nullspace of Q.sup.H and a matrix C.sub.vdB=(a(ƒ.sub.1), . . . , a(ƒ.sub.R)) can be generated such that Q .sup.H C.sub.vdB=0.

(28) Alternatively, Ma et al. use a discrete set of out-of-band frequencies ϕ, and designs Q to minimise Σ.sub.ƒ∈ϕG.sub.Y (ƒ). A matrix C.sub.Ma is generated whose columns are a(ƒ) for each ƒ ∈ϕ and Q is set as the minimiser of ∥Q.sup.H C.sub.Ma∥.sub.F.sup.2, where ∥.Math.∥.sub.F is the Frobenius norm.

(29) In the approaches of both van de Beek and the Ma et al., Q is determined by first finding Q using a singular value decomposition (SVD) of the C matrix, either C.sub.vdB or C.sub.Ma. The SVD is
C=UΣV.sup.H  (3)
where U and V are unitary matrices (V.sup.H is the conjugate transpose) and Σ is a diagonal matrix with nonnegative real elements (the singular values) on the diagonal in descending order. Q=U is selected to achieve sidelobe suppression. The matrix U is partitioned so that U=(Ũ, Ū) where Ũ represents the first R columns of U and Ū the remaining N columns. Then Q=Ū.

(30) Although Q=U achieves sidelobe suppression using the methods of van de Beek and Ma et al. any choice for Q that maintains the orthogonality of the subspaces spanned by the columns of Ũ and Ū will also be admissible, i.e., Q=(ŨΨ, ŪΨ) is also admissible for any unitary matrices {tilde over (Ψ)} and ψ.

(31) A Householder reflection (or transform) is a process that is used to effect a unitary transformation mapping of vectors from a specified one-dimensional subspace to another (and vice versa). If y≠z are unit basis vectors for the two subspaces then the Householder matrix

(32) $\begin{array}{cc}H=I-{\mathrm{gg}}^H\mathrm{where}g=\sqrt{2}\frac{y-z}{.Math.y-z.Math.}& \left(4\right)\end{array}$
can be used and verified that it is unitary because
Hy=z and Hz=y.
The vector g is known as the Householder vector. As the basis vectors are not unique, it follows that the Householder matrix to effect the desired reflection is also not unique.

(33) The complexity (for example the number of floating-point operations) necessary to compute a Householder reflection on a vector v appears to be proportional to the square of the dimension of v, since computation of Hv is an instance of matrix-vector multiplication. However, from equation (4) it can be determined that Hv=v−g(g.sup.Hv), and it then follows that the Householder reflection can instead be computed using an inner product, a scalar-vector multiplication and a vector subtraction. The complexity of each of these operations is only linear in the dimension of v.

(34) A generalised Householder reflection is a unitary transformation that maps between a pair of specified subspaces with dimension ρ>1. Suppose Y is a matrix whose ρ columns form an orthonormal basis of one subspace and Z likewise yields the basis of the other. Further suppose that the singular value decomposition (SVD) of Y.sup.HZ is ° DO.sup.H and that all the singular values are less than unity (i.e., the intersection of the two subspaces contains only 0). A block reflector H can be derived in the form
H=I−GG.sup.H where G=(YΘ−ZΦ)(I−D).sup.−1/2  (5)
It is verified that H is unitary as
HYΘ=ZΦ and HZΦ=YΘ.

(35) For fixed ρ, the arithmetic complexity of computing a generalised Householder reflection on a vector v using a block reflector is linear, not quadratic, in the dimension of v.

(36) Alternative processes for implementing block reflectors based on the polar and Cholesky decompositions are described in “A new formulation of the hypermatrix Householder-QR decomposition,” G. Dietrich, Comput. Methods Appl. Mech. Engrg., vol. 9, no. 3, pp. 273-280, November 1976 (Dietrich); and “Block reflectors: Theory and computation,” R. Schreiber and B. Parlett, SIAM J. Nurner. Anal., vol. 25, no. 1, pp. 189-205, February 1988 (Schreiber et al.). As for Householder matrices, block reflectors are not unique for any specified pair of subspaces.

(37) To achieve sidelobe suppression in the orthogonal precoder 114, a block reflector H is constructed that maps from the subspace spanned by e.sub.1, . . . , e.sub.R, where each vector e.sub.i is the i.sup.th column of the identity matrix I, to the subspace spanned by the first R columns of U in equation (3) for OFDM or of W.sup.HU for SC-FDMA, i.e., Ũ or W.sup.HŨ, respectively. To construct the block reflector, H, equation (5) is applied with

(38) $\begin{array}{cc}Y=\left(e_1,\mathrm{.Math.},e_R\right)\mathrm{and}Z=\{\begin{array}{c}\tilde{U}\mathrm{for}\mathrm{OFDM}\mathrm{or}\\ W^H\tilde{U}\mathrm{for}\mathrm{SC}\text{-}\mathrm{FDMA}\end{array}.& \left(6\right)\end{array}$

(39) The resulting block reflector has the properties required for sidelobe suppression. The first R columns of H span the same subspace as U (respectively, W.sup.HŨ) and the remaining columns span a subspace which is orthogonal to it. Therefore, H is an acceptable assignment for P, the precoding matrix.

(40) From equation (5), a computationally efficient way to compute the precoded symbol vector ξ is to evaluate the expression
ξ=x G(G.sup.Hx)  (7)

(41) In doing so, the computational cost of performing orthogonal precoding becomes linear rather than quadratic in M, if R is a constant.

(42) Accordingly to implement the precoder 114, the matrices defined by Y and Z are determined using equation (6), the singular value decomposition of Y.sup.HZ is obtained and G is determined directly from the right hand side of equation (5). Whilst H can then be derived using the left hand side of equation (5), to implement the precoder 114 (such that the computational complexity is linear using equation (7)) the block reflector H never has to be explicitly determined. Equation (7) allows data symbols to be mapped from one subspace to another using a linear function. Once the matrix G is determined to meet a desired operational sidelobe profile, its values are encoded in the circuitry of, or stored in memory associated with, the precoder 114 of the transmitter 102 and decoder 140 of the receiver 104.

(43) The precoder 114 executes an orthogonal precoding process as shown in FIG. 2. The precoder 114 receives a symbol of QAM data from the serial parallel converter 112 as vector x (step 202). The precoder 114 then transforms vector x (204) using a block reflector to produce a precoded symbol vector ξ by first generating vector v by applying the matrix G.sup.H (210). The precoder then generates w=Gv (212), and subsequently it generates ξ=x−w (214). The vector ξ is then output (206) by the precoder 114 to the DFT 116 for SC-FDMA or to the subcarrier mapper 118 for OFDM. The process is then repeated for the next symbol.

(44) The decoder 140 performs the reverse or inverse process to the precoder 114 in order to recover the vector x from the vector ξ. The decoder recovers the uncoded symbol vector using:
x=ξ−G(G.sup.Hξ),
from each received precoded symbol vector ξ.

(45) The above overcomes what is widely seen as a major impediment to orthogonal precoding. Normally the complexity of orthogonal precoding and decoding has order of O (M.sup.2), which is unacceptable when M is large. Conventional orthogonal precoding needs computations between matrices with great dimensions and are always too complicated especially when the number of available subcarriers is large. For example, both the precoders of Xu and Chen and Ma et al have the advantage of maintaining the receiver SNR, but their computational complexity is proportional to the square of the number of subcarriers.

(46) Using the E-UTRA/LTE parameters described in LTE; Evolved Universal Terrestrial Radio Access (E-UTRA); Physical channels and modulation, European Telecommunications Standards Institute Standard., Rev. 3GPP TS 36.211 version 13.0.0 Release 13, Jan. 2016, a transmitter 102, as described in van de Beek, uses K=2048 available subcarriers at 15 kHz spacing, and M=600 subcarriers modulated for transmission using QPSK with a subcarrier mapping such that −300≤k.sub.i≤300, k.sub.i≠0. For the cyclic prefix, T.sub.cp=917128. The transmitted power is 46 dBm. As shown in FIG. 3, the power spectral density (PSD) for standard OFDM 302 exhibits the characteristic “flat top” of approximately −23 dBm/Hz. Then there is a relatively slow decay of the power in the sidelobes, not quite reaching −80 dBm/Hz at a distance of 40 MHz from the centre frequency.

(47) The PSDs 304 and 306, also shown in FIG. 3, were obtained using the orthogonal precoding methods of van de Beek and Ma et al., respectively, but altered to instead use a block reflector H as described above. The two methods have differences that give rise to a different matrix G that is derived and used in the process of FIG. 2. The matrix G was determined by: 1. Generating the matrix C.sub.vdB or C.sub.Ma as described above for the methods of van de Beek and Ma et al. 2. Determining the singular value decomposition (SVD) of this matrix to produce the matrices U, Σ and V as in equation (3). 3. Extracting the first R columns of U into a matrix Ũ. 4. Using equation (5) to determine G from Y and Z as defined by equation (6), and as discussed above.

(48) Note that, in this last step, the right hand side of equation (5) may be substituted by other methods to generate block reflectors, such as those described in the articles of Dietrich and Schreiber et al, in order to generate the matrix G.

(49) To produce the examples 304 and 306 in FIG. 3, R=8, so N=592 and the coding rate falls slightly to 592/600. For the van de Beek process with a block reflector, the spectrum 304 is nulled at the frequencies ±5100±1 and ±6100±1 kHz. The out-of-band PSD 304 is dramatically lower than standard OFDM 302, almost universally 20 dBm/Hz lower. For the adjusted Ma et al. process, the PSD 306 has spectral leakage minimised at frequencies from −40 MHz to −5 MHz and from 5 MHz to 40 MHz, sampled at intervals of 200 kHz. A further out-of-band attenuation of approximately 10 dBm/Hz is evident. The BER properties are unchanged with respect to orthogonal precoders as they were originally described in Xu and Chen, van de Beek and Ma et al.

(50) Accordingly, orthogonal precoding using block reflectors achieves excellent sidelobe suppression. For OFDM, there is almost no PAPR penalty for using orthogonal precoding and it can be less than 0.1 dB for the E-UTRA/LTE parameters for the transmitter 102. For SC-FDMA, a penalty is evident, but may not exceed 1.5 dB and the penalty is no greater for the use of block reflectors as against other orthogonal precoders.

(51) Additional or supplementary generalised Householder reflections can also be applied to reduce PAPR in SC-FDMA. That is, one set of reflections is applied to suppress out-of-band emissions and another is applied to reduce PAPR. This second set of PAPR-reducing reflections operates in the subspace orthogonal to the nullspace used for sidelobe suppression. Given the precoding matrix Q=H already described, a small number, S, of columns is chosen for remapping via Householder reflection. One criterion for selecting columns for remapping is the sup-norm, i.e., a column q.sub.j is chosen for remapping if ∥q.sub.j∥.sub.∞ is small for some j. Each such column is mapped to a new vector, v.sub.j, in the range space of Q, so as not to interfere with the out-of-band power suppression. One criterion for selecting v.sub.j is again its sup-norm, i.e., v.sub.j is chosen so that ∥v.sub.j∥.sub.∞ is large. For instance, the normalised orthogonal projection of e.sub.j onto the range space of Q is one such choice. To perform the mapping just described, the following process is executed for the precoder 114 iteratively: 1. Construct vectors y and z from e.sub.j and q.sub.j by zeroing the elements corresponding to the subcarriers previously subjected to sidelobe supression and any previously remapped subcarriers, renormalising if necessary. 2. Compute the Householder vector g as described in equation (4). 3. Replace Q by Q(I−gg.sup.H) and repeat from Step 1 for the next chosen subcarrier until S subcarriers have been remapped.

(52) The set of Householder vectors g thus obtained constitutes a supplementary generalised Householder reflection for PAPR reduction and these vectors are encoded in the circuitry or stored in memory of the precoder 114 in order to execute the reflection.

(53) For sidelobe suppression, block reflectors are preferred for their simplicity but other linear-time (i.e. the computational complexity is linear in relation to the number of subcarriers the symbols are mapped to) generalised Householder reflections can be substituted.

(54) For instance, successive Householder reflections may be applied instead of a block reflector. Using Y and Z of equation (6), Householder vectors g.sub.1, . . . , g.sub.R can be determined using the following process: 1. Set i:=1 and set A:=Z. 2. Calculate g in equation (4) using y=e.sub.i and z=(0, . . . ,0, a.sub.ii, . . . , a.sub.Mi), after first normalising z. Denote this Householder vector g.sub.i. 3. Update A so that A:=A−g.sub.i(g.sub.i.sup.H A). 4. Increment i. 5. If i≤R, repeat from step 2 above, otherwise finish.

(55) Once the set of Householder vectors g.sub.1, . . . , g.sub.R, are determined, the precoder 114 generates a precoded symbol vector ξ from an uncoded symbol x by executing the following process: 1. Set i:=1 and set ξ:=x. 2. Update ξ so that ξ:=ξ−g.sub.i(g.sub.i.sup.Hξ). 3. Increment i. 4. If i≤R, repeat from step 2, otherwise finish.

(56) The precoded symbol is decoded by applying the individual Householder reflectors in the opposite order.

(57) As another alternative, the Householder vectors g.sub.1, g.sub.R can be combined into matrices W and Y by performing the following:

(58) 1. Set W:=−g.sub.1, Y:=g.sub.1 and i:=2.

(59) 2. Update W and Y so that W:=(W, −g.sub.i−WY.sup.H g.sub.i) and Y:=(Y, g.sub.i).

(60) 3. Increment i.

(61) 4. If i≤R, repeat from step 2, otherwise finish.

(62) Given W and Y, which are both M×R matrices, the precoded symbol vector ξ is generated from an uncoded symbol x by determining ξ=x+W(Y.sup.Hx). Likewise, the precoded symbol is decoded by evaluating the expression x=ξ+W(Y.sup.Hξ). This is a WY representation for products of Householder reflections as discussed in Matrix Computations, G. H. Golub and C. F. van Loan, 3rd ed. Johns Hopkins University Press, 1996; “The WY representation for products of Householder matrices”, C. Bischof and C. van Loan, SIAM J. Sci. Stat. Comput., vol. 8, no. 1, pp. s2-s13, January 1987; and “A storage-efficient WY representation for products of Householder matrices”, R. Schreiber and C. van Loan, SIAM J. Sci. Stat. Comput., vol. 10, no. 1, pp. 53-57, January 1989.

(63) Many modifications will be apparent to those skilled in the art without departing from the scope of the present invention as herein described with reference to the accompanying drawings.