Semiconductor structure and method for obtaining light emitting diodes reconstituted over a carrier substrate

Abstract

A method is provided for obtaining one or more Light Emitting Diode (LED) devices reconstituted over a carrier substrate. The method includes providing a silicon-based semiconductor substrate as the carrier substrate; providing, per each of the one or more LED devices, a compound semiconductor stack including an LED layer; applying a SiCN layer to the stack and the substrate, respectively; bonding the stack to the substrate, wherein the SiCN layer applied to the stack and the SiCN layer applied to the substrate are contacted; and annealing, after bonding, the bonded stack and substrate at a temperature equal to or higher than a processing temperature for completing the LED device from the stack, wherein said temperatures are at least 400° C. A semiconductor structure including the one or more LED devices reconstituted over a carrier substrate is also provided.

Claims

1. A method for obtaining one or more Light Emitting Diode (LED) devices, reconstituted over a carrier substrate, the method comprising: providing a silicon-based semiconductor substrate as the carrier substrate; providing a compound semiconductor stack including an LED layer per each of the one or more LED devices; applying a silicon carbon nitride (SiCN) layer to the stack and the substrate, respectively; bonding the stack to the substrate by contacting the SiCN layer applied to the stack and the SiCN layer applied to the substrate to form a bonded stack and substrate; and annealing the bonded stack and substrate at an annealing temperature equal to or higher than a processing temperature for completing the LED device from the stack, wherein the annealing and processing temperatures are at least 400° C.

2. The method according to claim 1, wherein the annealing temperature is equal to or higher than 550° C.

3. The method according to claim 1, wherein the annealing is performed for a duration ranging between 30 minutes and 5 hours.

4. The method according to claim 1, wherein the processing temperature for completing the LED device from the stack is equal to or lower than 550° C.

5. The method according to claim 1, wherein completing the LED device from the stack comprises forming a top contact on the stack to contact the LED layer.

6. The method according to claim 5, wherein the top contact is a p-type contact formation.

7. The method according to claim 1, wherein the silicon-based semiconductor substrate is in the form of a 300 mm wafer.

8. The method according to claim 1, wherein the compound semiconductor stack comprises a III-V semiconductor material compound, a II-VI semiconductor material compound, or a metal-nitride compound.

9. The method according to claim 1, wherein the compound semiconductor stack includes a GaN-based LED layer.

10. The method according to claim 1, wherein applying the SiCN layer comprises: forming a SiN layer or a polished dielectric on the stack and the substrate; respectively; and forming the SiCN layers on the respective SiN layers or polished dielectrics.

11. The method according to claim 1, further comprising performing planarization of the SiCN layers, before bonding, to obtain a surface roughness of the SiCN layers of below 1 nm.

12. The method according to claim 1, further comprising annealing, before bonding but after applying the SiCN layers, the stack and substrate at a temperature of at least 400° C.

13. The method according to claim wherein the temperature ranges between 400-600° C.

14. The method according to claim 12, wherein the annealing, before bonding, is performed for a duration ranging between 30 minutes and 5 hours.

15. The method according to claim 14, wherein the annealing is performed for a duration of 2 hours.

16. The method according to claim 1, wherein a plurality of the compound semiconductor stacks is provided corresponding to each of the plurality of LED devices, bonded to the substrate, and collectively annealed at the annealing temperature for obtaining a plurality of LED devices reconstituted over the carrier substrate.

17. The method according to claim 1, wherein the LED device includes a LED array that has an LED pixel pitch ranging between 1 μm to 10 μm.

18. The method according to claim 17, wherein the LED pixel pitch is equal to or below 3 μm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The above described aspects and implementations can be explained in the following description of embodiments with respect to the enclosed drawings:

(2) FIG. 1 shows a flow-diagram of a representative method according to an embodiment of the disclosure.

(3) FIG. 2 shows steps for preparing a carrier substrate for bonding in a representative method according to an embodiment of the disclosure.

(4) FIG. 3 shows steps for preparing compound semiconductor stacks for bonding in a representative method according to an embodiment of the disclosure.

(5) FIG. 4 shows steps for bonding of the compound semiconductor stacks to the carrier substrate and post-bond annealing.

(6) FIG. 5 shows a step related to the completion of LED devices from the bonded compound semiconductor stacks.

DETAILED DESCRIPTION OF THE DISCLOSURE

(7) FIG. 1 shows a method 10 according to an embodiment of the disclosure in a schematic flow-diagram. The method 10 may be particularly suitable to obtain one or more LED devices reconstituted over a carrier substrate. The LED devices may e.g. include a LED array each, particularly a μLED array. Thus, the method 10 can be applied in a fabrication process of such LED devices.

(8) In a first step 11 of the method 10, a silicon-based semiconductor substrate may be provided as the carrier substrate. The silicon-based carrier substrate may be a pure silicon substrate or a silicon wafer, but may also include or be based on SiN, or may include or be based on SiO.sub.2. For instance, the silicon-based carrier substrate may be a complete wafer, particularly a complete 200 mm or 300 mm (Si) wafer. The silicon-based substrate may be particularly an unstructured wafer.

(9) In a second step 12 of the method 10, one compound semiconductor stack including an LED layer may be provided per each LED device (of the one or more LED devices) to be reconstituted over the carrier substrate. In other words, a compound semiconductor stack may be provided per LED device to be fabricated. If multiple LED devices are to be formed in parallel, a plurality of semiconductor stacks may be provided in, and before bonding them to the carrier substrate, they should be aligned with respect to the carrier substrate.

(10) In a third step 13 of the method 10, a SiCN layer may be applied to the at least one compound semiconductor stack and to the silicon-based carrier substrate, respectively. In other words, a different SiCN layer may be provided to each stack and another SiCN layer may be provided to the carrier substrate.

(11) In a fourth step 14 of the method 10, the at least one compound semiconductor stack may be finally bonded to the silicon-based carrier substrate. This requires at least contacting the SiCN layers applied on the at least one stack and the carrier substrate, respectively. In particular, during the bonding, these layers may be forced together by a bonding tool at determined process conditions.

(12) In a fifth step 15 of the method 10, after the bonding step 14, a post-bond annealing may be applied. In particular, the bonded at least one compound semiconductor stack and the silicon-based carrier substrate can be annealed together at a temperature equal to or higher than a processing temperature, which may afterwards be used for completing an LED device from a stack. For instance, the post-bond annealing temperature may be selected to be equal to or higher than a temperature used for contact formation on each of the stacks used to complete the LED devices. In any case, the post-bond annealing temperature may be at least 400° C.

(13) A method 100 according to an embodiment of the disclosure, which builds on the method 10 illustrated in the flow-diagram of FIG. 1, can be explained in more detail with respect to FIGS. 2-5.

(14) In particular, FIG. 2 shows the first step 11 and a part of the third step 13 of the method 10 shown in FIG. 1. Accordingly, FIG. 2 shows that a silicon-based carrier substrate 20 may be provided, and then a SiCN layer 21 may be applied to the carrier substrate 20. In particular, a surface of the silicon-based carrier substrate 20 may be at least partly, i.e. at least where the stacks are later to be bonded, covered with the SiCN layer 21, in order to create one or more bonding surfaces. Optionally, a SiN layer or a polished dielectric can be provided, as an intermediate layer, between the substrate surface and the SiCN layer(s) 21.

(15) FIG. 3 shows the second step 12 and part of the third step 13 of the method 10 shown in FIG. 1. Accordingly, FIG. 3 shows that one or more (here exemplarily two) compound semiconductor stacks 30 can be provided, each stack 30 including an LED layer 31. The stacks 30 can then be applied with a SiCN layer 32 each. The SiCN layers 32 can be applied as surface layers to each of the stacks 30. Like for the silicon-based carrier substrate 20, optionally a SiN layer or a polished dielectric can be provided in between each stack 30 and the SiCN layer 32, i.e. the SICN 32 layer may be applied onto the SiN layer. The SiCN layers 32 define a bonding surface per stack 30.

(16) Before the actual bonding of the compound semiconductor stacks 30 to the silicon-based carrier substrate 20, the SiCN layers 32 and 21, respectively, may be planarized. In particular, they can be treated with a Chemical Mechanical Planarization (CMP) step, particularly in order to obtain a surface roughness of the SiCN layers 32 and 21 of below 1 nm, or even below 0.5 nm. Furthermore, it is possible to, alternatively or additionally, apply a pre-annealing step, before the bonding, but after applying the SiCN layers 32 and 21, for example, after planarizing them. A pre-bond annealing temperature may thereby be at least 400° C., or at least 500° C., or even at least 600° C., in order to achieve an efficient outgassing of the SiCN layers 32 and 21.

(17) FIG. 4 shows the fourth step 14 and the fifth step 15 of the method 10 shown in FIG. 1. Accordingly, FIG. 4 shows how the compound semiconductor stacks 30 may be aligned with and the bonded to the silicon-based carrier substrate 20. In particular, the SiCN layers 32 applied to the semiconductor stacks 30 can be contacted to the SiCN layer 21 provided on the silicon carrier substrate 20. Thereby, a bond can be formed under appropriate process conditions. In particular, the process conditions may be chosen as for conventionally known bonding techniques, i.e. regarding temperature, ambient pressure and mechanical pressure applied e.g. by a bonding tool, in order to push stacks 30 and carrier substrate 20 together. The temperature during bonding may be room temperature or any temperature up to the post-bond annealing temperature and usually not higher than 500° C. Ambient pressure may be low, but usually not lower as e.g. 10E-6 or 10E-7 mBar. The mechanical pressure may be 50-100 KN, but may also be less if sufficient.

(18) The bonding strength of the created bonds can be significantly increased by then performing an annealing step at a temperature of at least 400° C. as schematically shown in FIG. 4. The bonding strength can be further improved by providing the low surface roughness achieved e.g. with CMP, which facilitates the formation of chemical bonds between the bonding surfaces.

(19) As shown in FIG. 5, after this post-bond annealing step 15, a plurality of compound semiconductor stacks 30 reconstituted over the silicon-based semiconductor carrier substrate 20 may be obtained. Each of these stacks 30 can then be completed into an LED device, wherein particularly a contact layer 51 may be applied to the free top-surface of each stack 30. For instance, a p-type contact may be formed on the compound semiconductor stacks 30 bonded to the silicon-based carrier substrate 20. However, completion of the LED device may also include structuring an LED array from each stack 30, i.e. form the LED layer of each stack 30.

(20) A plurality of LED devices may be reconstituted in a determined alignment or pattern over the carrier substrate 20. For instance, in order to maximize the number of LED device that can be processed in parallel Each LED device may finally include a LED array. That is, a LED array may be structured at some point from each stack 30, particularly before forming a top contact on the stack 30, which may then contact the LED array from above. The LEDs in such a LED array may be arranged with a LED pixel pitch of between 1-10 μm, in particular even with a LED pixel pitch that is equal to or below 3 μm, thus forming a μLED array. Individual LED devices including such a μLED array each may be obtained, e.g. by dicing and packaging, from the semiconductor structure 50 shown in FIG. 5. The LED devices may be useful for a μLED display as, for instance, used in augmented reality applications. The LEDs in the LED array of an LED device may be GaN-based LEDs, or other III-V semiconductor based, or II-VI semiconductor based, or metal-nitride based LEDs.

(21) In summary, the method presented by the disclosure includes a bonding of a compound semiconductor stack to a silicon-based carrier substrate with an increased bond strength, which can withstand high temperatures used in further processing steps. The method can be particularly useful in a process for fabricating an LED device with a μLED array.