Semiconductor device
11099244 · 2021-08-24
Assignee
Inventors
Cpc classification
G01R33/0017
PHYSICS
International classification
Abstract
A semiconductor device includes a semiconductor substrate 10 of a first conductivity type, a vertical Hall element 100 provided on the semiconductor substrate 10, and an excitation conductor 200 provided directly above the vertical Hall element 100 with an intermediation of an insulating film 30. The vertical Hall element 100 includes a semiconductor layer 101 of a second conductivity type provided on the semiconductor substrate 10, and a plurality of electrodes 111 through 115 each constituted from a high-concentration second conductivity type impurity region and provided on the surface of the semiconductor layer 101 along a straight line. A ratio W.sub.C/W.sub.H between a width W.sub.C of the excitation conductor 200 and a width W.sub.H of each of the plurality of electrodes 111 through 115 satisfies 0.3≤W.sub.C/W.sub.H≤1.0.
Claims
1. A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a vertical Hall element on the semiconductor substrate; and an excitation conductor directly above the vertical Hall element with an intermediation of an insulating film, the vertical Hall element comprising: a semiconductor layer of a second conductivity type on the semiconductor substrate; and a plurality of electrodes each constituted from a high-concentration second conductivity type impurity region, and on a surface of the semiconductor layer along a straight line, and a ratio W.sub.C/W.sub.H between a width W.sub.C of the excitation conductor and a width W.sub.H of each of the plurality of electrodes satisfying an inequality 0.3≤W.sub.C/W.sub.H≤1.0 wherein a ratio h/W.sub.H between a distance h from a center of the vertical Hall element in a substrate depthwise direction to a lower surface of the excitation conductor and the width W.sub.H of each of the plurality of electrodes is equal to or less than 0.4.
2. The semiconductor device according to claim 1, wherein the excitation conductor has a linear shape, and a longitudinal center line of the excitation conductor and a longitudinal center line of the semiconductor layer of the vertical Hall element coincide.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
(4) Embodiments of the present invention will hereinafter be described in detail with reference to the accompanying drawings.
(5)
(6) As illustrated in
(7) The vertical Hall element 100 is constituted from an N type (second conductivity type) semiconductor layer 101 serving as a magnetism sensing part which is provided on the semiconductor substrate 10, and electrodes 111 through 115 each constituted from an N type impurity region are provided on the surface of the semiconductor layer 101 along a straight line. The electrodes 111 through 115 have a rectangular shape and a common width W.sub.H and are provided in parallel to each other.
(8) The element isolation diffusion layer 20 electrically isolates the vertical Hall element 100 from other regions (not illustrated) on the semiconductor substrate 10.
(9) Elements such as transistors provided in other regions on the semiconductor substrate 10 electrically isolated from the vertical Hall element 100 by the element isolation diffusion layer 20. The elements constitute a circuit which processes an output signal from the vertical Hall element 100, a circuit which supplies a signal to the vertical Hall element 100, or a circuit which compensates the characteristics of the vertical Hall element 100 by a calibration magnetic field, or the like (hereinafter called a “peripheral circuit”).
(10) The excitation conductor 200 has a linear shape and provided directly above the vertical Hall element 100 with an intermediation of the insulating film 30 in such a manner that a longitudinal center line of the excitation conductor 200 and a longitudinal center line of the semiconductor layer (magnetism sensing part) 101 of the vertical Hall element 100 coincide. The distance between the excitation conductor 200 and the vertical Hall element 100 thereby becomes the smallest, and hence the intensity of the calibration magnetic field received by the vertical Hall element 100 can be made larger. Further, the uniform calibration magnetic field can be supplied to the whole vertical Hall element 100.
(11) Then, in the present embodiment, the ratio W.sub.C/W.sub.H between the width W.sub.C of the excitation conductor 200 on the vertical Hall element 100 and the width W.sub.H of each of the electrodes 111 through 115 of the vertical Hall element 100 satisfies an inequality 0.3≤W.sub.C/W.sub.H≤1.0. A description will be made below as to the reason why such an inequality is taken.
(12) As the calibration magnetic field applied to the vertical Hall element 100 and generated from the excitation conductor 200 becomes small, a change in the Hall voltage supplied from the vertical Hall element 100 becomes small, thereby degrading the accuracy for estimation of actual sensitivity of the vertical Hall element 100. It is therefore preferable to apply the calibration magnetic field of 2 to 3 mT or more.
(13) With the above in view,
(14) It is understood from the graph of
(15) Accordingly, by setting the ratio W.sub.C/W.sub.H between the width W.sub.C of the excitation conductor and the width W.sub.H of each of the electrodes 111 through 115 of the vertical Hall element to be greater than or equal to 0.3, it is possible to suppress the occurrence of a temperature distribution in the peripheral circuit upon applying a current to the excitation conductor 200 to apply a calibration magnetic field of more than 2 to 3 mT to the vertical Hall element 100.
(16) On the other hand, the peripheral circuit and the excitation conductor 200 approach each other when the width W.sub.C of the excitation conductor 200 becomes larger than the width W.sub.H of each of the electrodes 111 through 115 of the vertical Hall element 100. That is, the peripheral circuit becomes vulnerable to the heat generation from the excitation conductor 200, and the accuracy of estimating the actual characteristics of the vertical Hall element 100 is degraded. It is thus preferable that in order to prevent the excitation conductor 200 from approaching the peripheral circuit, the width W.sub.C of the excitation conductor 200 is not made larger than the width of each of the electrodes 111 through 115 of the vertical Hall element 100, i.e., the ratio W.sub.C/W.sub.H between the width W.sub.C of the excitation conductor and the width W.sub.H of each of the electrodes 111 through 115 of the vertical Hall element is set to be less than or equal to 1.0.
(17)
(18) It is understood from the graph of
(19) Further, as can be seen from
(20) That is, as the distance h from the center of the vertical Hall element 100 in the substrate depthwise direction to the excitation conductor 200 becomes large, more current must flow to the excitation conductor 200 in order to apply a required calibration magnetic field to the vertical Hall element 100. The increase in the temperature of the excitation conductor 200 therefore becomes large, thereby affecting the peripheral circuit.
(21) Accordingly, even if the ratio W.sub.C/W.sub.H between the width W.sub.C of the excitation conductor 200 and the width W.sub.H of each of the electrodes 111 through 115 of the vertical Hall element 100 is within a range which satisfies 0.3≤W.sub.C/W.sub.H≤1.0, the increase in the temperature of the excitation conductor 200 is preferably 5° C. or less to suppress affection to the peripheral circuit.
(22) From
(23) Incidentally, in a process of forming the vertical Hall element 100, forming the insulating film 30 thereon, and then forming wirings to electrically connect the plurality of elements such as the transistors constituting the peripheral circuit to each other, the excitation conductor 200 can be formed simultaneously with the wirings. According to the present embodiment, it is therefore possible to form the excitation conductor 200 without increasing a manufacturing process.
(24) Further, even if, for example, when W.sub.C/W.sub.H is designed to be 0.5, variation occurs in the width of the excitation conductor 200 due to variations in the manufacturing process so that W.sub.C/W.sub.H becomes 0.5+α or 0.5−α, a change in the magnetic flux density relative to its change is small as can be seen from
(25) Here, resistivity of the excitation conductor 200 is preferably as low as possible to reduce the amount of heat generation, e.g., the excitation conductor 200 is preferably formed of Al or the like. Further, the excitation conductor 200 is preferably as thick as possible to reduce the amount of heat generation, e.g., desirably 0.5 μm or more.
(26) A description will next be made as to a method of compensating the characteristics of the vertical Hall element 100 in the semiconductor device according to the present embodiment by the calibration magnetic field.
(27) A current flow through the excitation conductor 200 generates a calibration magnetic field Bc having a predetermined magnetic flux density indicated by a dotted line around the excitation conductor 200 as illustrated in
(28) In a state in which the calibration magnetic field Bc is applied, a drive current is supplied to the electrode serving as a drive current supply electrode, of the electrodes 111 through 115 of the vertical Hall element 100. Since the drive current receives the Lorentz force caused by the calibration magnetic field Bc, a potential difference is generated between the electrodes serving as Hall voltage output electrodes, of the electrodes 111 through 115 of the vertical Hall element 100, whereby this potential difference is obtained as a Hall voltage. Specifically, a Hall voltage is provided between the electrodes 112 and 114 by, for example, supplying the drive current to the electrodes 111, 113, and 115 in such a manner that a current flows from the electrode 113 to the electrodes 111 and 115.
(29) The drive current and the gain of an amplifier connected to the output of the vertical Hall element 100, etc. are adjusted based on the Hall voltage obtained in this manner, an offset voltage remaining after calculation of a plurality of Hall voltages obtained by changing the direction of supplying the drive current by a spinning current method, etc., thereby carrying out compensation of the characteristics of the vertical Hall element 100. It is thus possible to achieve a semiconductor device having the vertical Hall element 100 which suppresses variation in its characteristics with high accuracy.
(30) The embodiment of the present invention has been described above, but the present invention is not limited to the above embodiment. It is needless to say that various changes can be made thereto within the scope not departing from the gist of the present invention.
(31) For example, in the above embodiment, the excitation conductor 200 is illustrated in the single layer, but the thickness of the excitation conductor 200 may be increased as a whole by using a multilayer wiring to increase the whole thickness of the excitation conductor 200.
(32) Also, there has been illustrated the example using AL or the like as the excitation conductor 200, but a conductor such as polysilicon or the like may be used.
(33) Further, the first conductivity type and the second conductivity type have been described as the P type and the N type respectively, but they may be replaced with each other so that the first conductivity type functions as the N type and the second conductivity type functions as the P type.
(34) Furthermore, the above embodiment has illustrated the example in which the vertical Hall element 100 has the five electrodes, but the vertical Hall element 100 may have three in total including two for the supply of the drive current and one for the output of the Hall voltage, or more.