CHIP-TYPE FUSE WITH A METAL WIRE TYPE FUSIBLE ELEMENT AND MANUFACTURING METHOD FOR THE SAME
20210257174 ยท 2021-08-19
Inventors
Cpc classification
H01H85/04
ELECTRICITY
H01H85/08
ELECTRICITY
H01H85/0065
ELECTRICITY
H01H85/0069
ELECTRICITY
H05K3/0044
ELECTRICITY
International classification
H01H85/04
ELECTRICITY
H05K1/11
ELECTRICITY
H05K1/18
ELECTRICITY
H05K3/00
ELECTRICITY
Abstract
A chip-type fuse has a substrate. Two pads are disposed over a first side of the substrate. At least one fusible element is disposed over the first side of the substrate and electrically connects to the pads. A protective layer covers the first side of the substrate and the fusible element. The fusible element has a cross-section that is substantially circular, so the time durations for heat conduction from the center to points on the radial edge at the cross-section of the fusible element are almost equal. Thus, the fusible element can be uniformly heated. Therefore, when the circuit is overheated, the blow of the fusible element is uniform, which may effectively interrupt the circuit and protect the circuit.
Claims
1. A chip-type fuse, comprising: a substrate having a first side surface; two solder pads, spaced apart from each other, and disposed on the first side surface of the substrate; at least one fusible element disposed on the first side surface of the substrate and electrically connected to the solder pads, wherein each of the at least one fusible element is substantially circular in radial cross section; a protective layer covering the first side surface of the substrate, the at least one fusible element and the pads; and two terminal electrodes disposed at the ends of the at least one fusible element, wherein the terminal electrodes are electrically connected to the ends of the at least one fusible element, respectively.
2. The chip type fuse as claimed in claim 1, wherein each of the at least one fusible element includes a plurality of fusible elements connected in parallel through the solder pads.
3. The chip type fuse as claimed in claim 1 further comprising a heat insulation unit disposed between the at least one fusible element and the substrate.
4. The chip type fuse as claimed in claim 3, wherein the heat insulation unit comprises a heat insulation layer.
5. The chip type fuse as claimed in claim 3, wherein the heat insulation unit is a groove formed on the first side surface of the substrate.
6. The chip type fuse as claimed in claim 1, wherein each of terminal electrodes comprises a silver layer and a conductive material layer formed on the silver layer, wherein the silver layers of the terminal electrodes are disposed at the two ends of the substrate and electrically connected to the ends of the at least one fusible element.
7. The chip type fuse as claimed in claim 2, wherein each of terminal electrodes comprises a silver layer and a conductive material layer formed on the silver layer, wherein the silver layers of the terminal electrodes are disposed at the two ends of the substrate and electrically connected to the ends of the fusible elements.
8. The chip type fuse as claimed in claim 1 further comprising conductive holes formed on the surfaces at the ends of the substrate and a conductive material coated on walls of the conductive holes, wherein the conductive material is electrically connected to the ends of the at least one fusible element, wherein each of the terminal electrodes comprises a conductive material layer formed on the conductive material on the walls of the conductive holes.
9. The chip type fuse as claimed in claim 2 further comprising conductive holes formed on the surfaces at the ends of the substrate and a conductive material coated on walls of the conductive holes, wherein the conductive material is electrically connected to the ends of the fusible elements, wherein each of the terminal electrodes comprises a conductive material layer formed on the conductive material on the walls of the conductive holes.
10. A method of manufacturing a chip-type fuse, comprising steps of: providing a substrate sheet, which has a plurality of substrates pre-marked pre marked and arranged in a matrix; forming a plurality of solder pads on the substrate sheet, wherein the solder pads are formed at the ends of the side surface of the substrates; disposing a plurality of fusible wires over the substrate sheet, wherein each of the fusible wires is bridged over the solder pads, wherein each of the substrates corresponds to at least one of the fusible wires, wherein each of the fusible wires substantially circular in radial cross section; disposing a protective layer on the substrate sheet, wherein the protective layer covers the first side surfaces of the substrates and the fusible wires; dicing the substrate sheet to separate the plurality of the substrates and the fusible wires thereon; forming terminal electrodes over the substrates, wherein the terminal electrodes are disposed at two ends of each of the substrates and electrically connected to the fusible elements on the substrates.
11. The method as claimed in claim 10, wherein the step of disposing terminal electrodes on the substrates comprises steps of: dipping sliver on the two ends of the substrates for forming silver layers, wherein the sliver layers are electrically connected to the fusible elements; and forming conductive material layers on the silver layers.
12. The method as claimed in claim 10, wherein: the step of providing the substrate sheet comprises providing a substrate sheet that has conductive holes formed at where the substrates connect to each other and a conductive material coated on walls of conductive holes; and the step of forming terminal electrodes comprises forming conductive material layers on the walls of the conductive holes in order to form the terminal electrodes.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE EMBODIMENTS
[0019] It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. Various features may be arbitrarily drawn in different scales for the sake of simplicity and clarity. That is, the elements shown in the figure are not presented in actual numbers, actual shapes, actual dimensions, and actual proportions. The detailed components layout may be more complicated in reality.
[0020] With reference to
[0021] The substrate 10 is made of a temperature-resistant insulating material such as ceramic, glass, or printed circuit board (PCB), but not limited thereto. Two solder pads 12 are disposed on a first side surface 11 of the substrate 10. The solder pads 12 have an interval between them.
[0022] The at lease one fusible element 20 is disposed over the first side surface 11 of the substrate 10. The two ends of the fusible element 20 are welded to the pads 12, respectively. With reference to
[0023] The protective layer 30 covers the first side surface 11 of the substrate 10, the fusible elements 20 and the solder pads 12. In an embodiment, the protective layer 30 is made of a temperature-resistant insulating material, such as silicone, but not limited thereto.
[0024] With reference to
[0025] Because the fusible element 20 is circular or substantially circular in radial cross section, the distance from a center to points on the radial edge at each cross-section of the fusible element 20 is almost equal. Thus, the time durations that heat transfers from the center to each point on the radial edge are substantially equal, and the time difference that the heat transfers from the center to each point on the radial edge can be minimized. When the current rises abnormally and exceeds the rated current, the fusible element 20 is overheated and blown. The fusible element 20 is uniformly blown because time durations that heat transfers from the center to each point on the radial edge at each cross-section of the fusible element 20 are almost equal. Then the circuit is interrupted instantly.
[0026] In an embodiment, a heat insulation unit is disposed on the substrate 10 and correspond to the position of the fusible element 20. The heat insulation unit is disposed between the fusible element 20 and the substrate 10. The heat insulation unit can confine the heat to the fusible element 20 (or can limit the heat to stay over the fusible element 20). Thus, the problem of that the fusible element 20 cannot effectively show the circuit overheating, resulting from excessive heat dissipating from the fusible element 20 through the substrate 10, can be avoided. In an embodiment, as shown in
[0027] With reference to
[0028] In this embodiment, because the material of the substrate sheet 100 is non-wetting, the solder is confined in the areas of solder pads 12, and the distance between the solder joints at the two ends of the fusible element 20 is thus be fixed. Since the electrical resistance of the chip type fuse as described is relevant to the distance between the solder joints at the two ends of the fusible element 20, the consistency of electrical resistances of the chip type fuses is improved, and a large shift of electrical resistances resulting from the position shifting of the solder joints is avoided. The quality of the chip type fuses as described is ensured because the electrical properties of the chip type fuses as described are kept consistent.
[0029] In this embodiment, two fusible elements 20 are disposed on a corresponding substrate 10 (as shown in
[0030] Furthermore, With reference to
[0031] Furthermore, the formation of the terminal electrodes 40 can be varied by the shape of the substrate 10 and the pre-processing step. In one embodiment, as shown in
[0032] Even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and features of the invention, the disclosure is illustrative only. Changes may be made in the details, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.