Rotation rate sensor and method for operating a rotation rate sensor

Abstract

A rotation rate sensor, including at least: one oscillating mass, deflectable in a drive direction and in a detection direction oriented perpendicularly to the drive direction; one drive circuit for prompting a defined oscillatory movement of the oscillating mass in the drive direction; one circuit for detecting a measuring signal, which corresponds to the deflection of the oscillating mass in the detection direction; and one read-out circuit for reading out and pre-processing the measuring signal. The read-out circuit includes a demodulator, with which a useful signal and a quadrature signal are extractable from the measuring signal. The read-out circuit includes a sigma-delta A/D converter. An offset voltage is feedable to the sigma-delta A/D converter, which is selected in such a way that tonal artifacts in the frequency spectrum of the digitized useful signal are shifted into a frequency range outside of the bandwidths of the useful signal to be expected.

Claims

1. A rotation rate sensor, comprising: an oscillating mass which is deflectable in a drive direction and in a detection direction oriented perpendicularly to the drive direction; a drive circuit configured to prompt a defined oscillatory movement of the oscillating mass in the drive direction; a circuit configured to detect a measuring signal which corresponds to the deflection of the oscillating mass in the detection direction; a read-out circuit configured to read out and pre-process the measuring signal, the read-out circuit including at least one demodulator, with which a useful signal and a quadrature signal are extractable from the measuring signal, and the read-out circuit including, at least for the useful signal, a sigma-delta A/D converter, via which a bit sequence including logic values 0 and 1 is generatable thereby digitizing at least the useful signal; wherein an offset voltage is feedable to the sigma-delta A/D converter, which is selected in such a way that tonal artifacts in a frequency spectrum of the digitized useful signal, which are caused by a low signal amplitude and/or a DC voltage component in the useful signal, are shifted into a frequency range outside of bandwidths of the useful signal to be expected.

2. The rotation rate sensor as recited in claim 1, wherein a sign of the offset voltage is selected as a function of the quadrature signal.

3. The rotation rate sensor as recited in claim 2, wherein the read-out module includes a calibration module, to which the quadrature signal is feedable, and the calibration module is configured to determine the offset voltage while taking the quadrature signal into account.

4. The rotation rate sensor as recited in claim 1, wherein the useful signal and the offset voltage are added together at an input of the sigma-delta A/D converter.

5. The rotation rate sensor as recited in claim 1, wherein the useful signal is reconstructable via the sigma-delta A/D converter based on the generated bit sequence using reference voltages, and the reconstructed useful signal is subtracted from the analog useful signal at an input of the sigma-delta A/D converter, wherein one of the reference voltages is acted upon by the offset voltage in such a way that the useful signal is reconstructable using the reference voltages for the logic value 0 and the reference voltages for the logic value 1 of the bit sequence.

6. The rotation rate sensor as recited in claim 5, wherein the sigma-delta A/D converter includes a circuit arrangement for reconstructing the useful signal, including: differential amplifier, which includes a negative voltage input, a positive voltage input, a negative voltage output and a positive voltage output; a first capacitance, via which the positive voltage output is fed back to the negative voltage input; a second capacitance, via which the negative voltage output is fed back to the positive voltage input; a first resistance and first switches, via which a first voltage is selectively applicable at the negative voltage input or at the positive voltage input; and a second resistance and second switches, via which a second voltage is selectively applicable at the negative voltage input or at the positive voltage input; wherein the first and second switches are activatable via the bit sequence generated by the sigma-delta A/D converter, a difference between the first voltage and the second voltage corresponds to the reference voltage, and the first resistance and the second resistance are variably adjustable in such a way that the reference voltage is acted upon by the offset voltage.

7. The rotation rate sensor as recited in claim 6, wherein at least one sub-resistance of the first resistance and at least one sub-resistance of the second resistance are selectively bridgeable using a third switch, and the third switches are activatable by the bit sequence generated by the sigma-delta A/D converter.

8. The rotation rate sensor as recited in claim 1, further comprising: a subtractor downstream from the sigma-delta A/D converter configured to purge the digitized useful signal of a signal offset corresponding to the offset voltage.

9. A method for operating a rotation rate sensor including an oscillating mass, which is deflectable in a drive direction and in a detection direction oriented perpendicularly to the drive direction, a drive circuit configured to prompt a defined oscillatory movement of the oscillating mass in the drive direction, a circuit configured to detect a measuring signal, which corresponds to the deflection of the oscillating mass in the detection direction, and a read-out circuit configured to read out and pre-process the measuring signal, the read-out circuit including a demodulator, with which a useful signal and a quadrature signal are extracted from the measuring signal, and the read-out circuit including, at least for the useful signal, a sigma-delta A/D converter, which generates a bit sequence including logic values 0 and 1 thereby digitizing at least the useful signal, the method comprising: feeding an offset voltage to the sigma-delta A/D converter, which is selected in such a way that tonal artifacts in a frequency spectrum of the digitized useful signal, which are caused by a low signal amplitude and/or a DC voltage component in the useful signal, are shifted into a frequency range outside of bandwidths of the useful signal to be expected.

10. The method as recited in claim 9, wherein a sign of the offset voltage are determined while taking the quadrature signal into account.

11. The method as recited in claim 10, wherein the offset voltage is determined in an event-controlled manner, initiated by an activation of the rotation rate sensor.

12. The method as recited in claim 9, wherein the useful signal and the offset voltage are added together at an input of the sigma-delta A/D converter.

13. The method as recited in claim 9, wherein the sigma-delta A/D converter reconstructs the useful signal based on the generated bit sequence using reference voltages and subtracts the reconstructed useful signal from the analog useful signal at an input of the sigma-delta A/D converter, one of the reference voltages being acted upon by the offset voltage in such a way that the useful signal is reconstructed using the reference voltages for the logic value 0 and reference voltages for the logic value 1 of the bit sequence.

14. The method as recited in claim 9, wherein the digitized useful signal is purged of a signal offset corresponding to the offset voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention is explained in greater detail below with reference to exemplary embodiments schematically indicated in the figures.

(2) FIG. 1 shows a schematically represented specific embodiment of the rotation rate sensor according to the present invention.

(3) FIG. 2 shows a schematically represented sigma-delta converter of a further specific embodiment of the rotation rate sensor according to the present invention, including a single bit quantizer having asymmetrical references.

(4) FIG. 3 shows the property of the single bit quantizer of the sigma-delta converter of the specific embodiment of the rotation rate sensor according to the present invention according to FIG. 2.

(5) FIG. 4 shows an implementation example of the sigma-delta converter of the specific embodiment of the system according to the present invention according to FIG. 2 for an integrator.

(6) FIG. 5 shows a schematically represented flowchart of one specific embodiment of the method according to the present invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

(7) In the figures, identical reference numerals refer to identical or functionally identical elements.

(8) One specific embodiment of the rotation rate sensor according to the present invention, or circuit arrangement 100 of a rotation rate sensor relevant to the invention is schematically represented in FIG. 1.

(9) The rotation rate sensor includes a preferably micromechanical sensor element including an oscillating mass, which is deflectable in a drive direction and in a detection direction oriented perpendicularly to the drive direction. The oscillating mass prompts a defined oscillatory movement in the drive direction, specifically at a resonance frequency f0.

(10) In the case of a rotational movement of the rotation rate sensor about a rotational axis, which is oriented perpendicularly to the drive direction and perpendicularly to the detection direction, the oscillating mass is acted upon by a Coriolis force. This Coriolis force effectuates a deflection of the oscillating mass in the detection direction, which is capacitively detected here. In FIG. 1, a representation of the sensor element including the oscillating mass and the drive circuit has been dispensed with. Only a measuring capacitance 2 is represented, with which the Coriolis force acting upon the oscillating mass in the detection direction is detected. With the aid of a downstream capacitance voltage C/V converter 4, this capacitive signal is converted into a voltage signal, which is referred to below as a measuring signal. In the rotation rate sensor described herein, measuring capacitance 2 and C/V converter 4 form the main components of circuit 10 for detecting the measuring signal.

(11) The measuring signal includes essentially two signal components.

(12) One of the two signal components is generated by the Coriolis force. Its amplitude is proportional to the angle velocity. This useful signal is therefore also referred to as rate R.

(13) The other signal component is caused by manufacturing-related deviations from an ideal sensor geometry and sensor structure such as, for example, from mechanical misalignments between the moved oscillating mass and the electrodes for detecting measuring signals. This signal component is in phase with the position of the oscillating mass and is referred to as quadrature signal Q. It is phase shifted by 90 degrees relative to useful signal R.

(14) The measuring signal may thus be described as follows:

(15) $R\left(t\right)+Q\left(t\right)=\Omega \left(t\right)*\sin \left(2\pi f_{0}t\right)+Q_A*\sin \left(2\pi f_{0}t+\frac{\pi }{2}\right)$

(16) Ω(t) is the angle velocity and Q.sub.A is the amplitude of the quadrature signal.

(17) A read-out circuit for reading out and pre-processing the measuring signal is situated downstream from circuit 10 for detecting the measuring signal. Here, useful signal R and quadrature signal Q are extracted from the measuring signal with the aid of demodulators 6, in order to then initially be analogically/digitally converted in separate signal paths and then to be digitally further processed or evaluated.

(18) Since quadrature signal Q and the drive signal for the oscillating mass of the sensor are in phase, a clock signal 14 obtained from the drive signal is used for the demodulation of quadrature signal Q.

(19) Clock signal 12 used for the demodulation of useful signal R is also obtained from the drive signal, specifically, via phase shifting by 90 degrees. Clock signal 12 is therefore in phase with R(t) and has a frequency f0.

(20) The two signals R(t) and Q(t) frequently experience a phase shift ϕ.sub.d with respect to the demodulation clock due to parasitic effects in the circuit: according to the present invention, the demodulation takes place before the analog-digital conversion. If the

(21) $R\left(t\right)=Q\left(t\right)=\Omega \left(t\right)*\sin \left(2\pi f_{0}t+{\varphi }_d\right)+Q_A*\sin \left(2\pi f_{0}t+\frac{\pi }{2}+{\varphi }_d\right)$
phase shift ϕ.sub.d is equal to 0, the demodulation of quadrature signature Q(t) delivers spectral components at multiples of 2*f0, which may be easily filtered out, whereas the demodulation of useful signal R(t) delivers angle velocity Ω(t) in the base band.

(22) If phase shift ϕ.sub.d is not equal to 0, the demodulation of the quadrature signature generates a DC voltage component or DC component in the useful signal. This proves problematical, in particular, for a sigma-delta A/D conversion, since a DC voltage component in this case causes sounds in the signal spectrum of the digitized useful signal, which for sufficiently small values of Q.sub.A are situated in the signal bandwidth of angle velocity Ω(t), and thus result in a reduction of the quantization noise ratio (SQNR) of the sigma-delta analog-digital converter.

(23) In the specific embodiment shown in FIG. 1, both a sigma-delta A/D converter 8 is provided in the signal path of quadrature signal Q and a sigma-delta A/D converter 24 including an integrator 23, a backend-ADC 22, and a quantizer 20 are provided in the signal path of useful signal R.

(24) According to the present invention, an offset voltage V.sub.off is fed to sigma-delta A/D converter 24, which is selected in such a way that tonal artifacts in the frequency spectrum of the digitized useful signal, which are caused by a low signal amplitude and/or a DC voltage component in the useful signal, are shifted into a frequency range outside of the bandwidths of the useful signal to be expected, i.e., of the angle velocity at to be detected.

(25) In principle, offset voltage V.sub.off could be determined once, for example, in a trim process by the manufacturer, and then be utilized unchanged and separately from the individually determined quadrature signature for acting upon the sigma-delta A/D converter.

(26) In the exemplary embodiment described herein, however, offset voltage V.sub.off is selected as a function of quadrature signal Q. For this purpose, quadrature signal Q is fed to a calibration module 16, which in this case is part of the read-out circuit. On the basis of quadrature signal Q, calibration module 16 determines, in particular, the sign of offset voltage V.sub.off, but may also determine the magnitude of offset voltage V.sub.off.

(27) In a first variant of the present invention, offset voltage V.sub.off is simply added to useful signal R at the input of sigma-delta A/D converter 24 in order to compensate for a DC voltage component in useful signal R.

(28) In a further, particularly advantageous variant of the present invention, offset voltage V.sub.off is injected into sigma-delta A/D converter 24, which is explained in greater detail in connection with FIG. 2.

(29) According to FIG. 2, sigma-delta A/D converter 24 reconstructs the useful signal with the aid of a D/A converter DAC 21, specifically, on the basis of the generated bit sequence and using reference voltages −V.sub.ref and +V.sub.ref in order to then subtract the reconstructed useful signal from the analog useful signal at the input of the sigma-delta A/D converter. Offset voltage V.sub.off is injected here into sigma-delta A/D converter 24 by one of the two reference voltages −V.sub.ref or +V.sub.ref being acted upon by offset voltage V.sub.off in such a way that the useful signal is reconstructable using reference voltages −V.sub.ref or −V.sub.ref−V.sub.off for logic value 0 and reference voltages +V.sub.ref+V.sub.off or +V.sub.ref for logic value 1 of the bit sequence. This is illustrated by FIG. 3. X-axis 32 symbolizes the input of single-bit quantizer 20, whereas y-axis 34 indicates the corresponding value of the reference voltage for D/A converter DAC 21. If the output of quantizer 20 is positive, i.e., 1, the output value is +Vref+ΔV or +Vref+Voff, if the output is 0, the output value is −Vref. Single bit quantizer 20 thus includes asymmetrical references.

(30) This corresponds to a single bit quantizer having an offset +ΔV/2, the full scale of the single bit quantizer being expanded from +/−Vref to +/−Vref+ΔV/2.

(31) The DC voltage component of the useful signal is, virtually 7, compensated for with the aid of the useful signal reconstructed by D/A converter DAC 21. Offset voltage V.sub.off is injected here namely by the feedback loop of sigma-delta A/D converter 24 being designed to follow the input signal of sigma-delta A/D converter 24. For this reason, an offset of opposite polarity is generated by using more negative than positive references. This is directly reflected in the generated bit sequence, which will consequently include more zeros than ones.

(32) FIG. 4 represents an implementation example of sigma-delta converter 24 shown in FIG. 2 including two different reference voltages for an analog time integrator. The sigma-delta A/D converter includes a circuit arrangement for reconstructing the useful signal, which includes: a differential amplifier A, which includes a negative voltage input VinN, a positive voltage input VinP, a negative voltage output VoutN and a positive voltage output VoutP, a first capacitance C1, via which positive voltage output VoutP is fed back to negative voltage input VinN, a second capacitance C2, via which negative voltage output VoutN is fed back to positive voltage input VinP, a first resistance Rdac1 and first switch s1, s2, via which a first voltage V1 is selectively applicable at negative voltage input VinN or at positive voltage input VinP, and a second resistance Rdac2 and second switches s3, s4, via which a second voltage V2 is selectively applicable at negative voltage input VinN or at positive voltage input VinP. First and second switches s1, s2, s3, s4 are activatable via the bit sequence generated by the sigma-delta A/D converter. The difference between first voltage V1 and second voltage V2 corresponds to reference voltage Vref: V1−V2=Vref. First resistance Rdac1 and second resistance Rdac2 are variably adjustable so that reference voltage Vref is acted upon by offset voltage Voff. A sub-resistance ΔR1 of first resistance Rdac1 and a sub-resistance ΔR2 of second resistance Rdac2 are selectively bridgeable with the aid of a third switch s5, s6, and third switches s5, s6 are activatable via the bit sequence generated by the sigma-delta A/D converter, specifically, by “D” or “NOT(D)”. Switches s1, s4 are activatable via the bit sequence generated by the sigma-delta A/D converters, specifically, by “D”, whereas switches s2, s3 are activatable by “NOT(D)”. Alternatively, switches s1, s4 are activatable by the bit sequence generated by the sigma-delta A/D converter, specifically, by “NOT(D)”, whereas switches s2, s3 are activatable by “D”.

(33) According to the present invention, the circuit arrangement is easy to implement and has only minimal effects on the overall circuit area.

(34) The specific embodiment of the method according to the present invention represented in FIG. 5 includes three steps. In step S1, a measuring signal, which corresponds to the deflection of an oscillating mass of the rotation rate sensor in the detection direction, is detected by a circuit of a rotation rate sensor. In step S2, the measuring signal is read out by a read-out circuit of the rotation rate sensor and pre-processed, the read-out circuit including a demodulator, with which a useful signal and a quadrature signal are extractable from the measuring signal, and the read-out circuit including, at least for the useful signal, a sigma-delta A/D converter, via which a bit sequence including logic values 0 and 1 is generatable. In step S3, an offset voltage Voff is fed to the sigma-delta A/D converter, which is selected in such a way that tonal artifacts in the frequency spectrum of the digitized useful signal, which are caused by a low signal amplitude and/or a DC voltage component in the useful signal, are shifted into a frequency range outside of the bandwidths of the useful signal to be expected.

(35) The present invention, although it has been fully described above with reference to preferred exemplary embodiments, is not restricted thereto, but is modifiable in a variety of ways.