SiGeSn VIRTUAL SUBSTRATE FORMED BY MOLECULAR BEAM EPITAXY ON A Si SUBSTRATE FOR THE STRAINED GROWTH OF GeSn

20210296524 · 2021-09-23

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    Abstract

    A method of growing fully relaxed SiGeSn buffer layers on Si substrates to produce virtual substrates for the epitaxial growth of high quality GeSn films suitable for high performance infrared (IR) optoelectronic device technology directly integrated on silicon. Growing the SiGeSn virtual substrate uses a precisely decreasing growth temperature and Si flux and a precisely increasing Ge and Sn flux. The virtual substrates may have a slightly larger lattice constant than that of the target GeSn alloy to impose a precise degree of tensile strain resulting in a direct band gap for the target GeSn alloy.

    Claims

    1. A method for growing a SiGeSn alloy, comprising: depositing Si continuously to grow a buffer layer on the Si wafer; ramping down the Si wafer temperature while continuously depositing Si; depositing Ge continuously; ramping up the Ge growth rate; ramping down the Si growth rate; when the Si wafer temperature is below 300° C., depositing Sn continuously; ramping up the Sn growth rate; stabilizing the Si wafer temperature and depositing a SiGeSn alloy on the Si wafer; and growing the SiGeSn alloy to a thickness greater than 2000 Å, wherein the SiGeSn alloy can be used for the growth of a GeSn optoelectronic alloy.

    2. The method of claim 1, wherein the SiGeSn alloy is under no strain for the subsequent growing of the GeSn optoelectronic alloy.

    3. The method of claim 1, wherein the SiGeSn alloy has a Sn concentration up to 20% by atomic composition.

    4. The method of claim 1, wherein the SiGeSn alloy has a range of lattice parameters from 5.6 Å to 5.8 Å.

    5. A method for growing a GeSn optoelectronic alloy, comprising: growing a GeSn optoelectronic alloy on the SiGeSn alloy of claim 1, wherein the SiGeSn alloy has a lattice constant greater than or equal to the lattice constant of the GeSn optoelectronic alloy.

    6. The method of claim 5, wherein the growing of the GeSn optoelectronic alloy is under tensile strain.

    7. The method of claim 5, wherein the growing of the GeSn optoelectronic alloy is without strain.

    8. The method of claim 5, wherein the GeSn optoelectronic alloy has a band gap between 0.10 ev to 0.80 eV.

    9. A method for growing a SiGeSn alloy, comprising: ramping a temperature of a Si wafer temperature to greater than 600° C.; depositing Si continuously to grow a 200 Å buffer layer on the Si wafer; ramping down the Si wafer temperature while continuously depositing Si at 0.5 Å/s; depositing Ge continuously at a growth rate of 0.05 Å/s; ramping the Ge growth rate from 0.05 Å/s to 0.5 Å/s; when the Ge growth rate reaches 0.5 Å/s, ramping down the Si growth rate to 0.07 Å/s; when the Si wafer temperature is below 300° C., depositing Sn continuously; ramping the Sn growth rate from less than 0.01 Å/s up to 0.12 Å/s; stabilizing the Si wafer temperature at 135° C. and depositing a SiGeSn alloy on the Si wafer; and growing the SiGeSn alloy to a thickness greater than 2000 Å; wherein the SiGeSn alloy can be used for the growth of a GeSn optoelectronic alloy of any Sn composition.

    10. The method of claim 9, wherein the SiGeSn alloy is under no strain for the subsequent growing of the GeSn optoelectronic alloy.

    11. The method of claim 9, wherein the SiGeSn alloy has a Sn concentration up to 20% by atomic composition.

    12. The method of claim 9, wherein the SiGeSn alloy has a range of lattice parameters from 5.6 Å to 5.8 Å.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0026] FIG. 1 shows the decomposition rates of SnH.sub.4, GeH.sub.4, and SiH.sub.4 as a function of temperature. SiH.sub.4 does not dissociate at GeSn growth temperatures resulting in limited incorporation and layer thickness. This figure shows that there is a small temperature window for GeSn growth and no window for SiGeSn growth using CVD.

    [0027] FIG. 2 shows the range of temperatures, Si flux rates, Ge flux rates, and Sn flux rates used by MBE in the growth of SiGeSn virtual substrates and GeSn films for optoelectronic applications.

    DETAILED DESCRIPTION OF THE INVENTION

    [0028] The present invention provides for the use of SiGeSn buffer layers grown on Si substrates to produce virtual substrates for the epitaxial growth of high quality GeSn films suitable for high performance IR optoelectronic device technology directly integrated on silicon. One embodiment of this invention is a method for unstrained and tensile-strained MBE growth of GeSn compounds of 0-20% Sn content for a wide range of optoelectronic applications.

    [0029] Group IV elements of Si, Ge, and alpha-Sn have diamond-like lattice constants of 5.431, 5.658, and 6.489 Å, respectively, but Sn is insoluble in Si (<0.01%) and nearly insoluble in Ge (<1.6%), requiring non-equilibrium, kinetically limited growth conditions possible in molecular beam epitaxy to obtain significant Sn concentrations in Group IV alloy films.

    [0030] GeSn compounds, however, do not become a direct bandgap electronic material until the composition exceeds 8% Sn in GeSn, a challenging mandate given that the solubility of Sn in Ge is less than 1.6%. In order to incorporate a higher Sn concentration in Ge than that allowed by thermodynamics, GeSn must be grown under kinetically limited, non-equilibrium (KLNE) conditions. KLNE has been successfully achieved by both MBE and by CVD. CVD is the commercially utilized growth method for the fabrication of all Si-based technology. To deposit a GeSn film by CVD, a layer of Ge is first deposited on Si to create a “virtual substrate.” GeSn is then deposited from molecular fluxes of Ge and Sn chlorides (GeCl.sub.4; SnCl.sub.4) or hydrides/deuterides (Ge.sub.2H.sub.6; SnD.sub.4) at temperatures between 350° C. and 280° C. As the growth temperature is lowered, more Sn can be incorporated into Ge to form GeSn. Because GeSn alloys have larger lattice parameters (spacing between the atoms) than the Ge virtual substrate on which they are deposited, these GeSn alloys are deposited under compressive stress. When grown under compressive stress, however, a Sn concentration greater than 8% is needed in order to achieve a direct bandgap electronic structure. Because compressive stress undermines the formation of a direct bandgap in GeSn, recent efforts have utilized a second layer of GeSn, which has been either partially or fully relaxed, to grow the GeSn optoelectronic device layer with less compressive stress in order to observe direct bandgap properties. Because compressive stress is still present, a different approach is necessary where the GeSn optoelectronic device layer is grown pseudomorphically under tensile strain upon on a second GeSn layer of greater Sn concentration.

    [0031] Although MBE is not currently used in Si technology, it is used for many of the Ill-V and II-VI optoelectronic materials markets and is often utilized as the “test-bed” for developing CVD processes. With that in mind, another solution was sought for the dilemma of growing compressively strained GeSn on Ge virtual substrates. It was discovered that in the KLNE growth regime two factors were determining the amount of Sn incorporation in Ge. The first being compressive strain, which pushes Sn atoms out of Ge, but as the growth temperature is lowered, more Sn can be incorporated. The other factor is the adatom mobility of depositing Sn atoms on the surface. At the temperatures of growth, Sn atoms can move large distances on the Ge surface before incorporating. If and when, Sn atoms interact with each other on the Ge surface, the Sn atoms can form island clusters that will not incorporate into Ge. To prevent Sn atoms from moving and interacting, it was discovered that co-depositing Si with Sn (and Ge) was successful in preventing Sn clustering.

    [0032] Using a co-deposition of Si with Ge and Sn, it was possible to incorporate 18% Sn with 15% Si and 67% Ge at a growth temperature of 135° C. resulting in a lattice parameter of 5.8 Å. There have been reports of higher Sn incorporation in Ge (by CVD up to 22%) but without Si, and there have been reports of SiGeSn growth but with much less Sn (by MBE up to 6%). The present method of pseudomorphic growth can be optimized, with the possibility that even higher Sn in the GeSn alloy can be obtained while varying both the Ge and Si. (It should be noted that Si and Ge are completely miscible in each other.) Additionally, the present method also allows for adjusting the Sn and Si composition to controllably obtain lower lattice parameters toward the Ge virtual substrate value of 5.6 Å. Thus, SiGeSn virtual substrates with a range of lattice parameters (5.8 Å-5.6 Å) was created that is under no strain for the subsequent growth of GeSn compounds of varying Sn concentrations. (The inclusion of Si in GeSn results in SiGeSn being an indirect bandgap electronic material and has poor optoelectronic properties.)

    [0033] Unlike CVD GeSn growth, optoelectronic-relevant GeSn compounds can be grown on SiGeSn without film strain and under tensile strain. Tensile strain is the opposite of compressive strain, where it acts to make GeSn a direct bandgap material for lower Sn concentrations and enhances Sn incorporation. Theory predicts that any composition of GeSn under the appropriate amount of tension should have a direct bandgap and, therefore, be a viable optoelectronic material. Based on preliminary results, it is anticipated that varying the Sn concentration from 30% to 0% will give a range of band gaps from 0.10 eV to 0.80 eV (12 μm to 1.5 μm), which covers the midwave IR, shortwave IR, and telecommunication bands.

    [0034] The process by which the SiGeSn virtual substrate is formed begins with a Si wafer that has been chemically cleaned to remove oxides and contaminants. The following is the general recipe for growth of the 18% Sn, 15% Si, and 67% Ge virtual substrate, but the final growth rates and temperatures can be adjusted to produce lower Sn concentration films:

    [0035] 1) Ramp wafer temperature to >600° C.

    [0036] 2) Begin depositing Si and grow a 200 Å buffer layer

    [0037] 3) Begin ramping down wafer temperature while continuously depositing Si at 0.5 Å/s

    [0038] 4) Begin continuous deposition of Ge at a low growth rate 0.05 Å/s

    [0039] 5) Ramp the Ge growth rate from 0.05 Å/s to 0.5 Å/s

    [0040] 6) When the Ge growth rate reaches 0.5 Å/s, begin ramping down the Si rate to 0.07 Å/s

    [0041] 7) With the sample temperature below 300° C., begin continuous deposition of Sn

    [0042] 8) Ramp the Sn growth rate from <0.01 Å/s up to 0.12 Å/s

    [0043] 9) Stabilize the growth temperature at 135° C. and deposit the SiGeSn alloy

    [0044] 10) Grow the SiGeSn alloy to a thickness>2000 Å/s for complete relaxation

    [0045] 11) Grow a GeSn optoelectronic alloy of any thickness and composition

    [0046] FIG. 2 shows the decreasing temperature and Si flux rate and increasing Ge and Sn flux rate for MBE growth of SiGeSn virtual substrates and GeSn films. Growing a SiGeSn virtual substrate requires precisely decreasing growth temperature and Si flux and precisely increasing Ge and Sn flux. MBE with e-beam evaporation can provide such precise flux variations, not limited by thermal inertia as in Knudsen cells.

    [0047] The above descriptions are those of the preferred embodiments of the invention. Various modifications and variations are possible in light of the above teachings without departing from the spirit and broader aspects of the invention. It is therefore to be understood that the claimed invention may be practiced otherwise than as specifically described. Any references to claim elements in the singular, for example, using the articles “a,” “an,” “the,” or “said,” is not to be construed as limiting the element to the singular.