Radio frequency interconnection device

Abstract

An interconnection system is described including a first printed circuit board, the first printed circuit board including a first portion of a filter, the filter used to communicate a signal between the first printed circuit board and a second printed circuit board, and a mechanical structure for coupling the signal between the first printed circuit board and the second printed circuit board, the second printed circuit board being oriented at an angle with respect to the first printed circuit board.

Claims

1. An interconnection system, comprising; a first printed circuit board; a second printed circuit board, wherein the first printed circuit board comprises a first portion of a bandpass filter, wherein the bandpass filter is configured to communicate a signal between the first printed circuit board and the second printed circuit board; and a metal clip formed of curved strips configured to couple the signal between the first printed circuit board and the second printed circuit board, the second printed circuit board being oriented at an angle with respect to the first printed circuit board.

2. The interconnection system according to claim 1, wherein said angle is a right angle.

3. The interconnection system according to claim 1, wherein said bandpass filter is a symmetric radio frequency wideband bandpass filter.

4. The interconnection system according to claim 1, wherein said metal clip provides a coupling using two electrical interface connections.

5. The interconnection system according to claim 4, wherein one of said two electrical interface connections is for said signal.

6. The interconnection system according to claim 1, wherein said angle is an acute angle.

7. The interconnection system according to claim 1, wherein said first printed circuit board comprises a first transmission line connected to a first I/O port, and wherein said first transmission line is terminated in an intermediate terminating pad, said intermediate terminating pad being spaced apart from a first grounding pad.

8. The interconnection system according to claim 7, wherein said first transmission line is one of a micro-strip line, a coplanar line, a strip-line or a multilayer line and wherein said second transmission line is one of a micro-strip line, a coplanar line, a strip-line or a multilayer line and wherein said first grounding pad and said intermediate terminating pad are printed on an outer surface of said first circuit board.

9. The interconnection system according to claim 7, wherein a distance between said intermediate terminating pad and said first grounding pad is between 100 and 200 μm.

10. The interconnection system according to claim 7, wherein said second printed circuit board comprises a third transmission line that is connected to a second grounding pad, said second grounding pad located directly above said first grounding pad, said third transmission line also connected to an output line at an intersection point, wherein said third transmission line is a micro-strip line.

11. The interconnection system according to claim 7, wherein said first transmission line is about one half-wavelength long.

12. The interconnection system according to claim 7, wherein said first transmission line is straight.

13. The interconnection system according to claim 7, wherein said first transmission line is meandering.

14. An electronic device, comprising: at least two printed circuit boards, the at least two printed circuit boards comprising a first printed circuit board and a second printed circuit board, the first printed circuit board comprising a first portion of a bandpass filter, wherein the bandpass filter is configured to communicate a signal between the first printed circuit board and the second printed circuit board, the second printed circuit board being oriented at an angle with respect to the first printed circuit board; and a metal clip formed of curved strips, the metal clip being configured to couple the signal between the first printed circuit board and the second printed circuit board.

15. The electronic device according to claim 14, wherein said bandpass filter is a symmetric radio frequency wideband bandpass filter.

16. The electronic device according to claim 14, wherein said metal clip provides a coupling using two electrical interface connections.

17. The electronic device according to claim 16, wherein one of said two electrical interface connections is for said signal.

18. The electronic device according to claim 14, wherein said angle is an acute angle.

19. The electronic device according to claim 14, wherein said angle is a right angle.

20. The electronic device according to claim 14, wherein said first printed circuit board comprises a first transmission line connected to a first I/O port, and wherein said first transmission line is terminated in an intermediate terminating pad, said intermediate terminating pad being spaced apart from a first grounding pad.

21. The electronic device according to claim 20, wherein said second printed circuit board comprises a third transmission line that is connected to a second grounding pad, said second grounding pad located directly above said first grounding pad, said third transmission line also connected to an output line at an intersection point, wherein said third transmission line is a micro-strip line.

22. The electronic device according to claim 20, wherein said first transmission line is about one half-wavelength long.

23. The electronic device according to claim 20, wherein said first transmission line is straight.

24. The electronic device according to claim 20, wherein said first transmission line is meandering.

25. The electronic device according to claim 20, wherein a distance between said intermediate terminating pad and said first grounding pad is between 100 and 200 μm.

26. The electronic device according to claim 20, wherein said first transmission line is one of a micro-strip line, a coplanar line, a strip-line or a multilayer line and wherein said second transmission line is one of a micro-strip line, a coplanar line, a strip-line or a multilayer line and wherein said first grounding pad and said intermediate terminating pad are printed on an outer surface of said first circuit board.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The proposed method and apparatus is best understood from the following detailed description when read in conjunction with the accompanying drawings. The drawings include the following figures briefly described below:

(2) FIG. 1 depicts a device having several circuit boards that are perpendicular to each other and are interconnected using conventional Peripheral Component Interconnect express (PCIe) connectors.

(3) FIG. 2 shows a set top box (STB) having several circuit boards that are perpendicular to each other and are interconnected using conventional Peripheral Component Interconnect express (PCIe) connectors.

(4) FIG. 3 depicts two circuit boards that are arranged parallel to each other and which are interconnected using a metal part, an element of which is coupled to the board-to-board (B2B) grounding screw.

(5) FIG. 4 shows two circuit boards that are perpendicular to each other and which are interconnected by pins integrated into the vertical circuit board.

(6) FIG. 5 depicts two circuit boards interconnected using a single pin and having a filtering pattern that enables a wideband interconnect.

(7) FIG. 6 shows two circuit boards that are perpendicular to each other and which are interconnected by one or more U-shaped metal clips.

(8) FIG. 7 is an exemplary design of a symmetric radio frequency wideband bandpass filter in accordance with the embodiments of the invention.

(9) FIG. 8 shows the filter response for the exemplary symmetric radio frequency wideband bandpass filter of FIG. 7.

(10) FIG. 9 illustrates an exemplary symmetric radio frequency wideband bandpass filter in accordance with embodiments of the invention.

(11) FIG. 10 shows the behavior for the exemplary symmetric radio frequency wideband bandpass filter of FIG. 9.

(12) FIG. 11 shows a first portion of the exemplary symmetric radio frequency wideband bandpass filter. The first portion does not include TL3 or the output line.

(13) FIG. 12 shows the second (remaining) portion of the exemplary symmetric radio frequency wideband bandpass filter including TL3 and the output line and on a second circuit board.

(14) FIG. 13 shows a close-up sectional view of the interconnection between orthogonal circuit boards using an embodiment of the proposed apparatus, with an air gap separating the circuit boards in order to avoid a short-circuit.

(15) FIG. 14 shows an embodiment of the proposed interconnection device (apparatus), wherein TL3 can be considered to be a single metal part with two baseplates (on two circuit boards).

(16) FIG. 15 shows the response and performance of an embodiment of the proposed interconnection device (apparatus).

(17) FIG. 16 is an exemplary embodiment of the proposed interconnection device (apparatus).

(18) FIG. 17 is a block diagram of a media device such as a set top box.

(19) It should be understood that the drawing(s) are for purposes of illustrating the concepts of the disclosure and is not necessarily the only possible configuration for illustrating the disclosure.

DETAILED DESCRIPTION

(20) The present description illustrates the principles of the present disclosure. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the disclosure and are included within its scope.

(21) All examples and conditional language recited herein are intended for educational purposes to aid the reader in understanding the principles of the disclosure and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions.

(22) Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosure, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

(23) Thus, for example, it will be appreciated by those skilled in the art that the block diagrams presented herein represent conceptual views of illustrative circuitry embodying the principles of the disclosure. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes which may be substantially represented in computer readable media and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

(24) The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term “processor” or “controller” should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (DSP) hardware, read only memory (ROM) for storing software, random access memory (RAM), and nonvolatile storage.

(25) Other hardware, conventional and/or custom, may also be included. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementer as more specifically understood from the context.

(26) In the claims hereof, any element expressed as a means for performing a specified function is intended to encompass any way of performing that function including, for example, a) a combination of circuit elements that performs that function or b) software in any form, including, therefore, firmware, microcode or the like, combined with appropriate circuitry for executing that software to perform the function. The disclosure as defined by such claims resides in the fact that the functionalities provided by the various recited means are combined and brought together in the manner which the claims call for. It is thus regarded that any means that can provide those functionalities are equivalent to those shown herein.

(27) The proposed interconnection device (apparatus) is described below step by step from the origin of the idea to the application to an example of realization.

(28) FIG. 7 is an exemplary design of a symmetric radio frequency wideband bandpass filter in accordance with the principles of the proposed apparatus. The symmetric radio frequency wideband bandpass filter of FIG. 7 includes three theoretical transmission lines TLIN, one (TL1) connected to the input (P1) and output (P2) ports and the two other lines (TL2, TL3) connected to the ground at their respective I/O ports. For each TLIN, Z is defined as the characteristic impedance of the line, E is defined as the electrical length (in degrees) and F is defined as the related frequency.

(29) FIG. 8 shows the filter response for the exemplary symmetric radio frequency wideband bandpass filter of FIG. 7. With the values of the design of the symmetric radio frequency wideband bandpass filter as shown in FIG. 7 and described above, the filter responses are plotted in FIG. 8, showing a wide passing band (dB(S12)) from 2-6 GHz, with low reflection coefficient (dB(S11)<−20 dB). This is in the ideal case.

(30) FIG. 9 illustrates an exemplary symmetric radio frequency wideband bandpass filter in accordance with the principles of the proposed apparatus when it is provided on a planar board. Using micro-strip lines printed onto a low-cost fiberglass reinforced epoxy (FR4) based multilayer substrate, results in the circuit presented in FIG. 9, with first transmission line 925 (TL1) length at around 20 mm, i.e. half-wavelength at 4 GHz. First transmission line 925 (TL1) is connected to input port 915 (P1) and output port 920 (P2). Second transmission line 935 (TL2) is connected to first transmission line 925 (TL1). Third transmission line 930 (TL3) is also connected to first transmission line 925 (TL1). Third transmission line 930 (TL3) terminates in grounded via-hole 910. Transmission lines 935 (TL2) and 930 (TL3) are shunt elements (and are also called short circuit stub lines). Straight lines are used here, but, of course, the lines can meander in order to significantly compact the design.

(31) FIG. 10 shows the behavior for the exemplary symmetric radio frequency wideband bandpass filter of FIG. 9. With the filter shown in FIG. 9 and described above, the behavior shown in FIG. 10 is close to the behavior of the ideal filter of FIG. 7, with naturally higher insertion loss (due to mainly to the high dielectric loss of the FR4 substrate, Df˜0.02).

(32) From the above described single horizontal planar filter, it is possible to consider placing a portion of the filter network in a second plane, for instance, onto a vertical circuit board. The proposed interconnection device (apparatus) includes placing the shunt element (short circuit stub line) TL3 on the vertical circuit board to provide the interconnection between the two circuit boards using only a single metal part disposed on two perpendicular circuit boards.

(33) FIG. 11 shows a first portion of the exemplary symmetric radio frequency wideband bandpass filter. The first portion of the exemplary symmetric radio frequency wideband bandpass filter is disposed on a first circuit board 1105 having a ground plane 1110. Input port 1115 is connected to first transmission line 1130 (TL1). First transmission line 1130 (TL1) of the filter terminates in intermediate terminating pad 1120 (P2i). Grounding pad 1125 (PG1) is spaced apart from intermediate terminating pad 1120 (P2i). The first part of the filter on the first circuit board may be realized using other transmission lines such as strip-lines, coplanar lines, multilayer lines as well as micro-strip lines subject to the constraint that grounding pad 1125 and intermediate terminating pad 1120 are printed on the top layer of the first circuit board. The first portion does not include TL3 or the output line. The distance between PG1 and P2i is in the range of 100-200 μm depending on the frequency range of operation.

(34) FIG. 12 shows the second (remaining) portion of the exemplary symmetric radio frequency wideband bandpass filter including TL3 and the output line on a second circuit board, the second circuit board being orthogonal to the first circuit board. TL3 is formed in an inverted narrow U-shape so that coming from the intermediate terminating pad P2i it returns to the ground pad PG1. On the second circuit board, TL3 is in contact with the output port P2 at an intersection point C and with a ground pad PG2 located above PG1. The elements of the first circuit board are indicated with the same reference indicia as on FIG. 11 and will not be described again. The second circuit board 1205 has a ground plane 1210. Third transmission line 1220 (TL3) is a shunt element (short circuit stub line). It should be noted that third transmission line 1220 (TL3) may be another shape than an inverted U-shape as described above provided that connections 1125, 1120, 1225 and C are ensured. Output port 1215 (P2) is in contact with third transmission line 1220 (TL3) at intersection point C. Grounding pad 1225 (PG2) is located above grounding pad 1125 (PG1).

(35) Any kind of filter circuit may be applied provided the circuit contains, at the output port, a short-circuit stub line (shunt element) (TL3) that enables realization of the interconnection with the perpendicular circuit board (e.g., printed circuit board (PCB)).

(36) FIG. 13 shows a close-up sectional view of the interconnection between the first and second orthogonal circuit boards using an embodiment of the proposed apparatus, with an air gap separating the first and second circuit boards in order to avoid a short-circuit. TL3 can now be considered as a single metal part with two baseplates soldered to the respective pads PG1 and P2i printed on the first circuit board, as illustrated in FIG. 14, which shows the proposed interconnection device (apparatus), wherein TL3 can be considered a single metal part with two baseplates (on two circuit boards) perpendicular to each other. The various elements of FIG. 13 are labeled with the same reference indicia as used to label the elements in FIGS. 11 and 12. At this point, TL3 should be considered as an electrical model designed to prove the concept. High volume realization methods are described below.

(37) The entire circuit as described above and shown in FIG. 12 has been simulated using a 3D electromagnetic simulation tool as proof-of-concept. FIG. 15 shows the response and performance of the proposed interconnection device (apparatus). As can be seen from FIG. 15 the response and performance are similar to a uni-planar filter (FIG. 10). The achieved performances in term of bandwidth enable the proposed interconnection device (apparatus) to be applied to dual-band WLAN applications, up to 6 GHz.

(38) The proposed interconnection device (apparatus) can be fabricated using a well-known stamping process and there are several ways to interconnect the different pins to the circuit board and to the metal plate. One such fabrication of the proposed interconnection device (apparatus) is illustrated in FIG. 16, where curved strips are introduced in order provide the requested flexibility to ensure the contact with grounding pad 1225 (PG2) and intersection point C disposed on the second circuit board. Grounding pad 1125 (PG1) and intermediate terminating pad 1120 (P2i) are disposed on the first circuit board.

(39) FIG. 17 is an example block diagram of the media device 1700 of FIG. 2. A media device is an electronic device such as, but not limited to, a set top box. The block diagram configuration includes a bus-oriented 1750 configuration interconnecting a processor 1720, and a memory 1745. The configuration of FIG. 17 also includes a network interface 1705 and may include either a wired or a wireless interface or both.

(40) Processor 1720 provides computation functions for the media device, such as the one depicted in FIG. 2. The processor 1720 can be any form of CPU or controller that utilizes communications between elements of the media device to control communication and computation processes. Those of skill in the art recognize that bus 1750 provides a communication path between the various elements of embodiment 1700 and that other point-to-point interconnection options (e.g. non-bus architecture) are also feasible.

(41) User interface and display 1710 is driven by interface circuit 1715. The interface 1710 is used as a multimedia interface having both audio and video capability to display streamed or downloaded audio and/or video and/or multimedia content obtained via network interface 1725 and connection 1705 to a network.

(42) Memory 1745 can act as a repository for memory related to any of the methods that incorporate the functionality of the media device. Memory 1745 can provide the repository for storage of information such as program memory, downloads, uploads, or scratchpad calculations as well as the storage of streamed or downloaded content including audio, video and multimedia content. Those of skill in the art will recognize that memory 1745 may be incorporated all or in part of processor 1720. Network interface 1725 has both receiver and transmitter elements for communication as known to those of skill in the art.

(43) Network interface 1725 may include a wireless interface to communicate wirelessly to transmit requests for audio and/or video and/or multimedia content and receive the requested audio and/or video and/or multimedia content. In order to do so, a radio frequency interface may be provided. The radio frequency interface transmits and receives using an antenna, which may use a radio frequency wideband bandpass filter. The radio frequency wideband bandpass filter circuit may be split across two circuit boards, which are orthogonal to each other. The orthogonal circuit boards may use the interconnection device depicted in FIGS. 12 and 13 and described above.

(44) Any other filter networks terminated by a shunt (short circuit stub line) transmission line, such as the example considered herein, can use the proposed interconnection device.

(45) It is to be understood that the proposed method and apparatus may be implemented in various forms of hardware, software, firmware, special purpose processors, or a combination thereof. Special purpose processors may include application specific integrated circuits (ASICs), reduced instruction set computers (RISCs) and/or field programmable gate arrays (FPGAs). Preferably, the proposed method and apparatus is implemented as a combination of hardware and software. Moreover, the software is preferably implemented as an application program tangibly embodied on a program storage device. The application program may be uploaded to, and executed by, a machine comprising any suitable architecture. Preferably, the machine is implemented on a computer platform having hardware such as one or more central processing units (CPU), a random access memory (RAM), and input/output (I/O) interface(s). The computer platform also includes an operating system and microinstruction code. The various processes and functions described herein may either be part of the microinstruction code or part of the application program (or a combination thereof), which is executed via the operating system. In addition, various other peripheral devices may be connected to the computer platform such as an additional data storage device and a printing device.

(46) It should be understood that the elements shown in the figures may be implemented in various forms of hardware, software or combinations thereof. Preferably, these elements are implemented in a combination of hardware and software on one or more appropriately programmed general-purpose devices, which may include a processor, memory and input/output interfaces. Herein, the phrase “coupled” is defined to mean directly connected to or indirectly connected with through one or more intermediate components. Such intermediate components may include both hardware and software based components.

(47) It is to be further understood that, because some of the constituent system components and method steps depicted in the accompanying figures are preferably implemented in software, the actual connections between the system components (or the process steps) may differ depending upon the manner in which the proposed method and apparatus is programmed. Given the teachings herein, one of ordinary skill in the related art will be able to contemplate these and similar implementations or configurations of the proposed method and apparatus.

(48) For purposes of this application and the claims, using the exemplary phrase “at least one of A, B and C,” the phrase means “only A, or only B, or only C, or any combination of A, B and C.”