METHOD OF PRODUCING VERTICAL CAVITY SURFACE EMITTING LASER, VERTICAL CAVITY SURFACE EMITTING LASER, DISTANCE SENSOR, AND ELECTRONIC APPARATUS

Abstract

[Object] To provide a method of producing a vertical cavity surface emitting laser exhibiting excellent conductivity/heat-dissipation, the vertical cavity surface emitting laser, a distance sensor, and an electronic apparatus.

[Solving Means] A method of producing a vertical cavity surface emitting laser according to the present technology includes: creating a first substrate by sequentially stacking a dielectric DBR layer and a first dielectric to-be-bonded layer on a support substrate. A second substrate is created by sequentially stacking a semiconductor DBR layer, a current blocking layer, an active layer, a contact layer, and a second dielectric to-be-bonded layer on a semiconductor substrate. The dielectric to-be-bonded layers are bonded to each other. A bonded body of the first substrate and the second substrate is annealed.

Claims

1. A method of producing a vertical cavity surface emitting laser, comprising: creating a first substrate by sequentially stacking a dielectric DBR (Distributed Bragg Reflector) layer and a first dielectric to-be-bonded layer on a support substrate; creating a second substrate by sequentially stacking a semiconductor DBR layer, a current blocking layer, an active layer, a contact layer, and a second dielectric to-be-bonded layer on a semiconductor substrate; bonding the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer to each other; and annealing a bonded body of the first substrate and the second substrate.

2. The method of producing a vertical cavity surface emitting laser according to claim 1, wherein the step of bonding the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer to each other includes performing plasma bonding in which the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer are irradiated with plasma and then the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer are bonded to each other.

3. The method of producing a vertical cavity surface emitting laser according to claim 1, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more.

4. The method of producing a vertical cavity surface emitting laser according to claim 1, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, a refractive index of at least one of the first layer or the second layer being 2 or more.

5. The method of producing a vertical cavity surface emitting laser according to claim 1, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more, a refractive index of at least one of the first layer or the second layer being 2 or more.

6. The method of producing a vertical cavity surface emitting laser according to claim 1, wherein the first dielectric to-be-bonded layer is formed of any of SiO.sub.2, SiON, SiN, and Al.sub.2O.sub.3, and the second dielectric to-be-bonded layer is formed of the same material as that of the first dielectric to-be-bonded layer.

7. The method of producing a vertical cavity surface emitting laser according to claim 3, wherein the first material is SiO.sub.2, and the second material is Si.sub.3N.sub.4.

8. The method of producing a vertical cavity surface emitting laser according to claim 3, wherein the first material is Si.sub.3N.sub.4, and the second material is TiO.sub.2.

9. The method of producing a vertical cavity surface emitting laser according to claim 4, wherein the first material is SiO.sub.2, and the second material is Ta.sub.2O.sub.5.

10. The method of producing a vertical cavity surface emitting laser according to claim 4, wherein the first material is SiO.sub.2, and the second material is TiO.sub.2.

11. A vertical cavity surface emitting laser, comprising an integrated body including a support substrate, a dielectric DBR layer on the support substrate, a dielectric to-be-bonded layer on the dielectric DBR layer, a first contact layer on the dielectric to-be-bonded layer, an active layer on the first contact layer, a blocking layer on the active layer, a semiconductor DBR layer on the blocking layer, and a second contact layer on the semiconductor DBR layer.

12. The vertical cavity surface emitting laser according to claim 11, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more.

13. The vertical cavity surface emitting laser according to claim 11, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, a refractive index of at least one of the first layer or the second layer being 2 or more.

14. The vertical cavity surface emitting laser according to claim 11, wherein the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more, a refractive index of at least one of the first layer or the second layer being 2 or more.

15. A distance sensor, comprising a vertical cavity surface emitting laser that includes an integrated body including a support substrate, a dielectric DBR layer on the support substrate, a dielectric to-be-bonded layer on the dielectric DBR layer, a first contact layer on the dielectric to-be-bonded layer, an active layer on the first contact layer, a blocking layer on the active layer, a semiconductor DBR layer on the blocking layer, and a second contact layer on the semiconductor DBR layer.

16. An electronic apparatus, comprising a vertical cavity surface emitting laser that includes an integrated body including a support substrate, a dielectric DBR layer on the support substrate, a dielectric to-be-bonded layer on the dielectric DBR layer, a first contact layer on the dielectric to-be-bonded layer, an active layer on the first contact layer, a blocking layer on the active layer, a semiconductor DBR layer on the blocking layer, and a second contact layer on the semiconductor DBR layer.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0040] FIG. 1 is a cross-sectional view of a VCSEL device according to an embodiment of the present technology.

[0041] FIG. 2 is a cross-sectional view of a dielectric DBR layer of the VCSEL device.

[0042] FIG. 3 is a cross-sectional view of the VCSEL device to which a wiring is connected.

[0043] FIG. 4 is a table showing refractive indexes and thermal conductivity of respective materials.

[0044] FIG. 5 is a schematic diagram showing a stacked structure of a dielectric DBR layer of the VCSEL device.

[0045] FIG. 6 is a table showing materials of the dielectric DBR layer of the VCSEL device (having an emission wavelength of 840 nm), and the structure thereof.

[0046] FIG. 7 is a table showing materials of the dielectric DBR layer of the VCSEL device (having an emission wavelength of 940 nm), and the structure thereof.

[0047] FIG. 8 is a graph showing simulation results of the reflectance of the VCSEL device (having an emission wavelength of 840 nm).

[0048] FIG. 9 is a graph showing simulation results of the reflectance of the VCSEL device (having an emission wavelength of 940 nm).

[0049] FIG. 10 is a cross-sectional view of a first substrate used for producing the VCSEL device.

[0050] FIG. 11 is a cross-sectional view of a second substrate used for producing the VCSEL device.

[0051] FIG. 12 is a schematic diagram showing a method of producing the VCSEL device.

[0052] FIG. 13 is a schematic diagram showing the method of producing the VCSEL device.

[0053] FIG. 14 is a schematic diagram showing the method of producing the VCSEL device.

[0054] FIG. 15 is a schematic diagram showing the method of producing the VCSEL device.

[0055] FIG. 16 is a schematic diagram showing the method of producing the VCSEL device.

[0056] FIG. 17 is a schematic diagram showing the method of producing the VCSEL device.

[0057] FIG. 18 is a schematic diagram showing the method of producing the VCSEL device.

[0058] FIG. 19 is a schematic diagram showing the method of producing the VCSEL device.

[0059] FIG. 20 is a schematic diagram showing the method of producing the VCSEL device.

[0060] FIG. 21 is a schematic diagram showing the method of producing the VCSEL device.

[0061] FIG. 22 is a cross-sectional view of a VCSEL device integrated body according to an embodiment of the present technology.

[0062] FIG. 23 is a schematic diagram showing a method of producing the VCSEL device integrated body.

[0063] FIG. 24 is a schematic diagram showing the method of producing the VCSEL device integrated body.

[0064] FIG. 25 is a schematic diagram showing the method of producing the VCSEL device integrated body.

MODE(S) FOR CARRYING OUT THE INVENTION

[0065] A vertical cavity surface emitting laser (VCSEL) device according to an embodiment of the present technology will be described.

[0066] [Structure of VCSEL Device]

[0067] FIG. 1 is a cross-sectional view of a VCSEL device 100 according to this embodiment. As shown in the figure, the VCSEL device 100 is configured by stacking a support substrate 101, a dielectric DBR layer 102, a dielectric to-be-bonded layer 103, a first contact layer 104, an active layer 105, a blocking layer 106, a semiconductor DBR layer 107, and a second contact layer 108 in this order.

[0068] The support substrate 101 supports the respective layers of the VCSEL device 100. The support substrate 101 is formed of, for example, Si, Ge, or Al.sub.2O.sub.3.

[0069] The dielectric DBR layer 102 is a DBR (Distributed Bragg Reflector) formed of a dielectric. FIG. 2 is a cross-sectional view showing the dielectric DBR layer 102. As shown in the figure, the dielectric DBR layer 102 is configured by alternately stacking a first layer 102a and a second layer 102b. The number of layers of the first layer 102a and the second layer 102b are not limited to the illustrated one. The thickness of the dielectric DBR layer 102 is, for example, 3 μm. The material of the first layer 102a and details of the second layer 102b will be described below.

[0070] The dielectric to-be-bonded layer 103 bonds the lower layer structure and the upper layer structure of the dielectric to-be-bonded layer 103. The dielectric to-be-bonded layer 103 is formed of a dielectric, e.g., SiO.sub.2, SiON, SiN, or Al.sub.2O.sub.3.

[0071] The first contact layer 104 is formed of an n-type semiconductor material such as n-type GaAs. The thickness of the first contact layer 104 is, for example, 1 to 2 μm.

[0072] The active layer 105 is formed by alternately stacking a quantum well layer and a barrier layer, and forms a quantum well, the quantum well layer being formed of GaAs or the like and having a small band gap, the barrier layer being formed of AlGaAs or the like and having a large band gap. The thickness of the active layer 105 is, for example, 0.3 μm.

[0073] The blocking layer 106 includes an oxidized area 106a and a non-oxidized area 106b, and applies a blocking effect to a current flowing between the first contact layer 104 and the second contact layer 108.

[0074] The oxidized area 106a is formed of oxidized AlGaAs or the like, has low conductivity and a small refractive index, and functions as a light confinement area. The non-oxidized area 106b is formed of non-oxidized AlGaAs or the like, has higher conductivity than the oxidized area 106a, and functions as a current injection area. The thickness of the blocking layer 106 is, for example, 0.15 μm.

[0075] The semiconductor DBR layer 107 is a DBR formed of a semiconductor. The semiconductor DBR layer 107 configured by alternately stacking a first layer and a second layer having different refractive indexes. The first layer is formed of, for example, Al.sub.xGa.sub.1-xAs, and the second layer is formed of, for example, Al.sub.xGa.sub.1-xAs having a composition different from that of the first layer. The number of stacked layers of the first layer and the second layer is not particularly limited. The thickness of the semiconductor DBR layer 107 is, for example, 3 μm.

[0076] The second contact layer 108 is formed of a p-type semiconductor material such as a p-type GaAs. The thickness of the second contact layer 108 is not particularly limited. However, since laser is transmitted through the second contact layer 108, it is favorable that the thickness of the second contact layer 108 is smaller.

[0077] FIG. 3 is a cross-sectional view of the VCSEL device 100 to which a wiring is connected. As shown in the figure, an electrode 109 is formed on each of the first contact layer 104 and the second contact layer 108. The surface of the VCSEL device 100 is covered with an insulation layer 110 formed of an insulation material. A pad 111 is formed on the insulation layer 110, and the electrode 109 and the pad 111 are connected to each other via a wiring 112.

[0078] [Operation of VCSEL Device]

[0079] The VCSEL device 100 operates in a way similar to that of a general VCSEL device. That is, when a voltage is applied between the first contact layer 104 and the second contact layer 108, a current flows between the first contact layer 104 and the second contact layer 108.

[0080] The current is subject to the blocking effect by the blocking layer 106, and injected into the non-oxidized area 106b. Due to this injected current, spontaneous emission light is generated in an area of the active layer 105 close to the non-oxidized area 106b. The spontaneous emission light travels in the stacking direction of the VCSEL device 100 (direction orthogonal to the layers), and is reflected by the dielectric DBR layer 102 and the semiconductor DBR layer 107.

[0081] The dielectric DBR layer 102 and the semiconductor DBR layer 107 are configured to reflect light having a specific wavelength (hereinafter, oscillation wavelength). The component of the spontaneous emission light having an oscillation wavelength forms a standing wave between the dielectric DBR layer 102 and the semiconductor DBR layer 107, and is amplified by the active layer 105. In the case where the injected current exceeds a threshold value, the light forming a standing wave performs laser oscillation, and is transmitted through the second contact layer 108 to be emitted.

[0082] [Regarding Material of Dielectric DBR Layer]

[0083] As described above, the dielectric DBR layer 102 is configured by alternately stacking the first layer 102a and the second layer 102b. Hereinafter, the material of the first layer 102a will be referred to as the first material and the material of the second layer 102b will be referred to as the second material.

[0084] It is favorable that the thermal conductivity of at least one of the first material or the second material is 10 W/mK or more. Further, it is favorable that the refractive index of at least one of the first material or the second material is 2 or more. Further, it is more favorable that the thermal conductivity of at least one of the first material or the second material is 10 W/mK or more and the refractive index of at least one of the first material or the second material is 2 or more.

[0085] FIG. 4 is a table showing the refractive indexes and thermal conductivity of respective materials. Examples of the material having thermal conductivity of 10 W/mK or more include Si.sub.3N.sub.4, AlN, and TiO.sub.2. Further, examples of the material having a refractive index of 2 or more include Ta.sub.2O.sub.5, TiO.sub.2, AlN, Si, and GaAs.

[0086] When the combination of the first material and the second material is described as “the first material/the second material”, SiO.sub.2/Ta.sub.2O.sub.5, SiO.sub.2/Si.sub.3N.sub.4, SiO.sub.2/TiO.sub.2, or Si.sub.3N.sub.4/TiO.sub.2 is favorable.

[0087] FIG. 5 is a schematic diagram showing a stacked structure of the dielectric DBR layer 102. As shown in the figure, each of the first layer 102a and the second layer 102b has a thickness corresponding to λ/4. A represents the emission wavelength of the VCSEL device 100, the thickness corresponding to λ/4 is determined by the refractive index of the corresponding material. A pair of one first layer 102a and one second layer 102b will be referred to as the stacked layer pair.

[0088] FIG. 6 and FIG. 7 are each a table showing the thickness corresponding to λ/4 for the combination of the first material/the second material, the reflectance, and the thermal resistance. FIG. 6 is a table in the case where an emission wavelength A of the VCSEL device 100 is 840 nm, and FIG. 7 is a table in the case where the emission wavelength A of the VCSEL device 100 is 940 nm.

[0089] FIG. 8 shows simulation results of the reflectance of the VCSEL device 100 having the emission wavelength A of 840 nm, and FIG. 9 shows simulation results of the reflectance of the VCSEL device 100 having the emission wavelength A of 940 nm.

[0090] As shown in FIG. 6, in the case of SiO.sub.2/Ta.sub.2O.sub.5, the thickness corresponding to λ/4 of SiO.sub.2 is 144 nm and the thickness corresponding to λ/4 of Ta.sub.2O.sub.5 is 117 nm. In order to achieve the reflectance of 99.96%, it is necessary to make the number of the stacked layer pairs 20. In this case, the thermal resistance is 4.7×10.sup.−6 m.sup.2.Math.K/W, and the thermal resistance of the dielectric DBR layer 102 can be reduced.

[0091] Also in the cases of SiO.sub.2/Si.sub.3N.sub.4, SiO.sub.2/TiO.sub.2, and Si.sub.3N.sub.4/TiO.sub.2, the thermal resistance of the dielectric DBR layer 102 can be reduced as shown in FIG. 6 and FIG. 7, and thus, they are favorable as the first material and the second material.

[0092] Note that the dielectric DBR layer 102 is not limited to the one obtained by alternately stacking two types of materials, and may be one obtained by alternately stacking three or more types of materials.

[0093] Even in this case, it is favorable that the thermal conductivity of at least one of a plurality of materials forming the dielectric DBR layer 102 is 10 W/mK or more. Further, it is favorable that the refractive index of at least one of the plurality of materials is 2 or more. Further, it is more favorable that the thermal conductivity of at least one of the plurality of materials is 10 W/mK or more and the refractive index of at least one of the plurality of materials is 2 or more.

[0094] [Method of Producing VCSEL Device]

[0095] A method of producing the VCSEL device 100 will be described. The VCSEL device 100 can be produced by preparing the first substrate and the second substrate, and bonding them to each other. Note that in the following description, layers to be the respective layers of the above-mentioned VCSEL device 100 will be denoted by the same reference symbols as those of the respective layers of the VCSEL device 100.

[0096] FIG. 10 is a cross-sectional view showing a first substrate 210. As shown in the figure, the first substrate 210 is formed by sequentially stacking the support substrate 101, the dielectric DBR layer 102, and a first dielectric to-be-bonded layer 211.

[0097] The dielectric DBR layer 102 can be formed by alternately depositing the first layer 102a and the second layer 102b on the support substrate 101. The deposition of the first layer 102a and the second layer 102b can be performed by a sputtering method, a CVD (chemical vapor deposition) method, or an ALD (Atomic Layer Deposition) method.

[0098] The first dielectric to-be-bonded layer 211 is a layer formed of the same material as that of the above-mentioned dielectric to-be-bonded layer 103. The first dielectric to-be-bonded layer 211 can be stacked on the dielectric DBR layer 102 by a sputtering method, a CVD method, or an ALD method.

[0099] FIG. 11 is a cross-sectional view showing a second substrate 220. As shown in the figure, the second substrate 220 is formed by sequentially stacking a semiconductor substrate 221, the second contact layer 108, the semiconductor DBR layer 107, the blocking layer 106, the active layer 105, the first contact layer 104, and a second dielectric to-be-bonded layer 222.

[0100] The second contact layer 108, the semiconductor DBR layer 107, the blocking layer 106, the active layer 105, and the first contact layer 104 can be stacked on the semiconductor substrate 221 by epitaxial growth by an MOCVD (metal organic chemical vapor deposition) method.

[0101] The second dielectric to-be-bonded layer 222 is a layer formed of the same material as that of the above-mentioned dielectric to-be-bonded layer 103. The second dielectric to-be-bonded layer 222 can be stacked on the first contact layer 104 by a sputtering method, a CVD method, or an ALD method.

[0102] FIG. 12 to FIG. 21 are each a schematic diagram showing the production process of the VCSEL device 100. As shown in FIG. 12, the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222 are flattened at an atomic level. This flattening can be performed by CMP (chemical mechanical polishing).

[0103] At this time, in order to achieve a high yield as the VCSEL device 100, it is necessary for the active layer 105 to have an “antinode” of optical resonance, and the thickness variation of the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222 needs to be approximately 50 nm or less. For this reason, it is better to precisely control the flattening while measuring the entire thickness of the first substrate 220 and the second substrate 220.

[0104] Subsequently, the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222 are irradiated with plasma. By the plasma irradiation, dangling bonds are formed in the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222. Further, as shown in FIG. 13, the first substrate 210 and the second substrate 220 are caused to face each other so that the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222 are adjacent to each other, and thus, the first substrate 210 and the second substrate 220 are brought into contact with each other as shown in FIG. 14.

[0105] As a result, as shown in FIG. 15, the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222 are boded to each other (normal-temperature plasma bonding) to form the dielectric to-be-bonded layer 103. In this way, a bonded body 230 of the first substrate 210 and the second substrate 220 is formed.

[0106] Subsequently, the bonded body 230 is annealed to strengthen the bonding between the first dielectric to-be-bonded layer 211 and the second dielectric to-be-bonded layer 222. Specifically, by this annealing, the dangling bonds formed by the above-mentioned plasma irradiation form bonding.

[0107] Subsequently, the semiconductor substrate 221 is thinned and removed, leaving the second contact layer 108 as shown in FIG. 16. Further, as shown in FIG. 17, a part of each of the second contact layer 108, the semiconductor DBR layer 107, the blocking layer 106, the active layer 105, and the first contact layer 104 is removed to form a mesa post shape.

[0108] Subsequently, as shown in FIG. 18, oxidation treatment is performed on a part of the blocking layer 106 to form the oxidized area 106a and the non-oxidized area 106b.

[0109] Subsequently, as shown in FIG. 19, the electrode 109 is formed on each of the first contact layer 104 and the second contact layer 108. Further, the insulation layer 110, the pad 111, and the wiring 112 are formed (see FIG. 3).

[0110] The VCSEL device 100 can be produced in this way. Note that although the second contact layer 108 is formed on the semiconductor substrate 221 in the above description, the second contact layer 108 may be formed after bonding.

[0111] In this case, as shown in FIG. 20, the one obtained by directly stacking the semiconductor DBR layer 107 on the semiconductor substrate 221 is used as the second substrate 220, and the semiconductor substrate 221 is thinned as shown in FIG. 21. Further, the thinned semiconductor substrate 221 can be doped with impurities to obtain the second contact layer 108 shown in FIG. 16.

[0112] [Regarding Effect by VCSEL Device]

[0113] The VCSEL device 100 has the configuration described above. As described above, the VCSEL device 100 is formed by bonding the first substrate 210 and the second substrate 220 via the dielectric to-be-bonded layer 103. The dielectric to-be-bonded layer 103 is formed of a dielectric material having high thermal conductivity such as SiO.sub.2, and capable of increasing the conductivity/heat-dissipation of the VCSEL device 100.

[0114] Further, by using the above-mentioned materials as the materials (the first material and the second material) of the dielectric DBR layer 102, it is possible to reduce the thermal resistance of the dielectric DBR layer 102 and improve the conductivity/heat-dissipation of the VCSEL device 100.

[0115] The VCSEL device 100 can be used as a light-emitting device of a distance sensor used for face recognition or the like in various electronic apparatuses such as a smartphone.

[0116] [Regarding VCSEL Integrated Body]

[0117] The VCSEL device 100 can be used as an integrated body. FIG. 22 is a cross-sectional view of a VCSEL integrated body 300 that is an integrated body of VCSEL devices.

[0118] As shown in the figure, the VCSEL integrated body 300 includes a plurality of VCSEL devices 310. Each of the VCSEL devices 310 includes the same layer structure as that of the VCSEL device 100, and the support substrate 101, the dielectric DBR layer 102, and the dielectric to-be-bonded layer 103 are common to the plurality of VCSEL devices 310.

[0119] The number and arrangement of the VCSEL devices 310 are not particularly limited, and the VCSEL devices 310 may be arranged in a one-dimensional array or a two-dimensional array. By integrating the VCSEL devices 310, it is possible to form high-power laser.

[0120] [Regarding Method of Producing VCSEL Integrated Body]

[0121] The method of producing the VCSEL integrated body 300 will be described. The VCSEL integrated body 300 can be produced by a production process similar to that of the VCSEL device 100. That is, the first substrate 210 and the second substrate 220 are bonded to each other (see FIG. 10 to FIG. 15), the semiconductor substrate 221 is thinned (see FIG. 16), and then, a mesa post shape is formed (see FIG. 17).

[0122] At this time, by forming a plurality of mesa posts separated from each other and forming the oxidized area 106a and the non-oxidized area 106b (see FIG. 18), the respective mesa posts are obtained as the VCSEL devices 310. It is possible to produce the VCSEL integrated body 300 including a plurality of VCSEL devices 310 from the bonded body 230 in which one first substrate 210 and one second substrate 220 are bonded to each other.

[0123] FIG. 23 to FIG. 25 are each a schematic diagram showing the method of forming a wiring and an embedding film of the VCSEL integrated body 300. As shown in FIG. 23, an embedding film 321 is formed on the VCSEL integrated body 300. The embedding film 321 can be, for example, SiO.sub.2, and can be deposited by CVD or the like.

[0124] Further, the embedding film 321 may be formed of inorganic water glass by SOG (Spin on Glass) or the like, or may be formed by spin-coating an organic polymer such as BCB (benzene cyclobutene) and polyimide. The thickness of the embedding film 321 is favorably approximately 1.5 times the height of the VCSEL devices 310 (height from the dielectric to-be-bonded layer 103 to the second contact layer 108).

[0125] Subsequently, as shown in FIG. 24, the embedding film 321 is flattened. The flattening can be performed by, for example, CMP. Subsequently, contact holes are formed in the embedding film 321, and electrodes 322 and wirings 323 are formed as shown in FIG. 25. In this way, the wiring and the embedding film can be formed in the VCSEL integrated body 300.

[0126] Since the embedding film 321 flattens the surface of the VCSEL integrated body 300 and makes it easy to form the wirings 323, it is possible to improve the wiring yield.

[0127] [Regarding Optoelectronic Integrated Circuit]

[0128] By providing a diffraction grating on the dielectric DBR layer 102, an optoelectronic integrated circuit can be configured by the VCSEL device 100. In this case, after forming the dielectric DBR layer 102 in the first substrate 210 (see FIG. 10), it only needs to form a diffraction grating on the dielectric DBR layer 102 and provide the first dielectric to-be-bonded layer 211 thereon. The laser generated in the VCSEL device 100 is guided into the optical integrated circuit by this diffraction grating.

[0129] It should be noted that the present technology may take the following configurations.

[0130] (1)

[0131] A method of producing a vertical cavity surface emitting laser, including:

[0132] creating a first substrate by sequentially stacking a dielectric DBR (Distributed Bragg Reflector) layer and a first dielectric to-be-bonded layer on a support substrate;

[0133] creating a second substrate by sequentially stacking a semiconductor DBR layer, a current blocking layer, an active layer, a contact layer, and a second dielectric to-be-bonded layer on a semiconductor substrate;

[0134] bonding the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer to each other; and

[0135] annealing a bonded body of the first substrate and the second substrate.

[0136] (2)

[0137] The method of producing a vertical cavity surface emitting laser according to (1) above, in which

[0138] the step of bonding the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer to each other includes performing plasma bonding in which the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer are irradiated with plasma and then the first dielectric to-be-bonded layer and the second dielectric to-be-bonded layer are bonded to each other.

[0139] (3)

[0140] The method of producing a vertical cavity surface emitting laser according to (1) or (2) above, in which

[0141] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more.

[0142] (4)

[0143] The method of producing a vertical cavity surface emitting laser according to (1) or (2) above, in which

[0144] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, a refractive index of at least one of the first layer or the second layer being 2 or more.

[0145] (5)

[0146] The method of producing a vertical cavity surface emitting laser according to (1) or (2) above, in which

[0147] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more, a refractive index of at least one of the first layer or the second layer being 2 or more.

[0148] (6)

[0149] The method of producing a vertical cavity surface emitting laser according to any one of (1) to (5) above, in which

[0150] the first dielectric to-be-bonded layer is formed of any of SiO.sub.2, SiON, SiN, and Al.sub.2O.sub.3, and

[0151] the second dielectric to-be-bonded layer is formed of the same material as that of the first dielectric to-be-bonded layer.

[0152] (7)

[0153] The method of producing a vertical cavity surface emitting laser according to any one of (1) to (6) above, in which

[0154] the first material is SiO.sub.2, and

[0155] the second material is Si.sub.3N.sub.4.

[0156] (8)

[0157] The method of producing a vertical cavity surface emitting laser according to any one of (1) to (6) above, in which

[0158] the first material is Si.sub.3N.sub.4, and

[0159] the second material is TiO.sub.2.

[0160] (9)

[0161] The method of producing a vertical cavity surface emitting laser according to any one of (1) to (6) above, in which

[0162] the first material is SiO.sub.2, and

[0163] the second material is Ta.sub.2O.sub.5.

[0164] (10)

[0165] The method of producing a vertical cavity surface emitting laser according to any one of (1) to (6) above, in which

[0166] the first material is SiO.sub.2, and

[0167] the second material is TiO.sub.2.

[0168] (11)

[0169] A vertical cavity surface emitting laser, including

[0170] an integrated body including [0171] a support substrate, [0172] a dielectric DBR layer on the support substrate, [0173] a dielectric to-be-bonded layer on the dielectric DBR layer, [0174] a first contact layer on the dielectric to-be-bonded layer, [0175] an active layer on the first contact layer, [0176] a blocking layer on the active layer, [0177] a semiconductor DBR layer on the blocking layer, and [0178] a second contact layer on the semiconductor DBR layer.

[0179] (12)

[0180] The vertical cavity surface emitting laser according to (11) above, in which

[0181] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more.

[0182] (13)

[0183] The vertical cavity surface emitting laser according to (11) above, in which

[0184] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, a refractive index of at least one of the first layer or the second layer being 2 or more.

[0185] (14)

[0186] The vertical cavity surface emitting laser according to (11) above, in which

[0187] the dielectric DBR layer is configured by alternately stacking a first layer and a second layer, the first layer being formed of a first material, the second layer being formed of a second material, thermal conductivity of at least one of the first layer or the second layer being 10 W/mK or more, a refractive index of at least one of the first layer or the second layer being 2 or more.

[0188] (15)

[0189] A distance sensor, including

[0190] a vertical cavity surface emitting laser that includes an integrated body including

[0191] a support substrate,

[0192] a dielectric DBR layer on the support substrate,

[0193] a dielectric to-be-bonded layer on the dielectric DBR layer,

[0194] a first contact layer on the dielectric to-be-bonded layer,

[0195] an active layer on the first contact layer,

[0196] a blocking layer on the active layer,

[0197] a semiconductor DBR layer on the blocking layer, and

[0198] a second contact layer on the semiconductor DBR layer.

[0199] (16)

[0200] An electronic apparatus, including

[0201] a vertical cavity surface emitting laser that includes an integrated body including

[0202] a support substrate,

[0203] a dielectric DBR layer on the support substrate,

[0204] a dielectric to-be-bonded layer on the dielectric DBR layer,

[0205] a first contact layer on the dielectric to-be-bonded layer,

[0206] an active layer on the first contact layer,

[0207] a blocking layer on the active layer,

[0208] a semiconductor DBR layer on the blocking layer, and

[0209] a second contact layer on the semiconductor DBR layer.

REFERENCE SIGNS LIST

[0210] 100 VCSEL device [0211] 101 support substrate [0212] 102 dielectric DBR layer [0213] 102a first layer [0214] 102b second layer [0215] 103 dielectric to-be-bonded layer [0216] 104 first contact layer [0217] 105 active layer [0218] 106 blocking layer [0219] 106a oxidized area [0220] 106b non-oxidized area [0221] 107 semiconductor DBR layer [0222] 108 second contact layer [0223] 210 first substrate [0224] 211 first dielectric to-be-bonded layer [0225] 220 second substrate [0226] 221 semiconductor substrate [0227] 222 second dielectric to-be-bonded layer [0228] 230 bonded body [0229] 300 VCSEL integrated body [0230] 310 VCSEL device