Circuit arrangement for generating a supply voltage with controllable ground potential level

Abstract

A circuit arrangement for generating a supply voltage with a controllable ground potential level includes a voltage source that provides the supply voltage ungrounded, a control unit that generates an adjustable control d.c. voltage to ground, and an operational amplifier that is connected via its voltage supply terminals to the supply voltage source, where the control d.c. voltage is applied to the inverting input of the operational amplifier, the non-inverting input of the operational amplifier is connected via a resistor network to the voltage source and to a ground terminal and the output of the operational amplifier is fed back to the inverting input via a capacitor.

Claims

1. A circuit arrangement for generating a supply voltage with a controllable ground potential level, the circuit arrangement comprising: a voltage source which provides the supply voltage ungrounded as a difference between two supply voltage potentials; a control unit which generates an adjustable control d.c. voltage to ground; and an operational amplifier having voltage supply terminals connected to the supply voltage potentials of the voltage source, the adjustable control d.c. voltage being applied to an inverting input of the operational amplifier, a non-inverting inverting input of the operational amplifier being connected via a resistor network to the supply voltage potentials of the voltage source and to a ground terminal and an output of the operational amplifier being fed back to the inverting input via a capacitor.

2. The circuit arrangement as claimed in claim 1, wherein the control unit is configured to generate the adjustable control d.c. voltage as an average value of at least two individually activatable and deactivatable fixed voltages.

3. The circuit arrangement as claimed in claim 1, further comprising: a resistor connected in series with the capacitor between the output of the operational amplifier and the inverting input of the operational amplifier.

4. The circuit arrangement as claimed in claim 1, further comprising: a resistor connected in series with the capacitor between the output of the operational amplifier and the inverting input of the operational amplifier.

5. The circuit arrangement as claimed in claim 1, wherein the supply terminals of the operational amplifier are connected to the supply voltage potentials of the voltage source via Zener diodes.

6. The circuit arrangement as claimed in claim 1, wherein the voltage source is configured as a d.c. to d.c. converter with electrical isolation of input and output sides.

7. The circuit arrangement as claimed in claim 1, further comprising: a differential amplifier having voltage supply terminals, the differential amplifier being connected via the voltage supply terminals to the supply voltage potentials of the voltage source and being further connected to the ground terminal.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) To further explain the invention, reference is made below to the single FIG. in the drawing, in which:

(2) The FIG. shows an exemplary simplified schematic representation of an embodiment the inventive circuit arrangement.

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

(3) The FIG. shows a voltage source 1, for example, in the form of a d.c. voltage converter with electrical isolation of input and output side, which generates an output voltage from an input voltage U1 and makes this available as a supply voltage ΔU electrically isolated from the ground M. The supply voltage potentials U.sub.P and U.sub.N (ΔU=U.sub.P−U.sub.N) are therefore initially undefined.

(4) Therefore, a controllable adjustment of the ground potential level of the supply voltage (ΔU) or of the supply voltage potentials U.sub.P and U.sub.N against ground M should occur as a function of a control d.c. voltage U.sub.S (to ground M). The control d.c. voltage U.sub.S can be generated in a variety of ways by a control unit 2 at its control output 3. In the illustrated example, the control d.c. voltage U.sub.S is generated as an average value of two individually activatable and deactivatable, here identical, fixed voltages, in that a logic voltage U2, e.g., a TTL or LVTTL supply voltage, is connected to the control output 3 with the help of two AND gates 4, 5 as a function of two logic control signals S1, S2 and via resistors R4 and R5. The control signals S1, S2 are generated by a computer apparatus 6, e.g. a CPU, such that where R4=R5 three different values of the control d.c. voltage U.sub.S can be generated:

(5) TABLE-US-00001 TABLE 1 S1 S2 U.sub.S 0 0 0 1 0 ½ U2 1 1 U2

(6) In a particularly easy to implement alternative, the logic levels U2 and 0 V can, for example, be output directly to the resistors R4 and R5 via a slide register.

(7) The control d.c. voltage U.sub.S lies directly at the inverting input (−) of an operational amplifier 7, which by its voltage supply terminals 8, 9 is connected either directly or, as shown here, to reduce the power loss at the operational amplifier 7, via Zener diodes Z1, Z2 to the voltage source 1, such that the supply voltage potential U.sub.P reduced by the Zener voltage U.sub.Z1 is applied to the voltage supply terminal 8 and the supply voltage potential U.sub.N reduced by the Zener voltage U.sub.Z2 is applied to the voltage supply terminal 9.

(8) The non-inverting input (+) of the operational amplifier 7 is connected via a resistor network R1, R2, R3 to the voltage source 1 and to ground M. In the simplest case shown here, the non-inverting input (+) is connected via the resistor R1 to the supply voltage potential U.sub.P, via the resistor R2 to the supply voltage potential U.sub.N and via the resistor R3 to ground M. The output 10 of the operational amplifier 7 is fed back via a capacitor C1 and optionally a resistor R7 with (if necessary) a parallel capacitor C2 to the inverting input (−). The operational amplifier 7 thus operates as an I controller or PI controller without a permanent control deviation; i.e., no direct current affecting the control d.c. voltage U.sub.S flows from the output 10 of the operational amplifier 7 through the resistors R4 and R5. Finally, the output 10 of the operational amplifier 7 can be connected to ground, e.g. in a low-resistance manner, via a resistor R6.

(9) The following applies for the voltage U.sub.IN+ between the non-inverting input (+) of the operational amplifier 7 and ground M:

(10) $U_{\mathrm{IN}+}=U_P.Math.\frac{R2.Math..Math.R3}{R1+R2.Math..Math.R3}+U_N.Math.\frac{R1.Math..Math.R3}{R2+R1.Math..Math.R3}=U_P.Math.\frac{R2.Math.R3}{R1.Math.R2+R1.Math.R3+R2.Math.R3}+U_N.Math.\frac{R1.Math.R3}{R1.Math.R2+R1.Math.R3+R2.Math.R3}.$

(11) U.sub.P and U.sub.N are the supply voltage potentials to be adjusted to ground M. Furthermore, because of the I or PI feedback from the operational amplifier 7 the following applies for the voltage U.sub.IN− between the inverting input (+) of the operational amplifier 7 and ground M: U.sub.IN−=U.sub.IN+=U.sub.S. Using ΔU=U.sub.P−U.sub.N, the following is therefore obtained:

(12) $U_P=U_S.Math.\left(1+\frac{R1.Math.R2}{R1.Math.R3+R2.Math.R3}\right)+\Delta U.Math.\frac{R1}{R1+R2}\mathrm{and}$$U_N=U_S.Math.\left(1+\frac{R1.Math.R2}{R1.Math.R3+R2.Math.R3}\right)-\Delta U.Math.\frac{R2}{R1+R2}.$

(13) By way of example, let ΔU=30 V and U2=3.3 V. Where R4=R5, R1=200 kΩ, R2=1 MΩ and R3=33 kΩ, the following supply voltage potentials U.sub.P and U.sub.N can be adjusted to ground M as a function of the control signals S1, S2:

(14) TABLE-US-00002 TABLE 2 S1 S2 U.sub.S U.sub.P U.sub.N 0 0 0 5 V −25 V 1 0 1.65 V 15 V −15 V 1 1 3.3 V 25 V −5 V

(15) In the example shown, the highest absolute value for U.sub.P and U.sub.N is 25 V in each case. As a result, the Zener diodes Z1, Z2 used to reduce the power loss at the operational amplifier 7 can typically have Zener voltages of 4.3 V. Unwanted deviations in the ground potential level caused, for example, by external interference, such as bursts, are restricted by the reduced output voltage range of the operational amplifier 7. The resistor R6 at the output 10 of the operational amplifier 7 can also contribute to this restriction.

(16) In the exemplary illustrated embodiment, a differential amplifier 11, e.g., an instrument amplifier, is connected by its voltage supply terminals 12, 13 to the voltage source 1 and is further connected to the ground terminal M. The common-mode range, theoretically ΔU, of the input voltage U.sub.E of the differential amplifier 11 can be shifted between +|ΔU| and −|ΔU| via the control d.c. voltage U.sub.S.

(17) Thus, while there have been shown, described and pointed out fundamental novel features of the invention as applied to a preferred embodiment thereof, it will be understood that various omissions and substitutions and changes in the form and details of the devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.