Transistor outline package with ground connection

Abstract

A transistor outline package is provided that includes a header having an upper surface, a lower surface, an inner surface, and a mounting area for an optoelectronic component in the inner surface. The header has a signal pin configured to connect an optoelectronic component. The signal pin is disposed in a feedthrough and protrudes from the lower surface. A printed circuit board attached on the signal pin substantially coaxially thereto. The printed circuit board is mechanically and electrically connected to the header by a metal block arranged adjacent to the feedthrough to provide grounding.

Claims

1. A transistor outline package, comprising a header having an upper surface, a lower surface, an inner surface, and a mounting area for an optoelectronic component in the inner surface; a signal pin configured to connect an optoelectronic component, wherein the signal pin is disposed in a feedthrough and protrudes from the lower surface; and a printed circuit board attached on the signal pin substantially coaxially thereto, wherein the printed circuit board is mechanically and electrically connected to the header by a metal block arranged adjacent to the feedthrough to provide grounding, and wherein the metal block is connected to an upper surface of the printed circuit board on the one side and to a lower surface of the header on the other side.

2. The transistor outline package of claim 1, wherein the metal block is a solid metal plate or is a bridge that extends over the signal pin.

3. The transistor outline package of claim 1, wherein the printed circuit board is a flexible printed circuit board.

4. The transistor outline package of claim 1, wherein the printed circuit board comprises a stiffener below the metal block.

5. The transistor outline package of claim 1, wherein the printed circuit board is a multi-layer board, the transistor outline package further comprising a ground conductor below a signal conductor trace and/or between signal conductor traces.

6. The transistor outline package of claim 1, wherein the signal pin comprises two signal pins disposed in a different feedthroughs.

7. The transistor outline package of claim 1, wherein the mounting area is on a submount that is electrically connected via the signal pin.

8. The transistor outline package of claim 7, wherein the submount sits on a pedestal of the header.

9. The transistor outline package of claim 1, wherein the signal pin is arranged adjacent to a submount, wherein the signal pin is disposed in the feedthrough eccentrically offset toward the submount.

10. The transistor outline package of claim 1, wherein the feedthrough is filled with an insulating material having a relative permittivity at 18° C. and 50 Hz of less than 6.0.

11. The transistor outline package of claim 10, further comprising a further insulating material arranged adjacent to the insulating material, the further insulating material having a relative permittivity at 18° C. and 50 Hz that is greater than that of the insulating material.

12. The transistor outline package of claim 1, wherein the printed circuit board is thickened adjacent to the lower surface.

13. The transistor outline package of claim 1, wherein the signal pin has an enlarged portion with a section arranged within the feedthrough.

14. The transistor outline package of claim 13, wherein the enlarged portion is flush with an upper surface adjacent to the feedthrough.

15. The transistor outline package of claim 13, wherein the signal pin is connected to a submount by an electrically conductive material.

16. The transistor outline package of claim 15, wherein the signal pin is connected to the submount at a lateral surface thereof.

17. The transistor outline package of claim 13, wherein the signal pin has a connection area for the optoelectronic component that is defined by a front face of the enlarged portion.

18. The transistor outline package of claim 13, wherein the feedthrough is filled with an insulating material comprising glass and/or glass ceramic, wherein the insulating material extends around the enlarged portion.

19. The transistor outline package of claim 1, further comprising a submount for the optoelectronic component, wherein the submount has a conductor trace that extends coaxially with the signal pin, and wherein the conductor trace is soldered to a front face of the signal pin.

20. The transistor outline package of claim 19, wherein the submount has a thinned area below the conductor trace, the thinned area comprising a ground conductor trace.

21. The transistor outline package of claim 19, wherein the submount extends over at least a section of an enlarged portion of the signal pin.

22. The transistor outline package of claim 1, wherein the feedthrough has a step below the upper surface.

23. The transistor outline package of claim 1, wherein the feedthrough has a covering comprising a dielectric material on at least one side thereof.

24. The transistor outline package of claim 1, wherein the signal pin is connected to the header so as to be decoupled from the grounding.

25. A transistor outline package, comprising a header having an upper surface, a lower surface, an inner surface, and a mounting area for an optoelectronic component in the inner surface; a signal pin configured to connect an optoelectronic component, wherein the signal pin is disposed in a feedthrough and protrudes from the lower surface; and a printed circuit board attached on the signal pin substantially coaxially thereto, wherein the printed circuit board is mechanically and electrically connected to the header by a metal block arranged adjacent to the feedthrough to provide grounding, and wherein the feedthrough is filled with an insulating material made of glass and/or glass ceramic, wherein the feedthrough has an area on at least one side that is not filled with the insulating material.

26. The transistor outline package of claim 25, wherein the signal pin has an enlarged portion in the area and/or where in the area is filled with a plastic material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The subject-matter of the invention will now be explained in more detail by way of exemplary embodiments and with reference to the drawings of FIGS. 1 through 30.

(2) FIGS. 1 to 4 are perspective views of an exemplary embodiment of a TO package according to the invention (without cap).

(3) FIG. 5 is a perspective view of the inner surface of the package without submount.

(4) FIG. 6 is a detail view, partially cut away, which illustrates details of the printed circuit board.

(5) FIG. 7 is a perspective view of the lower surface of the header.

(6) FIG. 8 is a sectional detail view through a feedthrough of the header.

(7) FIGS. 9 and 10 show graphs of return loss and insertion loss of the package illustrated in FIGS. 1 to 8 in comparison to a TO package known from the prior art.

(8) FIG. 11 is a sectional view of a feedthrough having an enlarged diameter on one side thereof.

(9) FIG. 12 is a sectional view of a feedthrough in which the signal pin has an enlarged portion on one side.

(10) FIG. 13 is a detailed view of the signal pin.

(11) FIG. 14 shows graphs of return loss of TO packages according to the invention using different types of glass.

(12) FIG. 15 shows graphs of return loss of TO packages according to the invention, in which the feedthrough is filled partly with glass, partly with a plastic material, using different types of glass and plastics.

(13) FIG. 16 is a sectional view of an exemplary embodiment of a header in the region of the feedthrough of the signal pin and of the submount for the optoelectronic component.

(14) FIG. 17 is a perspective view of a TO package with cap.

(15) FIG. 18 shows the TO package equipped with an optoelectronic component.

(16) FIG. 19 is a schematic sectional view of a further embodiment of a TO package, in which the signal pin has an enlarged portion which is flush with the upper surface of the header.

(17) FIG. 20 shows the package of FIG. 19 with the submount mounted thereto.

(18) FIG. 21 is a further schematic view of a TO package with a signal pin that has an enlarged portion which is flush with the upper surface.

(19) FIG. 22 is a perspective view of a TO package equipped with a submount and wherein the signal pins have an enlarged portion.

(20) FIG. 23 is a view of a detail of FIG. 22 showing the front end area of the submount.

(21) FIG. 24 is a perspective view only of the submount.

(22) FIG. 25 shows, by way of two graphs, the return loss of the TO package 1 shown in FIGS. 22 and 23 in comparison with a TO package 1 which does not include signal pins 7 that have an enlarged portion 19 and a submount 5 with a thinned area. The fact that the thinned area is provided with ground trace 16a to 16d is of great importance and makes the difference to prior art solutions.

(23) FIG. 26 is a schematic sectional view of a TO package in which the feedthrough has a covering of higher permittivity.

(24) FIG. 27 is a schematic sectional view of a TO package in which the feedthrough has a step.

(25) FIGS. 28 to 30 illustrate an embodiment of a TO package in which the signal pin has an enlarged portion that is only partially arranged in the feedthrough.

DETAILED DESCRIPTION

(26) FIG. 1 is a perspective view of a TO package 1 according to the invention.

(27) TO package 1 comprises a header 2. In the present exemplary embodiment, the header 2 has a circular cross-sectional shape. Preferably, the header 2 is made of metal, in particular of a metal that is provided with a coating, for example a gold coating.

(28) In this exemplary embodiment, the header 2 includes the two signal pins 7a, 7b which extend through the header 2 via feedthroughs 9.

(29) The header 2 has an upper surface 21 which, once a cap has been attached, defines an inner surface of the then hermetically sealed TO package 1.

(30) Signal pins 7a, 7b are connected to the conductor traces 6a, 6b by means of a solder 8.

(31) Conductor traces 6a, 6b serve to electrically connect an optoelectronic component, in particular a laser diode (not shown). So, this exemplary embodiment of the invention is provided for a laser diode having two signal conductor paths.

(32) Conductor traces 6a, 6b are provided on a submount 5 which in turn is mounted on a pedestal 4 that protrudes from the upper surface 21 of the header 2.

(33) Preferably, the pedestal 4 is formed integrally with the header. Header 2 and pedestal 4 may in particular be formed as a one-piece stamped part.

(34) In this exemplary embodiment, the pedestal 4 has a cross-sectional shape of a circular segment. However, it is also conceivable for the pedestal 4 to have a different design, for example with a rectangular cross-sectional shape.

(35) Submount 5 is aligned coaxially with the signal pins 7a, 7b, so that in the assembled state the lower surface of the laser diode is aligned perpendicular to the upper surface 21 of the header 2.

(36) Submount 5 is preferably made of a ceramic. For example an aluminum oxide ceramic may be used. Preferably, the submount 5 is made of an aluminum nitrite ceramic. The latter exhibits high thermal conductivity.

(37) In addition to the signal pins 7a, 7b, the TO package 1 comprises at least one further pin 10 in this exemplary embodiment. This pin can be used for connecting a monitor diode, for example. It will be appreciated that other embodiments of the invention may include further pins, for example for driving a thermoelectric cooler (not shown).

(38) FIG. 2 is another perspective view of the TO package 1.

(39) It can in particular be seen that the signal pins 7a, 7b and the pin 10 protrude perpendicularly from the upper surface of the header 2.

(40) The same is true for the pedestal 4 with submount 5.

(41) Signal pins 7a, 7b are combined coaxially to the conductor traces 6a, 6b. The conductor traces 6a and 6b on the submount 5 approach each other, so that an optoelectronic component can be placed directly on a conductor trace 6a and can be electrically connected to the other conductor trace 6b by a bonding wire.

(42) FIG. 3 is another perspective view of the TO package 1 illustrating the lower surface 14 of the TO package.

(43) Signal pins 7a, 7b can be seen protruding from the lower surface 14.

(44) Signal pins 7a, 7b are connected to a printed circuit board 12.

(45) Printed circuit board 12 is only partially shown in this view. The printed circuit board 12 may, for example, be implemented as a flexible printed circuit board and may be angled to be connected to an electronic module (not shown).

(46) Printed circuit board 12 is provided with a stiffener 11 on its lower surface. The stiffener 11 is preferably made of a dielectric material, for example of a plastic or ceramic material.

(47) What is achieved with the stiffener 11 is, for example, that even a flexible printed circuit board 12 will be stiff and stable adjacent to the lower surface 14 of the header 2.

(48) In order to establish a stable mechanical connection and a ground connection between the header 2 and the printed circuit board 12, a metal block 13 is provided and is connected, in particular soldered, to the printed circuit board 12 on the one side and to the lower surface 14 of the header 2 on the other side.

(49) Metal block 13 defines an angle which allows for a coaxial arrangement of the printed circuit board 12 relative to the signal pins 7a, 7b.

(50) In this exemplary embodiment, the metal block 13 is in the form of a bridge spanning each of the signal pins 7a, 7b with a respective arch 15a, 15b.

(51) Signal pins 7a, 7b preferably do not project beyond the metal block 13.

(52) In the region of the arches 15a, 15b, the metal block 13 may protrude into the range of the feedthrough (9 in FIG. 1 and FIG. 8).

(53) With the metal block 13, signal pins 7a, 7b are also shielded outside the feedthrough.

(54) Metal block 13 preferably has a plate-like shape.

(55) Metal block 13 provides for a ground connection both between the signal pins 7a, 7b and next to the signal pins 7a, 7b.

(56) Metal block 13 preferably has a thickness d of more than 0.1 mm, most preferably of more than 0.5 mm, and/or of less than 5 mm, most preferably of less than 2 mm.

(57) In width direction, the metal block 13 may extend over a large part of the diameter of the header 2, in particular over at least 20%, preferably over at least 50% of the diameter of the header 2.

(58) The height h of metal block 13 preferably corresponds to at least 1.5 times the diameter of the feedthrough.

(59) In addition to providing a stable mechanical connection of the printed circuit board 12, the metal block 13 also has the advantage that the bonding of the signal pins 7a, 7b to the printed circuit board 12 is decoupled from the establishing of the ground connection.

(60) So, for example, the signal pins 7a, 7b may be soldered first to the printed circuit board 12.

(61) Since there will be no other mechanical connection to the printed circuit board 12 existing at this point in time, shape and positional tolerances can be well compensated for.

(62) In the next step, the metal block 13 can be connected to the header 2 and/or to the printed circuit board 12 to establish a ground connection.

(63) Furthermore, it can be seen that a further pin 10 is provided on the side of the printed circuit board 12 opposite the signal pins 7a, 7b. The further pin 10 is also disposed in a feedthrough and is used for connecting a monitor diode in this embodiment.

(64) The further pin 10 is connected to the stiffener 11 which serves as a printed circuit board 1 at the same time.

(65) FIG. 4 is another perspective view of the lower surface 14 of the TO package.

(66) It can be seen that the signal pins 7a, 7b are embedded in an insulating material made of glass 18a, 18b.

(67) Signal pins 7a, 7b protrude from the lower surface 14 through the feedthroughs formed in this way.

(68) The signal pins 7a, 7b are coaxially connected to signal conductor traces 17a, 17b of the printed circuit board 12.

(69) Between signal conductor traces 17a, 17b on the printed circuit board 12, the ground conductor trace 16b is provided. Ground conductor traces 16a and 16c are arranged next to the signal conductor traces 17a, 17b on either side thereof. Thus, the signal conductor traces 17a, 17b are shielded from both sides.

(70) FIG. 5 is a view of the inner surface of the TO package, in which the pedestal and the submount have been omitted.

(71) It can be seen in this view that the signal pins 7a, 7b embedded in the insulating material made of glass 18a, 18b each have an enlarged portion 19a, 19b on the inner side. In the area of these collar-shaped enlarged portions 19a, 19b, there is a region without insulating glass material. The jump in impedance caused thereby is at least partially compensated for by the enlarged portions 19a, 19b.

(72) FIG. 6 is a cutaway perspective view in which it can be seen that the printed circuit board 12 is configured as a multi-layer printed circuit board.

(73) On the upper surface, the printed circuit board 12 comprises the signal conductor traces 17a, 17b illustrated in FIG. 4 and the ground conductor traces 16a to 16c.

(74) Ground conductor traces 16a to 16c are connected, through vias 20, to an underlying ground conductor trace 16d which also extends below the signal conductor traces 17a, 17b shown in FIG. 4, thus shielding them.

(75) The so configured multi-layer printed circuit board sits on the stiffener 11, and the ground conductor traces 16a to 16c are soldered to the metal block 13.

(76) So, the stiffener 11 is at the same time a thickened area which forms a multi-layer printed circuit board across which a via is provided extending from the lower surface to the printed circuit board 12.

(77) The multi-layer printed circuit board defined by the thickened area or stiffener 11 is in the form of a rigid printed circuit board, whereas the printed circuit board 12 is preferably in the form of a single-layer flexible printed circuit board.

(78) Thus, the further pin (10 in FIG. 3) can be connected on the lower surface of the stiffener 11, for connecting a monitor diode, for example.

(79) FIG. 7 is another perspective view of the lower surface of the TO package.

(80) In this view, the metal block has been omitted. It can be clearly seen that the signal pins 7a, 7b protruding from the lower surface 14 are connected to the signal conductor traces 17a, 17b of the printed circuit board 12 by means of a solder 8.

(81) FIG. 8 is a sectional view of a detail in the region of a feedthrough 9.

(82) A signal pin 7 is disposed in the feedthrough 9 within an insulating material 18 made of glass.

(83) For this purpose, the header 2 has a through-hole 23.

(84) However, the feedthrough 9 or the through-hole 23 is only partially filled with the glass and/or glass ceramic insulating material 18, so that both adjacent to the lower surface 14 and adjacent to the upper surface 21 there is an area 22 free of the insulating material 18, which surrounds the signal pin 7 and which is not filled with the glass and/or glass ceramic insulating material 18.

(85) On the inner side, a cavity 25 is existing in this non-filled area 22. Within the range of the cavity 25, an enlarged portion 19 of the signal pin 7 is provided.

(86) Due to the enlarged portion 19 of the signal pin 7, the impedance jump caused by the changed permittivity is reduced.

(87) On the outer side, the non-filled area 22 is filled with a plastic potting compound 24.

(88) The plastic potting compound 24 preferably has a permittivity that is matched to the permittivity of the glass insulating material 18 that is used.

(89) In particular, the plastic has a permittivity ε.sub.r of 4.0+/−2.5, more preferably +/−1.5.

(90) A glass and/or glass ceramic that is preferably used as the glass or glass ceramic insulation material 18 has a permittivity ε.sub.r (at 18° C. and 50 Hz) of less than 6.0, preferably less than 5.0.

(91) In particular a porous glass may be used, in particular a glass exhibiting a closed porosity of more than 30%, and/or a glass ceramic with these properties.

(92) Except for the range of the enlarged portion 19, the signal pin 7 preferably has a diameter from 0.1 to 0.5 mm, more preferably from 0.2 to 0.3 mm.

(93) The feedthrough 9 is filled with the glass and/or glass ceramic insulating material 18 preferably in 50 to 90%, more preferably in 60 to 80% of its volume.

(94) The enlarged portion 19 preferably has a diameter that is at least 1.2 times, in particular 1.5 to 2.5 times that of the adjacent portion of the signal pin 7.

(95) In the present embodiment, the enlarged portion 19 has a length from 0.02 to 0.2 mm, preferably from 0.05 to 0.1 mm.

(96) The length of the feedthrough 9 may in particular amount to 0.5 to 2 mm, preferably 0.8 to 1.5 mm.

(97) FIG. 9 compares the return loss of a TO package known from the prior art (thin curve) with the return loss of a TO package according to the invention (thick curve). In particular, it can be seen that a return loss of about −10 dB has shifted from a frequency of about 30 GHz to about 50 GHz. So, the return loss is significantly improved.

(98) The same applies to the insertion loss, which is plotted for comparison in FIG. 10. An insertion loss of 2 dB is reached at just below 60 GHz instead of just over 30 GHz.

(99) Thus, the invention enables to provide an approximately 25 GHz higher bandwidth.

(100) Referring to FIGS. 11 to 13, further measures for adjusting the impedance profile of the feedthrough 9 will be explained in greater detail.

(101) FIG. 11 is a schematic sectional view of another exemplary embodiment of a feedthrough 9 introduced into the header 12.

(102) In this exemplary embodiment, a signal pin 7 is again embedded in an insulating material 18 made of glass and/or glass ceramic. On at least one side, the feedthrough 9 includes an area 26 of enlarged diameter.

(103) The area 26 of enlarged diameter is partially filled with the glass and/or glass ceramic insulating material 18.

(104) The area 26 of enlarged diameter provides a reservoir which can accommodate variations in volume of the insulating glass material 18.

(105) Due to the enlarged diameter of area 26, the filling level will change only slightly in this case.

(106) The insulating material 18 provided in area 26 forms a disk along which the impedance changes abruptly, which in turn reduces the impedance jump caused by the cavity thereabove.

(107) The area of increased diameter preferably has a diameter that is at least 1.2 times that of the feedthrough 9 adjacent thereto, and has a length from 0.05 to 0.5 mm, preferably from 0.1 to 0.3 mm.

(108) FIG. 12 shows another way of how impedance matching can be achieved, namely by providing the signal pin 7 with an enlarged portion 19 in the area 22 that is not filled with insulating material 18.

(109) FIG. 13 is a detailed view of the signal pin 7.

(110) In the not enlarged portion, the signal pin 7 has a diameter d.sub.i of preferably between 0.1 and 0.5 mm, most preferably between 0.2 and 0.3 mm.

(111) In the present embodiment, the enlarged portion 19 has a stepped shape, i.e. it defines a circular cylindrical portion.

(112) However, the enlarged portion 19 may also have a different shape, in particular it may have a chamfer at the front and/or rear end. In this way, the enlarged portion 19 would merge into the largest diameter d.sub.o not abruptly but gradually. This implies a gradually changing impedance profile.

(113) The enlarged portion 19 has a diameter d.sub.o which preferably corresponds to at least 1.2 times the diameter d.sub.i, more preferably 1.5 to 2.5 times the diameter d.sub.i.

(114) The enlarged portion 19 preferably has a length l.sub.e from 0.02 to 0.2 mm, more preferably from 0.05 to 0.1 mm.

(115) The length of the adjoining projection l.sub.p is preferably from 0.2 to 0.5 mm.

(116) The graph of FIG. 14 shows the return loss of an exemplary embodiment of the invention in which a feedthrough was filled with a respective glass insulating material of different permittivity.

(117) It can be seen that the return loss improves the lower the permittivity of the glass insulating material is.

(118) FIG. 15 shows the return loss of a TO package according to the invention when different glasses are used as the insulation material and when different fillings are used for the area of the feedthrough without glass.

(119) It can be seen that the return loss without filling (ε.sub.r filling=1 and ε.sub.r glass=6.5) is the worst.

(120) Optimum return loss can be achieved by using a glass of low permittivity and at the same time using a filling having a permittivity that is matched to the permittivity of the glass.

(121) Referring to FIG. 16, it will be explained with reference to a schematic sectional view how a signal pin 7 can be introduced eccentrically into the feedthrough 9, for the purpose of impedance matching and/or for use of a thinner submount 5.

(122) In this exemplary embodiment, a signal pin 7 is provided embedded in an insulating material 18 made of glass or glass ceramic, and the signal pin is connected to the submount 5 placed on pedestal 4 by means of a solder 8.

(123) Feedthrough 9 is only partially filled with the glass insulating material 18.

(124) Adjoining the glass insulating material 18, a recessed area is filled with a plastic potting compound 24.

(125) It can be seen that the signal pin 7 is disposed in the feedthrough 9 in eccentric manner so as to be offset toward the submount 5.

(126) The submount 5 preferably has a thickness from 0.05 to 2 mm, more preferably from 0.1 to 0.2 mm. The submount is preferably made of a ceramic, in particular of aluminum oxide or aluminum nitrite.

(127) The central axis of the signal pin is preferably offset from the central axis of the feedthrough 9 by 0.01 to 0.15 mm, most preferably by 0.02 to 0.08 mm.

(128) Submount 5 protrudes into the range of feedthrough 9, but is spaced from the signal pin 7 to allow solder 8 to flow in.

(129) The spacing between signal pin 7 and submount 5 is preferably between 0.05 and 0.3 mm, more preferably between 0.1 and 0.2 mm.

(130) FIG. 17 shows a perspective view of a kit for forming a TO package 1. In the exemplary embodiment of FIGS. 19 and 20, the glass sealing hole is partially filled with glass (not shown).

(131) TO package 1 consists of header 2 and cap 3 in which a window 27 is provided. Window 27 is in particular in the form of a lens.

(132) The header 2 may be equipped with at least one optoelectronic module, for example a laser diode or a monitor diode. Subsequently, the cap 3 is applied to the header, e.g. soldered or welded thereto.

(133) Metal block 13 and printed circuit board 12 provided with the stiffener 11 may be attached after the cap 3 has been applied by soldering.

(134) As described above, it is advantageous here that the connecting of signal pins 7 is decoupled from the establishing of a ground connection.

(135) FIG. 18 is a schematic view showing how the TO package 1 is equipped with a laser diode 28.

(136) On submount 5, a mounting area 30 is provided.

(137) In the present exemplary embodiment, the laser diode 28 is placed on the conductor trace 6a provided on the submount 5 and is thus connected to signal pin 7a.

(138) In order to be electrically connected to signal pin 7b, a bonding wire 29 is provided connecting the laser diode 28 to the conductor trace 6b.

(139) Since conductor traces 6a and 6b directly face each other, the length of the bonding wire 29 can be kept short, in particular at less than 0.5 mm.

(140) FIG. 19 is a sectional view of a TO package 1 according to another aspect of the invention.

(141) In this embodiment, as in the embodiments described above, the header 2 includes a pedestal 4 which serves to mount the submount.

(142) On the side of the printed circuit board, not shown here, the TO package 1 may comprise a metal block (13 in FIG. 3). However, the invention also relates to a TO package 1 which does not comprise the metal block 13 described above.

(143) According to the embodiment shown in FIG. 19, the signal pin 7 embedded in the insulating material 18 of feedthrough 9 is provided with an enlarged portion 19 on the front end thereof.

(144) The enlarged portion 19 is approximately flush with the upper surface 31 of the header 2. This is understood to mean that the front face of the enlarged portion 19 is approximately at the same level with the adjacent upper surface 31.

(145) FIG. 20 is a schematic sectional view of the TO package 1 shown in FIG. 19, in which the TO package 1 is equipped with a submount 5. The submount 5 is aligned coaxially with the signal pin 7.

(146) Furthermore, the submount 5 protrudes into the range of the enlarged portion 19.

(147) This makes it possible to connect the signal pin 7 not to the lateral side of submount 5 but rather to use the front face of the enlarged portion 19 as a connection area for the conductor trace (not shown) of the submount 5.

(148) In order to provide an electrical connection, solder 8 is introduced in the form of a solder fillet, that is to say the solder connection is established along a corner defined by the conductor trace 6a, 6b of the submount 5 and the front face of enlarged portion 19.

(149) The alignment between the enlarged portion 19 and the upper surface 31 of header 2 allows to minimize the gap width between the connection areas.

(150) Compared to a signal pin 7 without enlarged portion 19, a smaller amount of solder 8 is required, so that it was possible to reduce the variance of the resistance of the solder joint in the high frequency range.

(151) FIG. 21 is another sectional view of an embodiment of the invention.

(152) Feedthrough 9 is essentially designed as in the embodiment illustrated in FIG. 12.

(153) In contrast to the embodiment shown in FIGS. 19 and 20, the signal pin 7 has the extension 32 projecting beyond the enlarged portion 19.

(154) The enlarged portion 19 is substantially flush with the upper surface 31 of the adjacent header 2.

(155) The submount 5 mounted on pedestal 4 protrudes over a section of the enlarged portion 19. As described above, this allows to reduce the gap width of the electrical connection.

(156) In contrast to the exemplary embodiment shown in FIGS. 19 and 20, however, submount 5 is connected laterally to the projection 32 of signal pin 7. Thus, the projection 32 defines a solder lug that allows to laterally connect the submount 5 to the projection 32 using a solder 8.

(157) The signal pin 7 illustrated with reference to FIGS. 19 to 21 is preferably dimensioned in accordance with the view of FIG. 13, except for the fact that the projection 32 is not provided in the embodiment according to FIGS. 19 and 20.

(158) The submount 5 which is shown schematically in this view, preferably has a step 35 at a front end thereof, as shown in FIGS. 22 to 24 below.

(159) FIG. 22 is a perspective wireframe graphic of an embodiment of a TO package 1 according to the invention.

(160) The signal pins 7a, 7b are formed in accordance with the embodiment illustrated in FIGS. 19 and 20 so as to have an enlarged portion 19 which is flush with the upper surface 31 of header 2.

(161) The conductor traces 6a, 6b of submount 5, which extend coaxially with the signal pins 7a, 7b are arranged on the signal pins 7a, 7b, and the resulting corner is soldered using a solder 8 that forms a solder fillet.

(162) As can be seen in the detailed view according to FIG. 23, the submount 5 has a thinned area 33 at its front end on the side opposite the electrical connection to signal pins 7a, 7b.

(163) So, the submount 5 is thinner at its front end, at least in the region of the connections.

(164) In this way, the ground conductor trace 16a to 16d on the lower surface of the submount 5 opposite signal traces 17a, 17b comes closer toward conductor traces 6a, 6b which are used as signal conductor traces, which enables to reduce the impedance in the high-frequency range.

(165) The thinned area 33 may be produced by laser milling, for example.

(166) Since the thinned area 33 is only provided on the front end and preferably extends into the submount 5 to a maximum depth not exceeding the thickness of the submount 5, the mechanical stability of the submount 5 is not significantly affected.

(167) Furthermore, it can be seen in the detail view that the width of the solder 8 corresponds approximately to the diameter of the enlarged portions 19.

(168) FIG. 24 is a perspective view of only the submount 5.

(169) The thinned area 33 on the front end of the submount 5 can be clearly seen. Through a step, it merges into the adjoining rest of the submount 5 which is thicker. Submount 5 is coated with a ground conductor trace on its lower surface, including in the thinned area 33. This ground conductor trace may in particular be formed as a deposited metal coating on the lower surface.

(170) The illustrated submount 5 with thinned area 33 can be used for all embodiments of the invention, in particular also for the variant illustrated in FIG. 21, in which the signal pin 7 has a projection 32 for being connected laterally.

(171) FIG. 25 is a graph showing the return loss of an exemplary embodiment of a TO package (lower, thin curve) which comprises a submount 5 with a thinned area at the front end according to the embodiment of FIGS. 22 and 23, and which includes signal pins 7 having an enlarged portion 19 and a front face that is used to connect the submount 5.

(172) This is compared to the upper, thick curve of return loss of a TO package which does not have these two features, that means which has signal pins without enlarged portion, to which the submount is connected laterally, and in which the submount does not have a thinned area. Otherwise, however, this TO package is configured similarly.

(173) As can be seen, it was possible to significantly improved the return loss, in particular in the frequency range between 10 and 50 GHz. In this frequency range, a shift in the return loss of about −10 dB on average could be achieved.

(174) FIG. 26 is a schematic sectional view of a further exemplary embodiment of a TO package 1 in which the feedthrough 9 includes two regions of different permittivity.

(175) On the inner side, a covering 34 preferably made of ceramic or glass ceramic is inserted in the feedthrough 9 adjacent to the upper surface 31.

(176) The covering 34 is in the form of a perforated disk through which the signal pin 7 extends and which retains the glass or glass ceramic insulating material 18.

(177) At the same time, the covering 34 has a higher permittivity ε.sub.r than the adjoining insulating material 18.

(178) In this way, a local area of increased capacity is created.

(179) In this embodiment of the invention it is conceivable to have the submount (not shown) connected to the front end of the signal pin 7 which terminates in the same plane with the upper surface 31 of the header 2 in this view.

(180) According to another embodiment (not shown) it is also possible for the signal pin 7 to protrude into the TO package 1 and to be connected laterally to the submount.

(181) FIG. 27 is a schematic sectional view of another embodiment of a TO package 1 in which the feedthrough 9 has a step 35 that is provided below the upper surface 31.

(182) Due to the step 35, the feedthrough 9 has a smaller diameter in an upper area adjacent to the upper surface 31.

(183) On the one hand, the capacity of the feedthrough 9 can be locally increased in this way, in order to adjust the impedance profile of the signal path. At the same time, the locally reduced hole diameter of the feedthrough can contribute to a better accuracy of the filling level of the feedthrough 9 with insulating material 18.

(184) FIGS. 28 to 30 show a further embodiment of a TO package 1 in which the enlarged portion 19 of the signal pin 7 is only partially arranged in the feedthrough 9.

(185) FIG. 28 is a plan view of the TO package 1. The header 2 of the TO package 1 comprises a pedestal 4 on which the submount 5 is disposed.

(186) FIG. 29 is a side view. This view in particular shows the conductor traces 6a, 6b of the submount 5, through which an optoelectronic component (not shown) can be electrically connected.

(187) FIG. 30 is a sectional view taken along line A-A of FIG. 29.

(188) Signal pin 7 terminates in an enlarged portion 19. Submount 5 is connected to the front face of the enlarged portion 19. In order to provide a mechanically stable connection featuring a low variance in impedance, a solder fillet 8 is provided for connecting the submount 5 to the signal pin 7, which provides two-dimensional contacting.

(189) In this embodiment of the invention, the enlarged portion 19 is not terminating flush with the upper surface of the header 2, but rather protrudes upwards therefrom and thus protrudes into the package.

(190) The purpose of reducing the gap width at the end of the feedthrough 9 is still achieved.

(191) The submount 5 is preferably thinned on the front end thereof, in accordance with the embodiment of FIGS. 22 to 24, that is to say it has a step 35 so that it has a smaller thickness in a front end area (not shown).

(192) The invention permitted to provide, in a simple manner, a TO package 1 which allows for significantly higher data transfer rates.

(193) TABLE-US-00001 LIST OF REFERENCE NUMERALS 1 TO package 2 Header 3 Cap 4 Pedestal 5 Submount 6a, 6b Conductor traces 7, 7a, 7b Signal pin 8 Solder/solder fillet 9 Feedthrough 10 Pin 11 Stiffener, thickened area 12 Printed circuit board 13 Metal block 14 Lower surface 15a, 15b Arch 16a-16d Ground conductor traces 17a, 17b Signal conductor trace 18, 18a, 18b Insulating material 19, 19a, 19b Enlarged portion of signal pin 20 Via 21 Upper surface of header 22 Area not filled with filling material 23 Through-hole of header 24 Plastic potting compound 25 Cavity 26 Area of enlarged diameter 27 Window 28 Laser diode 29 Bonding wire 30 Mounting area 31 Upper surface 32 Projection 33 Thinned area 34 Covering 35 Step