FABRICATION OF SUPERCONDUCTOR WIRE
20210184096 · 2021-06-17
Inventors
Cpc classification
Y02E40/60
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H10N60/0801
ELECTRICITY
International classification
Abstract
A 2nd generation high temperature superconductor wire that prevents mechanical destruction from the wire edge due to slitting. A 2G HTS wire according to embodiments of the present invention has a structure that prevents mechanical destruction from the wire edge. This can be accomplished by forming a striation at or near the edge of the wire where the buffer and superconducting layers are removed to prevent any propagation of edge cracks from damaging the HTS wire.
Claims
1. A superconducting article comprising: a metal tape substrate; a buffer layer overlying the substrate; a superconducting layer overlying the buffer; at least one striation running the length of the superconducting article and comprising an area in which most or all of the superconducting and buffer layers are removed but at least a portion of the substrate remains, said striation having a width of about 500 μm or less and said striation having an outer edge located between about 10 μm and about 500 nm of an outer edge of the superconducting article.
2. The superconducting article of claim 1 in which the at least one striation running the length of the superconducting article comprises two striations running the length of the superconducting article, the two striations located on opposite sides of the superconducting article.
3. The superconducting article of claim 1 in which the striation has a width of about 50 μm or less.
4. The superconducting article of claim 1 in which the striation has a width of about 20 μm.
5. The superconducting article of claim 1 in which the striation has a depth of about 2 μm.
6. The superconducting article of claim 1 in which the striation has a depth that is at least equal to the total thickness of any layers of material deposited on the metal substrate.
7. The superconducting article of claim 1 in which the striation has a depth that is greater than the total thickness of any layers of material deposited on the metal substrate.
8. A method of forming a superconducting article, the method comprising: providing a base superconducting article comprising a metal tape substrate, a buffer layer overlying the substrate, and a superconducting layer overlying the buffer; forming at least two substantially parallel striations lengthwise along the base superconducting article, said striations comprising two gaps having substantially no superconducting or buffer layers overlying the substrate; slitting the base superconducting article lengthwise through its entire thickness in the portion of the superconducting article between the two striations.
9. The method of claim 8 in which the two striations are formed using laser ablation, etching, or ion beam or plasma milling.
10. (canceled)
11. The method of claim 8 in which the two striations are formed by patterning the buffer and superconducting layers during deposition so that no buffer or superconductor is deposited within the striations.
12. The method of claim 8 in which slitting the base superconducting article comprises slitting the superconducting article using a mechanical slitter.
13. The method of claim 8 in which slitting the base superconducting article comprises slitting the superconducting article using a laser.
14. The method of claim 8 in which slitting the base superconducting article lengthwise comprises slitting the base superconducting article lengthwise so that the distance between the slit and the opposite edges of each of the two substantially parallel striations is greater than the maximum positional error of the slitting process.
15. The method of claim 8 in which the base superconducting article has a starting width before slitting of at least 12 mm.
16. (canceled)
17. The method of claim 8 in which the distance between the two parallel striations is approximately 50 microns.
18. The method of claim 8 in which slitting the base superconducting article between the at least two parallel striations results in a plurality of final superconducting articles, each having a smaller width than the base superconducting article.
19. (canceled)
20. The method of claim 8 further comprising depositing a protective capping layer over the superconducting layer before forming the at least two substantially parallel striations.
21. The method of claim 8 in which a capping layer is applied over the base superconducting article after forming the at least two substantially parallel striations and before slitting the base superconducting article lengthwise.
22. The method of claim 20 in which the capping layer comprises silver.
23. A method of forming a superconducting article, the method comprising: providing a base superconducting article comprising a metal tape substrate, a buffer layer overlying the substrate, and a superconducting layer overlying the buffer; forming a first pair of two substantially parallel striations lengthwise along the base superconducting article, said striations comprising two gaps having substantially no superconducting or buffer layers overlying the substrate; forming a second pair of two substantially parallel striations lengthwise along the base superconducting article, said striations comprising two gaps having substantially no superconducting or buffer layers overlying the substrate; slitting the base superconducting article lengthwise through its entire thickness in the portion of the superconducting article between the two parallel striations in each pair of substantially parallel striations.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0013] For a more thorough understanding of the present invention, and advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
[0014]
[0015]
[0016]
[0017]
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
[0024] FIG.10 shows another embodiment of the present invention in which a single striation is formed (for each desired slit) and then the HTS wire is slit within the striation.
[0025]
[0026]
[0027]
[0028] The accompanying drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every drawing.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
[0029] Embodiments of the present invention include a 2nd generation high temperature superconductor wire that prevents mechanical destruction from the wire edge due to slitting. A 2G HTS wire according to embodiments of the present invention has a structure that prevents mechanical destruction from the wire edge. This can be accomplished by forming a striation at or near the edge of the wire where the buffer and superconducting layers are removed to prevent any propagation of edge cracks from damaging the HTS wire.
[0030] A schematic of a typical 2G HTS wire 100 is shown in
[0031] The substrate 110 is typically in a tape-like configuration, having a high aspect ratio. For example, the width of the tape is generally on the order of about 2-12 mm, and the length of the tape is typically at least about 100 m, most typically greater than about 500 m. Accordingly, the substrate may have an aspect ratio which is fairly high, on the order of not less than 10.sup.3, or even not less than 10.sup.4. Certain embodiments are longer, having an aspect ratio of 10.sup.5 and higher. As used herein, the term ‘aspect ratio’ is used to denote the ratio of the length of the substrate or tape to the next longest dimension, that is, the width of the substrate or tape.
[0032] In one embodiment, the substrate is treated so as to have desirable surface properties for subsequent deposition of the constituent layers of the HTS tape. For example, the surface may be lightly polished to a desired flatness and surface roughness. Additionally, the substrate may be treated to be biaxially textured as is understood in the art, such as by the known RABiTS (roll assisted biaxially textured substrate) technique.
[0033] Turning to buffer layer 111, the buffer layer may be a single layer, or more commonly, be made up of several films. Most typically, the buffer layer includes a biaxially textured film, having a crystalline texture that is generally aligned along crystal axes both in-plane and out-of-plane of the film. Such biaxial texturing may be accomplished by IBAD. As is understood in the art, IBAD is an acronym for Ion Beam Assisted Deposition, a technique which may be advantageously utilized to form a suitably textured buffer layer for subsequent formation of an HTS layer having desirable crystallographic orientation for superior superconducting properties. Magnesium oxide is a typical material of choice for the IBAD film and may be on the order or 50 to 500 Angstroms, such as 50 to 200 Angstroms. Generally, the IBAD film has a rock-salt like crystal structure, as defined and described in U.S. Pat. No. 6,190,752, which is incorporated herein by reference in its entirety.
[0034] The buffer layer may include additional films, such as a barrier film provided to directly contact and be placed in between an IBAD film and the substrate. In this regard, the barrier film may advantageously be formed of an oxide, such as yttria, and functions to isolate the substrate from the IBAD film. A barrier film may also be formed of non-oxides such as silicon nitride and silicon carbide. Suitable techniques for deposition of a barrier film include chemical vapor deposition and physical vapor deposition including sputtering. Typical thicknesses of the barrier film may be within a range of about 100-200 angstroms. Still further, the buffer layer may also include an epitaxially grown film, formed over the IBAD film. In this context, the epitaxially grown film is effective to increase the thickness of the IBAD film and may desirably be made principally of the same material utilized for the IBAD layer such as MgO.
[0035] In embodiments utilizing an MgO-based IBAD film and/or epitaxial film, a lattice mismatch between the MgO material and the material of the superconducting layer exists. Accordingly, the buffer layer may further include another buffer film, this one in particular implemented to reduce a mismatch in lattice constants between the HTS layer and the underlying IBAD film and/or epitaxial film. This buffer film may be formed of materials such as YSZ (yttria-stabilized zirconia) strontium ruthenate, lanthanum manganate, and generally, perovskite-structured ceramic materials. The buffer film may be deposited by various physical vapor deposition techniques.
[0036] While the foregoing has principally focused on implementation of a biaxially textured film in the buffer stack (layer) by a texturing process such as IBAD, alternatively, the substrate surface itself may be biaxially textured. In this case, the buffer layer is generally epitaxially grown on the textured substrate so as to preserve biaxial texturing in the buffer layer. One process for forming a biaxially textured substrate is the process known in the art as RABiTS (roll assisted biaxially textured substrates), generally understood in the art.
[0037] High-temperature superconductor (HTS) layer 112 is typically chosen from any of the high-temperature superconducting materials that exhibit superconducting properties above the temperature of liquid nitrogen, 77° K. Such materials may include, for example, YBa.sub.2Cu.sub.3O.sub.7−x, Bi.sub.2Sr.sub.2Ca.sub.2Cu.sub.3O.sub.10+y, Ti.sub.2Ba.sub.2Ca.sub.2Cu.sub.3O.sub.10+y, and HgBa.sub.2Ca.sub.2Cu.sub.3O.sub.8+y. One class of materials includes REBa.sub.2Cu.sub.3O.sub.7−x, wherein RE is a rare earth element. Of the foregoing, YBa.sub.2Cu.sub.3O.sub.7−x, also generally referred to as YBCO, may be advantageously utilized. The HTS layer 112 may be formed by anyone of various techniques, including thick and thin film forming techniques. Preferably, a thin film physical vapor deposition technique such as pulsed laser deposition (PLD) can be used for a high deposition rates, or a chemical vapor deposition technique can be used for lower cost and larger surface area treatment. Typically, the HTS layer has a thickness on the order of about 1 to about 30 microns, most typically about 2 to about 20 microns, such as about 2 to about 10 microns, in order to get desirable amperage ratings associated with the HTS layer 112.
[0038] Capping layer 114 and stabilizer layer 116 are generally implemented for electrical stabilization, that is, to aid in prevention of HTS burnout in practical use. More particularly, layers 114 and 116 aid in continued flow of electrical charges along the HTS conductor in cases where cooling fails or the critical current density is exceeded, and the HTS layer moves from the superconducting state and becomes resistive. Typically, a noble metal is utilized for capping layer 114 to prevent unwanted interaction between the stabilizer layer(s) and the HTS layer 112. Typical noble metals include gold, silver, platinum, and palladium. Silver is typically used due to its cost and general accessibility. Capping layer 114 is typically made to be thick enough to prevent unwanted diffusion of the components from stabilizer layer 116 into HTS layer 112 but is made to be generally thin for cost reasons (raw material and processing costs). Typical thicknesses of capping layer 114 range within about 0.1 to about 10.0 microns, such as 0.5 to about 5.0 microns. Various techniques may be used for deposition of capping layer 114, including physical vapor deposition, such as DC magnetron sputtering.
[0039] Depending on the implementation, stabilizer layer 116 is incorporated to overlie the superconducting layer 112 and, in particular, overlie and directly contact capping layer 114 in the embodiment shown in
[0040] Electroplating (also known as electrodeposition) is generally performed by immersing the superconductive tape in a solution containing ions of the metal to be deposited. The surface of the tape is connected to an external power supply and current is passed through the surface into the solution, causing a reaction of metal ions (M.sup.z−) with electrons (e.sup.−) to form a metal (M).
[0041] Capping layer 114 functions as a second layer for deposition of copper thereon. In the particular case of electroplating of stabilizer metals, the superconductive tape is generally immersed in a solution containing cupric ions, such as in a copper sulfate solution. Electrical contact is made to capping layer 114 and current is passed such that the reaction Cu.sup.2++2e.sup.−.fwdarw.Cu occurs at the surface of the capping layer 114. The capping layer 114 functions as the cathode in the solution, such that the metal ions are reduced to Cu metal atoms and deposited on the tape. On the other hand, a copper-containing anode is placed in the solution, at which an oxidation reaction occurs such that copper ions go into solution for reduction and deposition at the cathode.
[0042] In the absence of any secondary reactions, the current delivered to the conductive surface during electroplating is directly proportional to the quantity of metal deposited (Faraday's Law of Electrolysis). Using this relationship, the mass, and hence thickness of the deposited material forming stabilizer layer 116 can be readily controlled.
[0043] While the foregoing generally references copper, it is noticed that other metals, including aluminum, silver, gold, and other thermally and electrically conductive metals may also be utilized. However, it is generally desirable to utilize a non-noble metal to reduce overall materials cost for forming the superconductive tape.
[0044] While the foregoing description and
[0045]
[0046] While embodiments of the present invention are particularly suitable for formation of a stabilizer layer that is continuous, having side bridges that are formed of the same material, other embodiments utilize a different material for the side bridges. For example, the lateral surfaces can be masked during stabilizer deposition, followed by mask removal and deposition of a different side bridge composition. Particularly suitable are high melting point solders, such as lead-tin compositions. Typically, such solders have a melting point greater than about 180° C. Use of high melting point solders or use of a surround stabilizer (which also has a melting point greater than 180° C.) such as copper is of notable importance. Particularly, high melting point materials permit improved flexibility of conductor processing by the end user, due to greater temperature range in which the conductor can be manipulated, such as during joining operations.
[0047] While not shown in
[0048]
[0049]
[0050]
[0051] In the embodiment shown in
[0052]
[0053] According to embodiments of the invention, striations to block the propagation of edge damage can be formed in a variety of ways, including without limitation laser ablation, etching, or ion beam or plasma milling. For example, in some embodiments, a striation can be formed using a Femto-second pulse laser to remove material in the desired location. In other embodiments, the striations can be formed by patterning the buffer and superconducting layers during deposition so that no buffer or superconductor is deposited within the striations.
[0054] In order to fully prevent cracks from propagating across both the buffer and HTS layers, it is desirable that all or substantially all of the buffer and HTS material in the striation be removed. In some cases, the striation may extend into the substrate layer. In some embodiments, the striation width will be at least 10 μm wide, such as at least 20 μm wide, at least 30 μm wide, at least 40 μm wide, at least 50 μm wide, at least 100 μm wide, or at least 500 μm wide. Because the striation process makes a portion of the original HTS wire unusable, it is desirable to make the striations as narrow as possible while still preventing damage propagation resulting from slitting. Forming a narrow striation using, for example, laser ablation or particle beam milling is also generally easier and faster than forming a wide striation.
[0055] In some embodiments, a striation would be formed on either side of the desired location of a mechanical slit as shown in
[0056] In one particular non-limiting example, buffer and superconductor layers are deposited onto a 50 μm thick Hastelloy substrate layer that is 12 mm wide. In this specific example, the buffer layer is a buffer stack as described above having a combined thickness of ˜0.2 μm, while the superconducting layer is a layer of REBCO with a thickness of 1.6 μm. An encapsulating overlayer of silver has been deposited over the entire structure to a thickness of 1.0 μm. The base HTS wire is to be slit along its length to produce three separate HTS wires having a width of approximately 4 mm.
[0057] As shown in
[0058] The base HTS wire will then be slit at positions shown by dashed line 922 to form three final HTS wires 320 of approximately 3.94 mm in width using a mechanical slitter. The slitter will be positioned to slit the base HTS wire through the 50 μm shoulders between the first and second striations and between the third and fourth striations. Given a maximum positional error of the mechanical slitter of ±15 μm for this example, this insures that the slits will both be separated from the edges of the effective HTS layers resulting from the striations.
[0059]
[0060] The striations shown in the schematic drawings herein all have a rectangular cross-section for ease of illustration. As will be appreciated by persons of skill in the art, however, the actual shape of the striation will depend to a large degree on the apparatus used to form the striation. For example, a striation cut using a laser will tend to have a rounded base rather than the rectangular shape shown in the drawings. Further, in some embodiments it may be desirable to form a striation with a different cross-sectional shape, such as the V-shaped striation 1230 shown in
[0061]
[0062] The invention described herein has broad applicability and can provide many benefits as described and shown in the examples above. The embodiments will vary greatly depending upon the specific application, and not every embodiment will provide all of the benefits and meet all of the objectives that are achievable by the invention.
[0063] Whenever the terms “automatic,” “automated,” or similar terms are used herein, those terms will be understood to include manual initiation of the automatic or automated process or step. In the discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to. . . . ” To the extent that any term is not specially defined in this specification, the intent is that the term is to be given its plain and ordinary meaning. The accompanying drawings are intended to aid in understanding the present invention and, unless otherwise indicated, are not drawn to scale. As used herein, the words “right,” “left,” “lower,” “upper,” “bottom,” “horizontal,” “vertical,” and the like designate directions in the drawings to which reference is made. These terms are used for convenience only and are not limiting.
[0064] Further, it should be recognized that embodiments of the present invention can be implemented via computer hardware or software, or a combination of both. The methods can be implemented in computer programs using standard programming techniques—including a computer-readable storage medium configured with a computer program, where the storage medium so configured causes a computer to operate in a specific and predefined manner—according to the methods and figures described in this Specification. Each program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. However, the programs can be implemented in assembly or machine language, if desired. In any case, the language can be a compiled or interpreted language. Moreover, the program can run on dedicated integrated circuits programmed for that purpose.
[0065] The scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. The figures described herein are generally schematic and do not necessarily portray the embodiments of the invention in proper proportion or scale.