NON-C-PLANE GROUP III-NITRIDE-BASED VCSELS WITH NANOPOROUS DISTRIBUTED BRAGG REFLECTOR MIRRORS

Abstract

An electrically injected vertical-cavity surface emitting laser (VCSEL) and a method of manufacturing the same is disclosed. The electrically injected VCSEL includes a non-c-plane substrate and a nanoporous bottom distributed Bragg reflector (DBR) comprising a plurality of alternating highly doped III-nitride layers and unintentionally doped III-nitride layers formed above the substrate.

Claims

1. An electrically injected III-nitride vertical-cavity surface emitting laser (VCSEL) comprising: a non-c-plane substrate; and an epitaxial nanoporous bottom distributed Bragg reflector (DBR) comprising a plurality of alternating highly doped III-nitride layers and unintentionally doped III-nitride layers formed above the substrate.

2. The electrically injected III-nitride VCSEL of claim 1, wherein an index of refraction of the highly doped III-nitride layers of the epitaxial nanoporous bottom DBR is controlled by an amount of porosity in the highly doped III-nitride layers, wherein the porosity comprises a plurality of subwavelength air voids.

3. The electrically injected VCSEL of claim 1, wherein the non-c-plane III-nitride substrate is a nonpolar m-plane III-nitride substrate.

4. The electrically injected VCSEL of claim 1, wherein the non-c-plane III-nitride substrate is at an angle between a c-plane and an m-plane of the III-nitride substrate, including angles beyond the m-plane to minus c-plane (N face).

5. The electrically injected III-nitride VCSEL of claim 2, wherein a pore size of the plurality of subwavelength air voids is determined based on an electrochemical etch bias voltage, a doping level, and an etchant solution.

6. The electrically injected III-nitride VCSEL of claim 2, wherein a density of the plurality of subwavelength air voids is between about 20% and about 80%, or about 30% and about 70%, or about 40% and about 60%, or about 50%.

7. The electrically injected III-nitride VCSEL of claim 2, wherein a density of the plurality of subwavelength air voids is controlled based on a concentration of Si-doping.

8. The electrically injected III-nitride VCSEL of claim 2, wherein a higher density of the plurality of subwavelength air voids is inversely proportional to a number of layers of the plurality of alternating highly doped III-nitride layers and unintentionally doped III-nitride layers.

9. The electrically injected III-nitride VCSEL of claim 1, wherein the highly doped III-nitride layers and the unintentionally doped III-nitride layers comprise GaN, In.sub.xGa.sub.1-xN, or Al.sub.xGa.sub.1-xN.

10. The electrically injected III-nitride VCSEL of claim 1, wherein a majority of radiation emitted by the VCSEL is pinned along an a-direction of the non-c-plane III-nitride substrate.

11. The electrically injected III-nitride VCSEL of claim 1, wherein an electric field of emitted radiation is polarized along an a-direction.

12. The electrically injected III-nitride VCSEL of claim 1, wherein emitted radiation comprises UV, visible, or infrared.

13. The electrically injected III-nitride VCSEL of claim 1, further comprising a dielectric DBR formed over the lattice-matched nanoporous bottom distributed DBR.

14. The electrically injected III-nitride VCSEL of claim 1, wherein the nanoporous bottom DBR is lattice matched with GaN, or In.sub.xGa.sub.1-xN, or Al.sub.xGa.sub.1-xN.

15. The electrically injected VCSEL of claim 1 further comprising; a unintentionally doped (UID) GaN heat spreading layer; an n+GaN contact layer; an n−GaN cladding layer; an active region; an electron blocking layer; a p−GaN cladding layer; an p+GaN contact layer; an indium tin oxide (ITO) layer; a cavity spacer; and a top DBR.

16. The electrically injected III-nitride VCSEL of claim 15, further comprising one or more ion-implanted apertures.

17. A method for fabricating an electrically injected III-nitride vertical-cavity surface emitting laser (VCSEL) comprising: providing an epitaxial structure comprising, a non-c-plane substrate, a lattice-matched bottom distributed Bragg reflector (DBR) comprising a plurality of alternating highly doped III-nitride layers and unintentionally doped III-nitride layers on the substrate, an unintentionally doped (UID) III-nitride heat spreading layer, an n+ III-nitride contact layer, an n− III-nitride cladding layer, an active region, an electron blocking layer, a p− III-nitride cladding layer, and an p+ III-nitride contact layer; etching a mesa to expose the n+ III-nitride contact layer; patterning to define one or more current apertures; ion implanting one or more apertures; depositing a layer of SiO.sub.2 to protect the active region and contact layers; etching deep trenches to expose sidewalls of the lattice-matched bottom DBR; and etching to selectively porosify the highly doped III-nitride layers to form a nanoporous DBR.

18. The method of claim 17, further comprising; removing the layer of SiO.sub.2; patterning a layer of SiN.sub.x on the mesa and the trench to passivate sidewalls of the active region and the nanoporous DBR; depositing an indium tin oxide (ITO) layer; deposing an n metal and a p metal; depositing a cavity spacer; and deposing a top dielectric DBR.

19. The method of claim 17, wherein the substrate is at an angle between a c-plane and an m-plane of the substrate, including angles beyond the m-plane to minus c-plane (N face).

20. The method of claim 17, wherein the highly doped III-nitride layers and the unintentionally doped III-nitride layers comprise GaN, In.sub.xGa.sub.1-xN, or Al.sub.xGa.sub.1-xN.

Description

BRIEF DESCRIPTION OF THE FIGURES

[0015] Various features of the embodiments can be more fully appreciated, as the same become better understood with reference to the following detailed description of the embodiments when considered in connection with the accompanying figures, in which:

[0016] FIG. 1A, FIG. 1B, FIG. 1C, and FIG. 1D are prior art and show polar and nonpolar crystal characteristics, where FIG. 1A shows a polar example, FIG. 1B shows a nonpolar example,

[0017] FIG. 1C show a plot of intensity vs. wavelength for different polarizations, and FIG. 1D shows a polar plot of the emission intensity from an m-plane VCSEL.

[0018] FIG. 2A shows a plot of modal gain vs. current density plot for 1 QW to 8 QWs with a QW thickness of 4 nm and barrier thickness of 2 nm. TMM simulated threshold modal gain is overlaid on the plot to determine which yields the lowest threshold current density. FIG. 2B shows results of a TMM simulation of the cavity mode intensity and refractive index profile for a 6-QW design.

[0019] FIG. 3A shows a plot of spontaneous emission EL spectrum of the nanoporous VCSEL sample. [Inset] Epilayer stack of the sample showing the layer thicknesses and the repetitions. FIG. 3B shows plots of a quick-test spontaneous emission L-I-V characteristics of the sample with a turn-on at 4.5 V and a 3.75 mW output power at 100 mA.

[0020] FIGS. 4A-4L show processing steps for the fabrication of the m-plane nanoporous VCSEL.

[0021] FIG. 5 shows mages of an angled topographic view of the VCSEL structure and cross-sectional SEM image of a representative bottom nanoporous DBR.

[0022] FIG. 6 shows additional images of an angled topographic view of the VCSEL structure and cross-sectional SEM image of a representative bottom nanoporous DBR.

[0023] FIG. 7A shows a L-J-V plot of a 20 μm diameter nanoporous VCSEL under pulsed operation. FIG. 7B shows an emission spectrum under various pump currents and the corresponding near-field images of the aperture region.

[0024] FIG. 8A shows a polar plot showing stable polarization pinned emission along [1210] (a-direction). FIG. 8B shows a spectrum when the polarizer angle is perpendicular and parallel to [0001].

[0025] FIG. 9A shows an axisymmetric COMSOL simulation of the nanoporous VCSEL showing the temperature profile and (inset) heat flow in the cavity layers. It also shows a microscope image of a device with p-metal damage due to heating at 3% duty cycle. FIG. 9B shows a plot of Z.sub.t vs. cavity length for the nanoporous VCSEL with different aperture sizes. Overlaid are the thermal resistances of reported CW-RT VCSELs by NCTU, Meijo-Stanley, and UCSB.

[0026] FIG. 10 shows two examples of the near-field emission pattern and mode simulation of a 20 μm diameter nanoporous VCSEL aperture.

[0027] FIG. 11A, FIG. 11B, FIG. 11C, and FIG. 11D show plots showing the (FIG. 11A) output power/intensity, (FIG. 11B) slope efficiency, (FIG. 11C) threshold current/current density, and (FIG. 11D) differential resistance as a function of the aperture size. The data represent the average of 50 device measurements with error bars.

DETAILED DESCRIPTION

[0028] Reference will now be made in detail to example implementations, illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. In the following description, reference is made to the accompanying drawings that form a part thereof, and in which is shown by way of illustration specific exemplary embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the invention. The following description is, therefore, merely exemplary.

[0029] Generally speaking, an electrically injected vertical-cavity surface emitting laser (VCSEL) and a method of manufacturing the same is disclosed. The electrically injected VCSEL includes a non-c-plane substrate and an epitaxial nanoporous bottom distributed Bragg reflector (DBR) comprising a plurality of alternating highly doped III-nitride layers and unintentionally doped III-nitride layers formed above the substrate. The non-c-plane III-nitride substrate is at an angle between a c-plane and an m-plane of the III-nitride substrate, including the m-plane or anything beyond the m-plane to minus c-plane (N face). The highly doped III-nitride layers and the unintentionally doped III-nitride layers can comprise GaN, In.sub.xGa.sub.1-xN, or Al.sub.xGa.sub.1-xN. Other group III materials can also be used.

[0030] The index of refraction of the highly doped III-nitride layers is controlled by an amount of porosity in the highly doped III-nitride layers, wherein the porosity comprises a plurality of subwavelength air voids. A pore size of the subwavelength air voids is determined based on an electrochemical etch bias voltage, a doping level, and an etchant solution. A density of the plurality of subwavelength air voids is between about 20% and about 80%, or about 30% and about 70%, or about 40% and about 60%, or about 50%. The density of the plurality of subwavelength air voids is controlled based on a concentration of Si-doping. The porosity of the subwavelength air voids (complete etching at 100% porosity also viable) is inversely proportional to a number of pairs of alternating highly doped III-nitride and unintentionally doped III-nitride layers needed to obtain high mirror reflectance.

[0031] In some examples, a majority, such as greater than 50%, greater than 75%, greater than 90%, of radiation emitted by the VCSEL is polarization-pinned along an a-direction of the non-c-plane III-nitride substrate. An electric field of the emitted radiation is polarized along an a-direction. The radiation comprises UV, visible, or infrared. The electrically injected III-nitride VCSEL further comprises a dielectric DBR formed over the epi-layers and the nanoporous bottom DBR. The substrate comprises a III-nitride material. The electrically injected III-nitride VCSEL further comprises an unintentionally doped (UID) GaN heat spreading layer; an n+GaN contact layer; an n−GaN cladding layer; an active region; an electron blocking layer; a p−GaN cladding layer; an p+GaN contact layer; an indium tin oxide (ITO) layer; a cavity spacer; and a top dielectric DBR. The electrically injected III-nitride VCSEL further comprises one or more ion-implanted apertures.

[0032] Incorporating subwavelength air-voids or nanopores in alternating layers allows high-refractive-index-contrast between the layers. The nanoporous layers are created by the anodic electrochemical (EC) etching of highly doped n-type GaN in certain acids. The selectivity of the nanopores in the n-type doped layers effectively lowers the refractive index compared to the adjacent unintentionally doped bulk GaN layers. Using this technique a DBR mirror reflectance >98% was demonstrated with only 15 pairs. Later, an optically pumped 2-λ hybrid VCSEL that exhibited a single longitudinal lasing mode at 462 nm with a threshold power density of .sup.˜5 kW/cm.sup.2 and a FWHM of .sup.˜0.12 nm was developed. Finally, the first electrically injected nonpolar m-plane GaN-based VCSELs using lattice-matched nanoporous bottom DBRs. Lasing under pulsed operation at room temperature was observed near 409 nm with a linewidth of .sup.˜0.6 nm and a maximum output power of .sup.˜1.5 mW. All tested devices were linearly polarized and polarization-pinned in the a-direction with a polarization ratio of 0.94. FIG. 1A, FIG. 1B, FIG. 1C, and FIG. 1D are prior art and show polar and nonpolar crystal characteristics, where FIG. 1A shows a polar example (0001) along the c-plane, FIG. 1B shows a nonpolar example (1010) along the m-plane, FIG. 1C show a plot of intensity vs. wavelength, and FIG. 1D shows a polar plot. In FIG. 1C, a crystal is shown with a, c, and m planes labeled. The a-direction is perpendicular to the a-plane, the m-direction is perpendicular to the m-plane, and the c-direction is perpendicular to the c-plane.

[0033] FIG. 2A shows a plot of modal gain vs. current density plot for 1 QW to 8 QWs with a QW thickness of 4 nm and barrier thickness of 2 nm. TMM simulated threshold modal gain is overlaid on the plot to determine which yields the lowest threshold current density. FIG. 2B shows results of a TMM simulation of the cavity mode intensity and refractive index profile for a 6-QW design.

[0034] As shown in FIG. 2A, plots of the gain curves for 1-8 QWs with 2 nm barriers. The standing-wave and the refractive index profile of the cavity with an effective optical thickness of 8−λ (L.sub.eff×n.sub.eff≈1453 nm×2.26) is illustrated in FIG. 2B, with the QWs positioned at a longitudinal mode peak and the indium tin oxide (ITO) at a null to maximize gain and minimize loss. The threshold modal gain of the cavity obtained from the TMM simulation was .sup.˜8.4 cm.sup.−1. Overlaying this value on top of FIG. 2A, it can be seen that the lowest current density for this modal gain can be achieved with 6 QWs, highlighted by line 202. The electron blocking layer (EBL) comprises a 5 nm p-doped Al.sub.0.2Ga.sub.0.8N layer. FIG. 3A shows a plot of spontaneous emission EL spectrum of the nanoporous VCSEL sample. [Inset] Epilayer stack of the sample showing the layer thicknesses and some layer repetitions. FIG. 3B shows plots of the spontaneous emission quick-test L-I-V characteristics of the sample with a turn-on at 4.5 V and a 3.75 mW output power at 100 mA.

[0035] An m-plane VCSEL sample was then grown with the epilayers consisting of a 3-μm-thick n−GaN template, 16 pairs of alternating unintentionally doped (UID)/n+GaN (Si-doping concentration .sup.˜1×10.sup.19 cm.sup.−3) layers with thicknesses of 42 nm/62 nm for the bottom DBR, 495 nm of unintentionally doped (UID) GaN for thermal spreading, a 200 nm n+GaN contact layer, a 200 nm n−GaN cladding layer, a six-pair In.sub.0.1Ga.sub.0.9N/GaN active region with thicknesses of 4 nm/2 nm emitting at .sup.˜407 nm, a 5 nm p−Al.sub.0.2Ga.sub.0.8N electron blocking layer, a 63 nm p−GaN cladding layer, and a 14 nm p+GaN contact layer. The spontaneous emission EL spectrum and spontaneous emission L-I-V characteristics of the sample were collected after growth and before fabrication and are plotted in FIG. 3A and FIG. 3B, respectively. The actual peak emission wavelength was 410 nm. The device turn-on was around 4.5 V with a series resistance of .sup.˜10Ω. Both the turn-on voltage and series resistance can be improved with the optimization of the EBL and p−GaN layers.

[0036] FIGS. 4A-4L show processing steps for the fabrication of the m-plane nanoporous VCSEL. FIG. 4A shows an epitaxy growth step comprising template layer 402, unetched NP-DBR layer 404, UID GaN thermal layer 406, n+GaN layer 408, n− GaN layer 410, MQW active layers 412, p− GaN layer 414, and p+GaN layer 416. FIG. 4B shows a formation of Mesa 1 from the arrangement of FIG. 4A. FIG. 4C shows Al ion implantation on the arrangement of FIG. 4B by Al ion implanting specific areas 418. FIG. 4D shows formation of Mesa 2 from the arrangement of FIG. 4C. FIG. 4E shows a SiO.sub.2 passivation layer on a top surface and sidewalls of Mesa 2 from the arrangement of FIG. 4D by deposition of dielectric layer 420. FIG. 4F shows formation of a trench etch based on the arrangement of FIG. 4E. FIG. 4G shows an Electrochemical (EC) porosification based on the arrangement of FIG. 4F with porosified NP-DBR layer 422. FIG. 3H shows a patterned SiO.sub.2 passivation layer based on the arrangement of FIG. 4G. FIG. 4I shows an ITO deposition layer 424 based on the arrangement of FIG. 4H where formation of the ITO deposition layer 424 is formed on a top surface of Al ion implant layer 418 and p+GaN layer 416. FIG. 4J shows a p-metal deposition based on the arrangement of FIG. 4I by formation of p-metal layer 426 on a top surface of ITO deposition layer 424. FIG. 4K shows a n− metal deposition based on the arrangement of FIG. 4J by formation of n-metal layer 428 on a portion of a top surface of n+GaN layer 408. FIG. 4L shows a dielectric DBR deposition based on the arrangement of FIG. 4K by formation of dielectric DBR layer 430 on a top surface of ITO deposition layer 424 and between n-metal layer 428.

[0037] Following the growth, the sample was fabricated according the to the process flow depicted in FIGS. 4A-4H. First, a mesa was etched (Mesa 1) using ICP etching to expose the n+GaN contact layer. Next, the sample was patterned with a Ti/Au hard mask to define the current apertures and then implanted with Al-ion. Aperture diameters of 5 μm, 10 μm, 15 μm, and 20 μm were defined in this step. After implantation, the Ti/Au hard mask was removed in aqua regia. A second mesa with a depth of 400 nm was ICP etched (Mesa 2) and followed by a blanket e-beam deposition of 150 nm SiO.sub.2 to protect the active region and contact layers during the porosification step of the nanoporous DBRs. Next, deep trenches aligned along the c-direction were etched to expose the sidewalls of the DBR stack. Following this, the DBRs were EC etched for 14 hours to selectively porosify the highly doped n-type DBR layers using a bias voltage of 5 V at 100 rpm stirring. Complete porosification was confirmed when the two lateral etch fronts along the a-direction met at the center of the trench. Next, the blanket SiO.sub.2 was stripped in buffered HF and a patterned layer of SiNx was deposited across Mesa 1 and the trench to passivate the sidewalls of the active region and the nanoporous DBRs. Passivation of the DBR sidewalls was required to prevent the build-up of undeveloped PR from the subsequent steps. 50 nm of ITO was e-beam deposited and annealed under nitrogen ambient at 550° C. for 15 minutes, after which the p-metal and n-metal were deposited and consisted of Ti/Au (20 nm/300 nm) and Ti/Al/Ni/Au (20 nm/100 nm/50 nm/300 nm), respectively. Finally, a 30-nm-thick SiN.sub.x cavity spacer and the top dielectric DBR were blanket deposited using PECVD then patterned and etched down using RIE. The top DBR consists of 25 pairs of alternating λ/4n.sub.SiO2-thick SiO.sub.2 and λ/4n.sub.siN.sub.x-thick SiN.sub.x.

[0038] FIG. 5 shows a schematic illustration of the VCSEL structure, the epitaxial layer structure of the VCSEL, and SEM images of an angled topographic views of the VCSEL structure and cross-sectional SEM image of a representative bottom nanoporous DBR. FIG. 6 shows additional SEM images of an angled topographic view of the VCSEL structure and cross-sectional SEM image of a representative bottom nanoporous DBR.

[0039] FIG. 7A shows an L-J-V plot of a 20-μm-diameter nanoporous VCSEL under pulsed operation. FIG. 7B shows an emission spectrum under various pump currents and the corresponding near-field images of the aperture region at various operating currents. As shown in FIG. 7A, the light-current density-voltage (L-J-V) characteristics of a VCSEL with a 20 μm diameter aperture is shown. The threshold current density is .sup.˜20 kA/cm.sup.2 and the maximum output power is 1.5 mW. As shown in FIG. 7B, the lasing spectrum for the same device, with a peak wavelength of 408.7 nm and a FWHM of 0.6 nm. The inset images show the intensity from the aperture area at various bias currents.

[0040] FIG. 8A shows a polar plot showing stable polarization pinned emission along [1210] (the a-direction). FIG. 8B shows a spectrum when the polarizer angle is perpendicular and parallel to [0001]. A plot of the normalized output power as a function of polarizer angle reveals that the emission is polarization pinned along the a-direction of the crystal. All tested devices showed polarization pinning along the a-direction. FIG. 8B shows the spectrum with the polarizer parallel and perpendicular to the c-direction. Maximum transmission is obtained with the polarizer perpendicular to the c-direction (along the a-direction). The measured polarization ratio was 0.94.

[0041] FIG. 9A shows an axisymmetric COMSOL™ simulation of the nanoporous VCSEL showing the temperature profile and (inset) heat flow in the cavity layers. It also shows a microscope image of a device with p-metal damage due to heating at 3% duty cycle. FIG. 9B shows a plot of thermal resistance (Z.sub.t) vs. cavity length for the nanoporous VCSEL with different aperture sizes. Overlaid are the thermal resistances of reported CW-RT VCSELs by other research groups.

[0042] FIG. 10 shows two examples of the near-field emission pattern and mode simulation of a 20 μm diameter nanoporous VCSEL aperture. The random nature of the filamentation coupled with the distinct divide across the aperture by the nanoporous etch fronts strongly hinted that the filamentation may originate from the non-uniformity in the cavity resonance. This was verified by simulating a similar core-cladding model but with the addition of nanoscale regions with slightly higher refractive index scattered randomly throughout the core region. The small index change was calculated using Δn/n=Δλ/λ, where Δλ is the difference in wavelength obtained from the two peaks observed in our previous optical pumped VCSEL with λ being the dominant peak.

[0043] FIG. 11A, FIG. 11B, FIG. 11C, and FIG. 11D show plots showing the (FIG. 11A) output power/intensity, (FIG. 11B) slope efficiency, (FIG. 11C) threshold current/current density, and (FIG. 11D) differential resistance as a function of the aperture size. The data represent the average of 50 device measurements with error bars. FIG. 11A, FIG. 11B, FIG. 11C, and FIG. 11D show plots the (FIG. 11A) output power/intensity, (FIG. 11B) slope efficiency, (FIG. 11C) threshold current/current density, and (FIG. 11D) differential resistance as a function of the aperture size. The data points represent the average value of all the devices tested for that particular aperture diameter with error bars. In FIG. 11A, the total output power increases almost linearly with increasing aperture sizes because of the enlarged emission areas. However, the emission intensity remained reasonably constant for the 10 μm and 15 μm but dropped for the 20 μm aperture. Given the filamentary nature of emission observed in the VCSELs, the average output power is expected to drop due to specular non-uniform emission from large apertures. The lower intensity of the 5 μm aperture may be due to the lasing spot being in close proximity to the non-ideal etch front divide in the nanoporous DBRs. We see similar trends for the slope efficiency in FIG. 11B, which correlates with the output power. The drop in slope efficiency for the 20 μm is likely a result of nonuniform current spreading in the ITO. More current is required near the center of the aperture to obtain the same power of stimulated emission occurring at the edge. The current spreading in the p-side can be significantly improved by replacing the ITO with a GaN-based Ti, which will also help reduce the layer absorption loss. Now for the threshold current, increasing the aperture size generally means an increased Ith as more current is needed to inject across a larger area to reach the same threshold current density. However, in FIG. 11C, the current density drastically changes from .sup.˜60 kA/cm.sup.2 for the 5 μm to .sup.˜15 kA/cm.sup.2 for the 10 μm aperture. This is primarily due to poor lateral confinement in the 5 μm apertures, in addition to the lasing spot being at a non-ideal location near where the EC etch fronts meet. FIG. 11D plots the differential resistance against the aperture size, where it drops gradually from .sup.˜100Ω to .sup.˜34Ω. All the VCSELs had the same device dimensions apart from the aperture diameters, meaning that the current flow was restricted in the axial direction for the smaller apertures resulting in the high differential resistance. The larger aperture sizes allow the flow of current at lower voltages. Overall, the trends in FIG. 11A-FIG. 11D highlight the importance of choosing the proper aperture diameters. Small apertures suffer from weak confinement, while large apertures suffer from filamentation and non-uniform current spreading. It appears that for the current design, 10 μm and 15 μm apertures are the most optimized. Addressing some of these issues in future designs will improve the device characteristic in other aperture sizes as well.

[0044] Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the present teachings are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in their respective testing measurements. Moreover, all ranges disclosed herein are to be understood to encompass any and all sub-ranges subsumed therein. For example, a range of “less than 10” can include any and all sub-ranges between (and including) the minimum value of zero and the maximum value of 10, that is, any and all sub-ranges having a minimum value of equal to or greater than zero and a maximum value of equal to or less than 10, e.g., 1 to 5. In certain cases, the numerical values as stated for the parameter can take on negative values. In this case, the example value of range stated as “less than 10” can assume negative values, e.g. −1, −2, −3, −10, −20, −30, etc.

[0045] While the present teachings have been illustrated with respect to one or more implementations, alterations and/or modifications can be made to the illustrated examples without departing from the spirit and scope of the appended claims. For example, it will be appreciated that while the process is described as a series of acts or events, the present teachings are not limited by the ordering of such acts or events. Some acts may occur in different orders and/or concurrently with other acts or events apart from those described herein. Also, not all process stages may be required to implement a methodology in accordance with one or more aspects or implementations of the present teachings. It will be appreciated that structural components and/or processing stages can be added or existing structural components and/or processing stages can be removed or modified. Further, one or more of the acts depicted herein may be carried out in one or more separate acts and/or phases. Furthermore, to the extent that the terms “including,” “includes,” “having,” “has,” “with,” or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.” The term “at least one of” is used to mean one or more of the listed items can be selected. As used herein, the term “one or more of” with respect to a listing of items such as, for example, A and B, means A alone, B alone, or A and B. Further, in the discussion and claims herein, the term “on” used with respect to two materials, one “on” the other, means at least some contact between the materials, while “over” means the materials are in proximity, but possibly with one or more additional intervening materials such that contact is possible but not required. Neither “on” nor “over” implies any directionality as used herein. The term “about” indicates that the value listed may be somewhat altered, as long as the alteration does not result in nonconformance of the process or structure to the illustrated implementation. Finally, “exemplary” indicates the description is used as an example, rather than implying that it is an ideal. Other implementations of the present teachings will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the present teachings being indicated by the following claims.

[0046] While the preferred embodiments have been shown and described, it will be understood that there is no intent to limit the invention by such disclosure, but rather, is intended to cover all modifications and alternate constructions falling within the spirit and scope of the invention.