METHOD OF CREATING A NANO-SIZED RECESS

20210165314 · 2021-06-03

    Inventors

    Cpc classification

    International classification

    Abstract

    The invention relates to creating a nano-sized recess into a layer of material. For that, a first layer (100) is provided, which defines a first recess (101). The first layer (100) is then conformally covered with a second layer (107) such that the second layer evenly covers the boundaries of the first recess. In this way, the second layer defines a nano-sized recess. Furthermore, the invention relates to using such a structure with a second nano-sized recess for etching a nanoslit into a graphene layer. Furthermore, such a graphene layer with a nanoslit is described to be used for creating a crossed-nanoslit device for sequencing molecules.

    Claims

    1. Method of creating a nano-sized recess, for creating a mask layer for etching a nanoslit into an underlying layer, comprising the steps: providing a first layer of first material defining a first elongated recess extending along a first direction; and conformally depositing a second layer of second material onto the first layer such that the second material evenly covers boundaries of the first recess until the second layer defines a second nano-sized elongated recess extending along the first direction.

    2. Method according to claim 1, wherein the second nano-sized recess has a minimal diameter below 20 nm, below 10 nm, below 5 nm, below 3 nm, below 2.5 nm, below 2.25 nm, below 2.1 nm, below 2.0 nm, below 1.9 nm, below 1.85 nm, below 0.5 nm, or below 0.1 nm.

    3. Method according to claim 1, wherein the step of conformal depositing a second material comprises a method step selected from the group consisting of atomic layer deposition of the second material onto the first layer and/or low pressure chemical vapor deposition of the second material onto the first layer.

    4. Method according to claim 1, wherein the first recess has a minimal diameter between 10 nm and 50 nm, preferably between 10 nm and 20 nm; and/or wherein the boundaries of the first recess comprises at least a side-wall and a bottom-wall and the aspect ratio between a height of the side-wall and a width of the bottom-wall is larger than 1, preferably larger than 2.

    5. Method according to claim 4, wherein the step of providing a first layer comprises the steps of: providing the first material which is a first resist; and imprinting or structuring the first recess into the first resist, preferably by nano imprint lithography, optical lithography, and/or electron-beam lithography.

    6. Method according to claim 5, wherein the first resist comprises a material selected from the group consisting of an optical resist, UV curable organic materials such as epoxies acrylates, sol-gel materials, and any combination thereof.

    7. Method according to claim 6, wherein the second material is selected from the group consisting of SiO.sub.2, Al.sub.2O.sub.3, HfO.sub.2, TiO.sub.2, TiN, TaN, Si.sub.3N.sub.4 and any combination thereof.

    8. Method according to claim 1, wherein the second nano-sized recess has a minimal diameter below 5 nm.

    9. Method of creating a nanoslit into a graphene layer, comprising the steps: providing a graphene layer; providing the first layer and the second layer according to the method of claim 8 onto the graphene layer; and etching a nanoslit into the graphene layer, wherein the second layer defining the second nano-sized elongated recess acts as a mask layer for etching the nanoslit into the graphene layer.

    10. Method according to claim 9, wherein the step of etching a nanoslit into the graphene layer comprises reactive ion etching of the nanoslit into the graphene layer, wherein the second layer defining the second nano-sized recess acts as a mask layer for etching the nanoslit into the graphene layer.

    11. Method of creating a crossed-nanoslit device for sequencing molecules, comprising the steps: providing a third layer of a third material defining a third elongated recess extending along a second direction, the second direction being different than the first direction; conformally depositing a fourth layer of fourth material onto the third layer such that the fourth material evenly covers boundaries of the third elongated recess until the fourth layer defines a fourth elongated nano-sized recess; and providing a graphene layer according to the method of claim 9 onto the third layer such that the nanoslit of the graphene layer and the fourth channel-like structure cross each other.

    12. Method according to claim 11, wherein the third elongated recess in the third layer is provided by: covering the third layer with a second resist; imprinting or structuring a fifth elongated recess onto the second resist, preferably by nano imprint lithography, optical lithography, and/or electron-beam lithography; and etching the third recess into the third layer using the fifth layer defining the fifth elongated recess as a mask layer.

    13. Method according to claim 12, the method further comprising the step: after conformally depositing the fourth layer and before providing the graphene layer, removing a planar portion of the fourth layer and the second resist.

    14. Method according to claim 12, comprising the use of conformal deposition, preferably atomic layer deposition and/or low pressure chemical vapor deposition, for transforming a recess in a layer of material into a nano-sized recess.

    15. Mask layer for etching a nanoslit into a layer of material, the mask layer comprising: a first layer of first material defining a first elongated recess extending along a first direction; and a second layer of second material conformally deposited onto the first layer such that the second material evenly covers boundaries of the first recess and the second layer defines a second elongated nano-sized recess.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0062] FIG. 1A shows a flow-chart of a method according to an exemplary embodiment of the invention.

    [0063] FIGS. 1B and 1C each show a first layer according to an exemplary embodiment of the invention in a side view and in a top view, respectively.

    [0064] FIGS. 1D and 1E show a first layer and a second layer according to an exemplary embodiment of the invention in a side view and a top view, respectively.

    [0065] FIG. 2A shows a flow-chart for a method according to a further exemplary embodiment of the invention.

    [0066] FIG. 2B shows a first layer and a second layer that are deposited onto a graphene layer according to an exemplary embodiment of the invention.

    [0067] FIG. 2C shows the graphene layer with a nanoslit, wherein the first and second layers are used as a mask layer according to a further exemplary embodiment of the invention.

    [0068] FIG. 3A shows a flow-chart for a method according to a further exemplary embodiment of the invention.

    [0069] FIGS. 3B and 3C each show a crossed-nanoslit device according to an exemplary embodiment of the invention in a side view and a top view, respectively.

    [0070] FIGS. 4A to 4I each show a layered structure resulting from an intermediate step of the method of creating crossed-nanoslit device according to an exemplary embodiment of the invention.

    [0071] FIGS. 5A to 5G each show a layered structure resulting from an intermediate step of the method of creating crossed-nanoslit device according to an exemplary embodiment of the invention.

    [0072] FIGS. 6A and 6B each show a layered structure resulting from an intermediate step of the method of creating crossed-nanoslit device according to an exemplary embodiment of the invention.

    [0073] FIGS. 7A to 7F each show a layered structure resulting from an intermediate step of the method of creating crossed-nanoslit device according to an exemplary embodiment of the invention.

    [0074] It has to be noted that the figures are not drawn to the scale. Furthermore, if the same reference signs are used in different figures, they may refer to the same or similar elements. The same or similar elements may, however, also be designated by different reference signs.

    DETAILED DESCRIPTION OF EMBODIMENTS

    [0075] FIG. 1A shows a flow-chart of a method of creating a nano-sized recess according to an exemplary embodiment of the invention. The method comprises the first step S1 of providing a first layer of first material defining a first recess and step S2 of conformally depositing a second layer of second material onto the first layer such that the second material evenly covers boundaries of the first recess until the second layer defines a second nano-sized recess.

    [0076] According to an exemplary embodiment of the invention, the second nano-sized recess has a minimal diameter below 20 nm, preferably below 10 nm, more preferably below 5 nm, more preferably below 2 nm, and most preferably below 1 nm.

    [0077] According to an exemplary embodiment of the invention, the step of conformally depositing a second material comprises a method step selected from the group consisting of atomic layer deposition of the second material onto the first layer and/or low pressure chemical vapor deposition of the second material onto the first layer.

    [0078] According to a further exemplary embodiment of the invention, the first recess has a minimal diameter between 10 nm and 50 nm, preferably between 10 nm and 20 nm. Furthermore, the boundaries of the first recess comprise at least a side-wall and a bottom-wall and the aspect ratio between the height of the side-wall and the width of the bottom-wall is larger than 1, preferably larger than 2.

    [0079] According to a further exemplary embodiment of the invention, the step of providing a first layer comprises the steps of providing the first material which is a first resist, and of imprinting or structuring the first recess into the first resist, preferably by nano imprint lithography, optical lithography, and/or electron beam lithography.

    [0080] According to a further exemplary embodiment of the invention, the first resist comprises a material selected from the group consisting of an optical resist, UV curable organic materials such as epoxies acrylates, sol-gel materials, and any combination thereof. According to a further exemplary embodiment of the invention, the second material is selected from the group consisting of SiO.sub.2, Al.sub.2O.sub.3, HfO.sub.2, TiN, TaN, Si.sub.3N.sub.4 and any combination thereof.

    [0081] According to a further exemplary embodiment of the invention, the method is adapted for creating a mask layer for etching a nanoslit into another layer, wherein the first recess is a first elongated recess and the second nano-sized recess is a second elongated nano-sized recess. Furthermore, the first elongated recess and the second elongated nano-sized recess extend along a first direction.

    [0082] FIGS. 1B and 1C each show a first layer 100 according to an exemplary embodiment of the invention which may be obtained after carrying out step Si of the method described in the context of FIG. 1A. FIG. 1B shows a side view of the first layer 100 along the first direction 110 and FIG. 1C shows a top view of the first layer 100. The first layer 100 comprises a first recess 101. In this exemplary embodiment, the first recess 101 has an elongated shape and extends along the first direction 110. In FIG. 1B it is further shown, that the first recess 101 is shaped as a channel-like structure which has side-walls 102 and a bottom-wall 103. The minimal diameter of the first recess 106 corresponds to the width of the first recess that is shaped as a first channel-like structure. In FIG. 1B it is further shown that the side-wall 102 of the first recess has a height 104 and that the bottom-wall 103 of the first recess 101 has a width 105, wherein the width 105 designates the distance between the two side-walls 102 at the bottom-wall 103. In the present case, the aspect ratio of the height 104 of the side-wall 102 and the width 105 of the bottom-wall 103 is greater than 1.

    [0083] In FIGS. 1D and 1E, a first layer 100 and a second layer 107 are shown according to an exemplary embodiment of the invention, which are a result of carrying out steps S1 and S2 described in the context of FIG. 1A. It is shown that the second layer 107 conformally covers the surface of the first layer 100 including the first recess 101. As the second layer also evenly covers the side-wall 102 of the first recess 101, the second layer 107 defines a second recess 108 having a minimal diameter 109 that is diminished by twice the thickness of the second layer.

    [0084] FIG. 2A shows a flow-chart of a method of creating a nanoslit in a graphene layer according to a further exemplary embodiment of the invention. The method comprises step S3 of providing a graphene layer. Subsequently, the method comprises steps S1 and S2 of providing the first and second layer as described in the context of the method shown in FIG. 1A. Moreover, the method comprises the step S4 of etching a nanoslit into the graphene layer, wherein the second layer defining the second nano-sized elongated recess acts as a mask layer for etching the nanoslit into the graphene layer.

    [0085] According to an exemplary embodiment of the invention, the step of etching a nanoslit into the graphene layer comprises reactive ion etching of the nanoslit into the graphene layer, wherein the second layer defining the second nano-sized elongated recess acts as a mask layer for the reactive ion etching of the nanoslit into the graphene layer.

    [0086] In FIG. 2B, a graphene layer 200 as well as a first layer 100 and a second layer 107 according to an exemplary embodiment of the invention are shown that are obtained after carrying out steps S3, S1 and S2 of the method described in the context of FIG. 2A. The graphene layer 200 is provided according to method step S3 of the method described in the context of FIG. 2A. Subsequently, first and second layers 100 and 107, wherein the second layer 107 defines a second elongated recess 108, are provided onto the graphene layer 200. In order to not overload the drawing, the first recess, which surrounds the second recess 108, is not explicitly designated.

    [0087] In FIG. 2C, the graphene layer 200, the first layer 100 and the second layer 107 are shown after step S4 of the method described in the context of FIG. 2A is carried out. In method step S4, the second elongated nano-sized recess 108 is used as mask layer for etching the nanoslit 201 into the graphene layer 200. Thus, FIGS. 2B and 2C each show an etching layer 107 according to an exemplary embodiment of the invention before and after using it for etching the nanoslit 201 into the graphene layer 200.

    [0088] In FIG. 3A, a flow-chart of a method for creating a crossed-nanoslit device for sequencing molecules according to a further exemplary embodiment of the invention is shown. The method comprises step S6 of providing a third layer of third material defining a third elongated recess extending along a second direction, the second direction being different than the first direction. Furthermore, the method comprises the step S7 of conformally depositing a fourth layer of fourth material onto the third layer such that the fourth material evenly covers boundaries of the third elongated recess until the fourth layer defines a fourth elongated nano-sized recess. Subsequently, the method comprises method steps S3, S1, S2 and S4 of providing a graphene layer with a nanoslit onto the third layer such that the nanoslit of the graphene layer and the fourth channel-like structure cross each other.

    [0089] According to an exemplary embodiment of the invention, the third elongated recess in the third layer is provided by covering the third layer with a second resist, imprinting or structuring a fifth elongated recess onto the second resist, and etching the third recess into the third layer using the fifth layer defining the fifth elongated recess as a mask layer. According to an exemplary embodiment of the invention, the method comprises the step of removing a planar portion of the fourth layer and the second resist after conformally depositing the fourth layer and before providing the graphene layer.

    [0090] In FIGS. 3B and 3C, the result that is obtained after carrying out the method described in the context of FIG. 3A is shown according to an exemplary embodiment of the invention. FIG. 3B shows a side view along the second direction 304 and FIG. 3C shows a top view. In FIG. 3B it is shown that the lowest layer is the third layer 300, which for example comprises Si.sub.3N.sub.4. The third layer defines a third recess 301 and is provided by method step S6 described in the context of FIG. 3A. Onto the third layer 300, a fourth layer 302 is conformally deposited such that the fourth layer evenly covers the third layer 300 and also covers the boundaries of the third recess 301. In this way, the fourth layer 302 defines a fourth nano-sized recess 303. This fourth layer 302 is obtained after a carrying out method step S7 described in the context of FIG. 3A. Onto the fourth layer 302, a graphene layer 200, a first layer 100 and a second layer 107 are provided according to method steps S3, S1, S2, and S4 as described in the context of FIGS. 3A, 2A and 1A. In FIG. 3B, the first and second recesses of the first layer 100 and the second layer 107 as well as the nanoslit in the graphene layer 200 are not shown, because they extend along the first direction 110, which is perpendicular to the second direction 304, as can be gathered from FIG. 3C.

    [0091] In FIG. 3C it is further shown that the first recess 101 in the first layer and the nanoslit 201 in the graphene layer are perpendicular to the third and fourth recesses 301 and 303. Therefore, by providing such a crossed-nanoslit as shown in FIG. 3C, a nanopore emerges at the intersection point of the nanoslit 201 and the fourth recess 303.

    [0092] FIGS. 4A to 4I each show the result of an intermediate step of a method of creating a crossed-nanoslit device according to an exemplary embodiment of the invention. In FIG. 4A, a side view of a layered structure is shown which can be obtained after carrying out the method step S6 of the method described in FIG. 3A. FIG. 4B shows a top view of the same layered structure of FIG. 4A. The layered structure comprises a silicon layer 400 on which a silicon oxide layer 401 is located. Furthermore, using the terminology of the present application, a third layer 402, which for example is a layer of Si.sub.3N.sub.4, is provided on top of the silicon oxide layer 401. Furthermore, a second resist 403, for example a NIL resist, is provided on top of the third layer. As FIG. 4B shows the top view, only the second resist 403 is visible in FIG. 4B.

    [0093] In FIGS. 4C and 4D it is shown in a side view and a top view that a fifth recess 404 is imprinted or structured, e.g. by nano imprinting, onto the second resist 403. According to this exemplary embodiment, the fifth recess is a fifth channel-like structure which extends along the second direction 410.

    [0094] In FIGS. 4E and 4F, which show the side and top view of the same layered structure according to a further exemplary embodiment, it is shown that a third recess 405 is etched into the second resist 403 and the third layer 402. The third recess 405 is extending along the second direction 410 and is shaped as a channel-like structure.

    [0095] FIGS. 4G and 4H show a side view and a top view of the same layered structure which is obtained after conformally depositing a fourth layer 406 onto the second resist 403, the third layer 402, and the third recess 405 such that the fourth layer 406 evenly covers the boundaries of the third recess. It shall be noted that the fourth layer 406 is only schematically drawn and that a conformally deposited layer may have a different shape. The layer 406 at the top of the nanoslit 407 may for example not define such edges as it is shown in FIG. 4G. In this way, the fourth layer 406 defines a fourth elongated nano-sized recess 407 which is located within the third recess 405. This fourth layer 406 may for example be conformally deposited by ALD or LPCVD and may for example comprise SiO.sub.2.

    [0096] In FIG. 4I it is shown that a planar portion of the fourth layer 406 is removed, for example by reactive ion etching such that the fourth layer 406 only covers the walls of the third channel-like structure and defines a fourth nano-sized channel-like structure 407. Furthermore, a portion of the fourth layer 406 covering the bottom of the fourth nano-sized channel-like structure 407 is removed. In FIG. 4K it is shown that the second resist 403 is removed, for example by stripping the NIL resist 403, such that only the third layer 402 remains which comprises the third recess 405 whose walls are evenly covered with the fourth layer 406 such that the fourth layer 406 defines the fourth nano-sized recess 407.

    [0097] However, it shall be noted that the steps shown in FIGS. 4I and 4K may be optional. Thus, the graphene layer and the further layers may be directly applied onto the fourth layer, which may be a SiO.sub.2 layer. Thus, it may be not necessary for removing the planar portion of the fourth layer 406 and for stripping the second resist 403.

    [0098] As an alternative to the method steps shown in FIGS. 4E to 4K, the fourth nano-sized channel-like structure may also be etched into the third layer using an etching mask. In this case, the fourth layer would be conformally deposited onto the second resist 403 directly after imprinting the fifth recess 404 into the second resist 403 as it is shown in FIG. 4C. Thus, the second resist with the fourth layer conformally deposited on top, would be the etching mask. This etching mask then is used for directly etching the fourth nano-sized channel-like structure 407 into the third layer.

    [0099] FIGS. 5A to 5G show that a graphene layer with a nanoslit is provided onto the third and fourth layers shown in FIGS. 4A to 4K according to an exemplary embodiment of the invention.

    [0100] FIG. 5A shows that a graphene layer 500 is provided onto the third layer 402. It shall be noted that the graphene layer is not drawn to the scale and that it may be much thinner (e.g. a monolayer) than what is shown in FIG. 5A. In this view, the fourth recess 407 is not visible because the side view shown in FIG. 5A is along the first direction, which is perpendicular to the second direction along which the fourth nano-sized recess extends. In FIG. 5B, it is shown that a first layer 501 is provided onto the graphene layer 500, wherein the first layer 501 defines a first recess 502. The first layer 501 may be an NIL resist, wherein the first recess 502 may be imprinted by nano imprinting. FIG. 5C shows a top view of the layered structure shown in FIG. 5B. It can be seen that the first recess 502 is an elongated first recess or a first channel-like structure which extends along the first direction 503 that is perpendicular to the second direction 410.

    [0101] In FIG. 5D it is shown that a second layer 504 is conformally deposited onto the first layer 501 comprising the first recess 502 such that the second layer 504 defines a second nano-sized recess 505. In this step, the high control conformal deposition, for example ALD or LPVCD, causes the first recess 502 to be narrowed by twice the thickness of the second layer 504. FIGS. 5E and 5F show a side view and a top view of the layered structure where the nanoslit 506 is etched into the graphene layer 500 and where a planar portion of the second layer 504 is removed from the first layer 501. Because the nanoslit 506 in the graphene layer 500 and the fourth nano-sized recess in the fourth layer 406 cross each other, a nanopore 509 emerges at the crossing point of the nanoslit and the fourth nano-sized recess.

    [0102] In FIG. 5G, it is shown that, optionally, a further protection polymer layer 507 is provided onto the first layer 501, for example by spincoating or other process. This may however not be necessary as already the first layer 501 may protect the graphene layer 500.

    [0103] Thus, the first layer 501 additionally provides a protection for the graphene layer 500. I.e. it may additionally have the effect that the buffers which may be provided in the overall sequencing device to maintain the nucleic acids (or proteins in protein sequencing) will not react or deteriorate the graphene layer (which may be a monolayer) and thereby limit the lifetime and performance of the crossed-slit nanopore device. Furthermore, it may prevent that a large shunt current through the buffer solution from one end of the crossed-slit nanopore device to the other whereby the signal measured from the tunneling (when a nucleic acid is in the nanopore device) would be overwhelmed by this background/shunting current. This is further described in paragraphs [0073] and [0074] of US 2014/0349892 A1.

    [0104] FIGS. 6A and 6B show further intermediate results when creating a crossed-nanoslit device according to an exemplary embodiment of the invention. In FIG. 6A it is shown that the back side of the silicon wafer 400 and the silicon oxide wafer 401 is opened such that a nanopore extending from one side of the first layer 501 to the other side of wafer is created. In FIG. 6B, it is shown that the polymer layer is removed, for example by washing and by supercritical drying or depolymerizing.

    [0105] In FIGS. 7A to 7F, intermediate results of an alternative method of creating a crossed-slit device according to an exemplary embodiment are shown, where an alternative wafer is provided. In FIG. 7A it is shown that the wafer comprises a silicon layer 400 and a silicon oxide layer 401 which comprises a microfluidic channel 700. In FIGS. 7C and 7D it is shown in a side view and a top view that the microfluidic channel is filled up with a polymer 701 and that it is planarized. FIG. 7B shows a top view of the structure shown in FIG. 7A. Subsequent to providing the wafer shown in FIGS. 7A to 7D, a crossed nanoslit arrangement is provided onto the wafer as shown in FIGS. 4A to 4K and 5A to 5G.

    [0106] In FIG. 7E, the layered structure is shown according to an exemplary embodiment, after the different layers are provided onto the wafer as shown in FIGS. 4A to 4K and 5A to 5G. In other words, the structure shown in FIG. 7E is the same as the one shown in FIG. 5G apart from the feature that the silicon oxide layer 401 comprises the microfluidic channel filled with the polymer 701. The polymer 701 may be a sacrificial polymer layer which is later removed, for example a layer of polymers, of PMMA, of poly-styrene, or of a cross-linked polymer that can be removed later by oxygen ions or oxygen radicals. In FIG. 7F it is shown that the polymer is removed from the top of the first and second layers 501, 504 and is also removed from the microfluidic channel 700. In this way, a nanopore emerges between the first layer and the microfluidic channel.

    [0107] Further features which may be provided for creating a crossed-slit device may be described in US 2014/0349892 A1.

    [0108] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. The invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word “comprising” does not exclude other elements or steps, and the indefinite article “a” or “an” does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope.