Measurement of current within a conductor
11022630 · 2021-06-01
Assignee
Inventors
- Hengxu Ha (Stafford, GB)
- Celso Souza (Santa Catarina, BR)
- Davi Bernardi (Santa Catarina, BR)
- Xianwu Zeng (Stafford, GB)
- Elias Bencz (Santa Catarina, BR)
Cpc classification
G06F7/64
PHYSICS
G01R19/2509
PHYSICS
G01R19/16528
PHYSICS
G01R19/16571
PHYSICS
International classification
G01R19/00
PHYSICS
G06F7/64
PHYSICS
Abstract
In the field of Rogowski coils for the measurement of current within a conductor there is provided an electrical interface for connection to a Rogowski coil arranged around a primary conductor. The electrical interface includes an input that is configured to sample an input voltage signal from the Rogowski coil. The electrical interface also has an integrator circuit which includes an integrator module that is configured to integrate the sampled input voltage signal to provide an output voltage signal from which can be derived a primary current flowing through the primary conductor. The integrator module employs a transfer function that includes an attenuation factor.
Claims
1. An electrical interface, for connection to a Rogowski coil arranged around a primary conductor, comprising: an input configured to sample an input voltage signal from the Rogowski coil; and an integrator circuit including an integrator module configured to integrate the sampled input voltage signal to provide an output voltage signal from which can be derived a primary current flowing through the primary conductor, the integrator module employing a transfer function that includes an attenuation factor, and the integrator module further employs the transfer function or a different transfer function which additionally down-samples a previous output voltage signal.
2. The electrical interface according to claim 1, wherein the attenuation factor gives rise to an error in the derived primary current flowing through the primary conductor that is not greater than a predetermined percentage selected according to the nature of the primary current flowing through the primary conductor.
3. The electrical interface according to claim 2, wherein the percentage error in the derived primary current is selected to be: not greater than 10% when the primary current is decaying; and not greater than 0.3% when the primary current is in steady state.
4. The electrical interface according to claim 1, wherein the integrator module is or includes one or more of: a first rectangular integrator embodying a transfer function in the discrete time domain of the form
5. The electrical interface according to claim 1, wherein the integrator circuit additionally includes at least one averaging module arranged in communication with the output of the integrator module, the at least one averaging module being configured to calculate an average output voltage signal over one or more operating cycles of an electrical system of which the primary conductor forms a part and to subtract the said calculated average output voltage from the output voltage signal provided by the integrator module to establish a corrected output voltage signal.
6. The electrical interface according to claim 5, wherein the integrator circuit further includes a disturbance detector configured to detect a rise in current flowing through the primary conductor and thereafter suspend operation of the at least one averaging module while the disturbance remains.
7. The electrical interface according to claim 6, wherein the disturbance detector is configured to determine the absolute value of the sampled input voltage signal and to detect a rise in current flowing through the primary conductor when the absolute value of the sampled input voltage signal exceeds a predetermined threshold.
8. The electrical interface according to claim 5, wherein the integrator circuit still further includes a reconstruction module which is configured to derive the primary current flowing through the primary conductor by multiplying the corrected output voltage signal by a gain factor.
9. The electrical interface according to claim 8, wherein the reconstruction module is also configured to modify the corrected output voltage signal to compensate for errors arising from the attenuation factor.
10. The electrical interface according to claim 9, wherein the reconstruction module carries out one or more of phase compensation and steady state input signal compensation.
11. The electrical interface according to claim 8, wherein the reconstruction module is also configured to modify the gain factor according to a measured temperature of the electrical interface.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) There now follows a brief description of embodiments of the invention, by way of non-limiting example, with reference being made to the following figures in which:
(2)
(3)
DETAILED DESCRIPTION
(4) An electrical interface according to a first embodiment of the invention is designated generally by reference numeral 30, as shown in
(5) The electrical interface 30 includes an input 32 which is configured to sample an input voltage signal u.sub.s(n) from a Rogowski coil 10 that is arranged around a primary conductor 16.
(6) The input 32 operates at a very high sampling frequency, which is typically many tens of thousands of samples per second and may, for example, be 64,800 Hz which gives a sampling period T.sub.s of 1/64800 seconds, i.e. 0.0000155 seconds.
(7) The electrical interface 30 also includes an integrator circuit 34 which, in turn, includes an integrator module 36 that in the embodiment shown is a digital integrator module 36, i.e. is an integrator module which operates in the discrete time, or digital domain.
(8) The integrator module 36 is configured to integrate the sampled input voltage signal u.sub.s(n) to provide an output signal u.sub.INT(n) from which can be derived the primary current i.sub.p(n) flowing through a primary conductor 16 around which an associated Rogowski coil 10 is, in use, arranged.
(9) The integrator module 36 employs a transfer function that includes an attenuation factor A. The attenuation factor A is chosen such that the error in the derived primary current i.sub.p(n) flowing through the primary conductor 16 is not greater than a predetermined percentage which is selected according to the nature of the primary current i.sub.p flowing through the primary conductor 16.
(10) For example, in circumstances when the primary current i.sub.p is decaying then the percentage error is selected to be not more than 10%. When the primary current i.sub.p is in steady state, i.e. neither increasing nor decreasing, then the percentage error in the derived primary current i.sub.p(n) is selected to be not more than 0.3%.
(11) The integrator module 36 also employs a transfer function which additionally down-samples a previous output voltage signal u.sub.INT(n), i.e. a feedback output voltage signal as part of its operation.
(12) More particularly, in the embodiment shown the integrator module 36 adopts a rectangular approximation of the required integration as set out in the following frequency expression:
u.sub.INT(n)=K.sub.1u.sub.INT(n−N.sub.d)+u.sub.s(n)
(13) where,
(14) u.sub.INT(n) is the output voltage signal generated by the integrator module 36;
(15) u.sub.s(n) is the sampled input voltage signal from the associated Rogowski coil 10;
(16) N.sub.d is the down-sampling scale which, by way of example, is 16;
(17) T.sub.s is the sampling period of the input voltage signal u.sub.s(n) which, for an exemplary sampling frequency of 64,800 Hz is given by 1/64,800, i.e. 0.00000155 seconds; and
(18) K.sub.1 is given by
K.sub.1=e.sup.−AN.sup.
(19) with,
(20) A being the attenuation factor which, by way of example, is 0.5.
(21) Other values for the down-sampling scale N.sub.d, sampling period T.sub.s, and attenuation factor A, may be used in other embodiments of the invention.
(22) In view of the above-mentioned frequency expression, the integrator module 36 can be said to define a rectangular integrator that embodies a transfer function in the discrete time domain of the form
(23)
(24) Accordingly, utilising the example values indicated above, the maximum output of the transfer function will be
(25)
(26) This compares to a maximum output of 129,600 for a conventional integrator which omits both an attenuation factor and the down-sampling of a previous output voltage signal. Such a large potential maximum output, which is an order of magnitude greater than that achieved by the first embodiment of the invention, means that the conventional integrator will very quickly magnify any error in the sampled input voltage signal, particularly at very high sampling frequencies (i.e. many tens of thousands of samples per second), and will therefore become saturated. As a consequence the accuracy of the output of such a conventional integrator is also lost.
(27) In the meantime, an attenuation factor of 0.5 means that a DC offset in the sampled input voltage signal u.sub.s(n) with a decaying time constant of 275 milliseconds results in an error in the derived primary current i.sub.p(n) that is less than 10%.
(28) In other embodiments of the invention (not shown) the integrator module 36 may adopt a more accurate trapezoidal approximation of the required integration, e.g. as set out in the following frequency expression:
(29)
(30) Such an integrator module 36 therefore defines a trapezoidal integrator which embodies a transfer function in the discrete time domain of the form
(31)
(32) The integrator module 36 may also adopt a Taylor's approximation of the required integration, e.g. as set out in the following frequency expression:
u.sub.INT(n)=K.sub.1u.sub.INT(n−N.sub.d)+{u.sub.S(n)+.sup.4u.sub.S(n−N.sub.d/2)+u.sub.S(n−N.sub.d)}/6
(33) Such an integrator module 36 therefore defines a Taylor's approximation integrator which embodies a transfer function in the discrete time domain of the form
(34)
(35) In still further embodiments of the invention the integrator module could define a second rectangular integrator (which is more accurate than the first rectangular integrator mentioned hereinabove) that embodies a transfer function in the discrete time domain of the form
(36)
(37) Returning to the embodiment shown in
(38) Each averaging module 38, 40 is configured to calculate an average output voltage signal over one operating cycle of an electrical system of which the primary conductor 16 forms a part, and to subtract the calculated average output voltage from the output voltage signal u.sub.INT(n) provided by the integrator module 36 to establish a corrected output voltage signal u.sub.pp(n).
(39) More particularly, the first averaging module 38 subtracts the calculated average output voltage directly from the output voltage signal u.sub.INT(n) provided by the integrator module 36 and the second averaging module 40 subtracts the calculated average voltage from the modified output of the first averaging module 38 to establish the corrected output voltage signal u.sub.pp(n).
(40) In other embodiments of the invention the integrator circuit may include fewer than or more than two series-connected averaging modules. One or more of the averaging modules may also calculate an average output voltage over more than one operating cycle of the electrical system of which the primary conductor forms a part.
(41) By way of example one or more of the averaging modules 38, 40 may employ a first method of calculating the average output voltage according to
(42)
(43) where,
(44) y(n) is the calculated average voltage; and
(45) N is the number of samples per cycle of fundamental frequency f.sub.0 of the electrical system of which the primary conductor 16 forms a part, with N being given by
(46)
(47) which, using the example values set out above and a fundamental frequency f.sub.0 of 50 Hz, gives
(48)
(49) One or more of the averaging modules 38, 40 may also employ a second method of calculating the average output voltage according to
(50)
(51) where N is again given by
(52)
(53) One or more of the averaging modules 38, 40 might still further employ a third method of calculating the average output voltage according to
(54)
(55) where,
h(n)=h(n−1)+x(n); and
(56) N is given by
(57)
(58) In addition to the foregoing the integrator circuit 34 also includes a disturbance detector 42 that is configured to detect a disturbance in the current flowing through the primary conductor 16 and thereafter suspend operation of the first and second averaging modules 38, 40 while the disturbance remains.
(59) Such suspension of the operation of the first and second averaging modules 38, 40 means that neither subtracts the calculated average voltage signal from the output voltage signal u.sub.INT(n) generated by the integrator module 36, and so the extent to which any DC voltage offset is removed from the output voltage signal u.sub.INT(n) is frozen, and thereby is unaffected by the disturbance.
(60) The disturbance detector 42 detects a disturbance in the current flowing through the primary conductor 16 by determining the absolute value of the sampled input voltage signal u.sub.s(n), e.g. the maximum absolute value of the sampled input voltage signal u.sub.s(n) over the previous operating cycle of the electrical system of which the primary conductor 16 forms a part, and establishing that a rise in current has occurred (which is indicative of there being a disturbance in the current flowing in the primary conductor 16) when the absolute value of the sample input voltage exceeds a predetermined threshold.
(61) The integrator circuit 34 also includes a reconstruction module 44 which is configured to derive the primary current i.sub.p(n) flowing in the primary conductor 16 by multiplying the corrected output voltage signal u.sub.pp(n), i.e. as output by the second averaging module 40, by a gain factor K.sub.L(T.sub.c).
(62) The reconstruction module 44 also, first of all, modifies the corrected output voltage u.sub.pp(n) to compensate for errors arising from the attenuation factor A.
(63) More particularly, the reconstruction module 44 carries out phase compensation N.sub.comp and steady state input signal compensation A.sub.comp to produce a modified corrected output voltage signal i.sub.pp(n) according to
i.sub.PP(n)=A.sub.compu.sub.PP(n−N.sub.comp)
(64) where,
(65) N.sub.comp is the number of samples for phase compensation and is given by
(66)
and
(67) A.sub.comp is the compensation value for the steady state input signal which is given by
(68)
with,
(69) ω.sub.0 being the angular frequency of the associated electrical system of which the primary conductor 16 is a part, which is given by ω.sub.0=2πf.sub.0 (with f.sub.0 being the fundamental frequency of the associated electrical system which, as given above by way of example is 50 Hz, but might also be 60 Hz).
(70) Thereafter the reconstruction module 44 derives the primary current i.sub.p(n) flowing in the primary conductor 16 by multiplying the modified corrected output voltage signal i.sub.pp(n) according to the following
i.sub.P(n)=K.sub.L(T.sub.c)i.sub.PP(n)
(71) where,
(72) K.sub.L(T.sub.c) is the gain factor which is given by
K.sub.L(T.sub.c)=K.sub.0+α(T−T.sub.0)+β(T−T.sub.0).sup.2
with,
(73) K.sub.0 being 1/L.sub.Rogow which is a characteristic of the Rogowski coil 10 that is determined under laboratory conditions at a standard temperature T.sub.0 of 20° C.;
(74) α and β being temperature dependent coefficients; and
(75) T being a measured temperature of the electrical interface 30.