Solar Cell Component and Solar Panel

20210167237 · 2021-06-03

Assignee

Inventors

Cpc classification

International classification

Abstract

The application discloses a solar cell component including at least two chip sets connected in series, wherein each chip set includes a plurality of chip units connected in parallel and a bypass diode connected in parallel with the chip units, each chip unit includes one or more photovoltaic chips connected in series, positive poles of the bypass diodes are connected with negative poles of the chip units, and negative poles of the bypass diodes are connected with positive poles of the chip units. The application further provides a solar panel with the solar cell component. The application not only can reduce the number of the bypass diodes, but also can improve economy of the product.

Claims

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12. (canceled)

13. A solar cell component, comprising: at least two chip sets connected in series, wherein each chip set comprises a plurality of chip units connected in parallel and a bypass diode connected in parallel with the chip units, each chip unit comprises one or more photovoltaic chips connected in series, positive poles of the bypass diodes are connected with negative poles of the chip units, and negative poles of the bypass diodes are connected with positive poles of the chip units.

14. The solar cell component of claim 13, wherein the photovoltaic chip is a Copper Indium Gallium Selenide thin film double-glazed module chip.

15. The solar cell component of claim 13, wherein the photovoltaic chip is a thin film solar cell chip.

16. The solar cell component of claim 13, wherein the photovoltaic chip is a crystalline silicon solar cell chip.

17. The solar cell component of claim 13, wherein the photovoltaic chip is an amorphous silicon solar cell chip.

18. The solar cell component of claim 13, wherein each chip set comprises three chip units, and each chip unit comprises two photovoltaic chips.

19. The solar cell component of claim 18, wherein there are 18 chip sets.

20. The solar cell component of claim 19, wherein a maximum reverse working current of the bypass diode is more than or equal to 15 A.

21. A solar panel, comprising: a solar cell component, a negative electrode and a positive electrode, wherein the solar cell component comprising at least two chip sets connected in series, wherein each chip set comprises a plurality of chip units connected in parallel and a bypass diode connected in parallel with the chip units, each chip unit comprises one or more photovoltaic chips connected in series, positive poles of the bypass diodes are connected with negative poles of the chip units, and negative poles of the bypass diodes are connected with positive poles of the chip units, the negative electrode and the positive electrode are both arranged on lower surfaces of photovoltaic chips, or the negative electrode is arranged on upper surfaces of the photovoltaic chips, and the positive electrode is arranged on the lower surfaces of the photovoltaic chips; the negative electrode is connected with a negative pole of the solar panel by a first conducting bar and a first bus-bar, and the positive electrode is connected with a positive pole of the solar panel by a second conducting bar and a second bus-bar; and an insulating film is further placed between the first conducting bar and/or the second conducting bar and the solar cell component.

22. The solar panel of claim 21, wherein the photovoltaic chip is a Copper Indium Gallium Selenide thin film double-glazed module chip.

23. The solar panel of claim 21, wherein the photovoltaic chip is a thin film solar cell chip.

24. The solar panel of claim 21, wherein the solar cell component is irradiated with incident light perpendicular to the solar cell component to obtain a shadow region, and the first conducting bar and/or the second conducting bar are arranged in the shadow region.

25. The solar panel of claim 21, wherein adjacent chip sets are connected by metal sheets.

26. The solar panel of claim 21, wherein bypass diodes of the adjacent chip sets are connected in series.

27. The solar panel of claim 26, wherein the bypass diodes connected in series in the adjacent chip sets are electrically connected by connecting strips.

28. The solar panel of claim 27, wherein the connecting strips are copper strips.

29. The solar panel of claims 21, wherein the first conducting bar is connected with the first bus-bar in a welding manner; and the second conducting bar is connected with the second bus-bar in the welding manner.

30. The solar panel of claims 21, wherein the first bus-bar is arranged on one side of an upper surface of the solar cell component, and the second bus-bar is arranged on one side of a lower surface of the solar cell component.

31. The solar panel of claims 30, wherein the second bus-bar is arranged in an opposite direction with the first bus-bar.

32. The solar panel of claims 30, wherein the second bus-bar is arranged in the same direction with the first bus-bar.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to describe the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings required to be used in the embodiments will be simply introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in the application. Those of ordinary skilled in the art may further obtain other accompanying drawings according to these accompanying drawings.

[0024] FIG. 1 is a schematic diagram of a solar cell component according to an embodiment of the application;

[0025] FIG. 2 is a rear view of a solar panel according to an embodiment of the application; and

[0026] FIG. 3 is an enlarged schematic diagram of a connecting structure between bypass diodes and photovoltaic chips in a solar panel according to an embodiment of the application.

DETAILED DESCRIPTION OF THE APPLICATION

[0027] In order to make the solutions of the embodiments of the application understood by those skilled in the art better, the embodiments of the application will be further described below in combination with the accompanying drawings and implementation modes in detail.

[0028] FIG. 1 is a schematic diagram of a solar cell component according to an embodiment of the application.

[0029] The solar cell component includes at least two chip sets connected in series. As shown in FIG. 1, each chip set includes a plurality of chip units connected in parallel and a bypass diode connected in parallel with the chip units, and each chip unit includes one or more photovoltaic chips connected in series. In FIG. 1, each chip unit includes two photovoltaic chips connected in series. Positive poles of the bypass diodes are connected with negative poles of the chip units, and negative poles of the bypass diodes are connected with positive poles of the chip units.

[0030] In the solar cell component provided by the application, the photovoltaic chips are connected in series at first to obtain the chip units, then the plurality of chip units are connected in parallel, the plurality of chip units being connected in parallel with only one bypass diode, to obtain the chip sets, and the plurality of chip sets are connected in series, so as to obtain the solar cell component of the application. As shown in FIG. 1, the first chip set includes a first chip unit, a second chip unit, a third chip unit and a first bypass diode, wherein each of the first chip unit, the second chip unit and the third chip unit includes two photovoltaic chips, the three chip units are connected in parallel, and the three chip units are all connected in parallel with the first bypass diode. If a “hot spot” phenomenon occurs to the photovoltaic chips of a certain chip unit in a chip set, the photovoltaic chips in the other chip units may work normally without influence of the “hot spot” phenomenon. For example, if the photovoltaic chips of the first chip unit in the first chip set are burned out, the photovoltaic chips of the second chip unit and the third chip unit may work normally without influence of the first chip unit. Normal work of the whole solar cell component is further ensured. Preferably, the number of the photovoltaic chips in a single chip unit may be two, three, four, five and the like, and further preferably, the number of the photovoltaic chips in a single chip unit is two; and the number of the chip units in a chip set may be two, three, four and the like, and further preferably, the number of the chip units in a chip set is three. Preferably, the numbers of the photovoltaic chips in different chip units in a chip set are the same. It is necessary to note that the number of the chip sets in the solar cell component is not specifically limited in the application. Preferably, the number of the chip sets in the solar cell component may be any numerical value in 2-20.

[0031] During practical application, the number of practically required chip sets may be increased and decreased according to a requirement. When a plurality of such chip sets are required, the plurality of chip sets are sequentially connected in series, as shown in FIG. 1. Moreover, each chip unit may include only one photovoltaic chip, and may also include a plurality of photovoltaic chips connected in series. For example, three photovoltaic chips connected in series may form a chip unit, every three such chip units form a chip set, and 18 chip sets connected in series form a solar cell component. In addition, a working parameter of each bypass diode may also be set according to a practical application requirement, and for example, a maximum reverse working current is more than or equal to 15 A. Of course, the foregoing chips connected in series and in parallel may be adaptively added and reduced according to different currents and voltages required to be provided according to the practical application, actual model numbers, parameters and the like of the bypass diodes may correspondingly be selected according to the practical requirement, and there are no limits made in the application.

[0032] Series and parallel connection are combined by providing series connection within parallel connection and parallel connection within series connection. By such a structural design, a plurality of chip units share the same bypass diode, and when any chip unit in each chip set is covered and cannot work, a hot spot effect may be avoided by the bypass diode in the chip set, so that the number of the bypass diodes is effectively reduced to reduce cost and improve reliability of the component.

[0033] In the solar cell component structure of the application, the photovoltaic chips may be applied to various types, for example, a CIGS thin film double-glazed module chip, a thin film solar cell chip, a crystalline silicon solar cell chip and an amorphous silicon solar cell chip.

[0034] Correspondingly, the embodiments of the application further provide a solar panel with the foregoing solar cell component structure. FIG. 2 is a rear view of a structure of the solar panel.

[0035] The solar panel of the application includes the foregoing solar cell component, a negative electrode and a positive electrode, wherein the negative electrode and the positive electrode may both be arranged on lower surfaces of photovoltaic chips, or the negative electrode may be arranged on upper surfaces of the photovoltaic chips, and the positive electrode is arranged on the lower surfaces of the photovoltaic chips. In the structure shown in FIG. 2, the negative electrode and the positive electrode are both arranged on the lower surfaces of the photovoltaic chips. The negative electrode and the positive electrode are configured to extract currents.

[0036] As shown in FIG. 2, the negative electrode is connected with a negative pole of the solar panel by a first conducting bar 11 and a first bus-bar 12, the first conducting bar 11 is arranged in a region of the solar cell component, and the first bus-bar 12 is arranged on one side of an upper surface of the solar cell component; and the positive electrode is connected with an positive pole of the solar panel by a second conducting bar 21 and a second bus-bar 22, the second conducting bar 21 is arranged in the region of the solar cell component, and the second bus-bar 22 is arranged on one side of a lower surface of the solar cell component and is arranged in an opposite direction or the same direction with the first bus-bar 21.

[0037] It is necessary to note that, during practical application, the first conducting bar 11 may be arranged on the upper surfaces of the photovoltaic chips and may also be arranged on the lower surfaces of the photovoltaic chips, and the second conducting bar 21 may be arranged on the lower surfaces of the photovoltaic chips. Correspondingly, for avoiding contact between the conducting bars and the photovoltaic chips, an insulating film may be placed between the first conducting bar and/or the second conducting bar and the solar cell component.

[0038] As mentioned above, there may be a plurality of chip sets according to the application requirement, and under such a circumstance, adjacent chip sets may be connected by metal sheets 31, as shown in FIG. 2. Similarly, bypass diodes 40 in the adjacent chip sets are connected by metal sheets 32 with the photovoltaic chips electrically connected therewith, as shown in FIG. 3.

[0039] In addition, the bypass diodes connected in series in the adjacent chip sets may be connected by connecting strips (for example, copper strips).

[0040] It is necessary to note that the first conducting bar 11 may be connected with the first bus-bar 12 in a welding manner and the second conducting bar 21 may also be connected with the second bus-bar 22 in the welding manner.

[0041] According to the solar cell component and solar panel provided by the embodiments of the application, the photovoltaic chips are grouped, series and parallel connection are combined by providing series connection within parallel connection and parallel connection within series connection, and the plurality of chip units connected in parallel in each chip set share the same bypass diode, so that the number of the bypass diodes is greatly reduced, and it will not only effectively reduce cost, but also improve economic benefits.

[0042] The embodiments of the application are introduced above in detail. The application is elaborated with specific implementation modes in the text, and the above descriptions about the embodiments are merely adopted to help the design of the application to be understood. In addition, those of ordinary skilled in the art may make variations to the specific implementation mode and the scope of application according to the concept of the application. From the above, the contents of the description should not be understood as limits to the application.