Semiconductor body

Abstract

A semiconductor body is disclosed. In an embodiment a semiconductor body includes a p-doped region, an active region, an intermediate layer and a layer stack containing indium, wherein an indium concentration in the layer stack changes along a stacking direction, wherein the layer stack is formed with exactly one nitride compound semiconductor material apart from dopants, wherein the intermediate layer is nominally free of indium, arranged between the layer stack and the active region, and directly adjoins the layer stack, wherein the intermediate layer and/or the layer stack are n-doped at least in places, wherein a dopant concentration of the layer stack is at least 5*10.sup.17 1/cm.sup.3 and at most 2*10.sup.18 1/cm.sup.3, and wherein a dopant concentration of the intermediate layer is at least 2*10.sup.18 1/cm.sup.3 and at most 3*10.sup.19 1/cm.sup.3.

Claims

1. A semiconductor body comprising: a p-doped region; an active region; an intermediate layer; and a layer stack containing indium, wherein an indium concentration in the layer stack changes along a stacking direction, wherein the layer stack is formed with exactly one nitride compound semiconductor material apart from dopants, wherein the intermediate layer is nominally free of indium, arranged between the layer stack and the active region, and directly adjoins the layer stack, wherein the intermediate layer and/or the layer stack are n-doped at least in places, and wherein an indium concentration in a second region of the layer stack increases at least to a threshold value in a direction of the intermediate layer and decreases below the threshold value again in the layer stack only within a first region.

2. The semiconductor body according to claim 1, wherein the second region of the layer stack directly adjoins the first region of the layer stack.

3. The semiconductor body according to claim 1, wherein the active region is configured to generate or detect electromagnetic radiation.

4. The semiconductor body according to claim 1, wherein a layer thickness of the layer stack in the stacking direction is at least 5 nm and less than 20 nm.

5. The semiconductor body according to claim 1, wherein the indium concentration in the layer stack is less than 5%.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the following, semiconductor bodies described here are explained in more detail in connection with exemplary embodiments and the corresponding figures.

(2) FIG. 1 shows a schematic cross-section through a semiconductor body according to an exemplary embodiment.

(3) FIGS. 2 to 6 show schematic cross-sections through a semiconductor body according to further exemplary embodiments.

(4) Identical, similar or equivalent elements are provided with the same reference signs in the figures. The figures and the proportions of the elements depicted in the figures are not to be regarded as true to scale. Rather, individual elements may be represented exaggeratedly large for better representability and/or better comprehensibility.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

(5) FIG. 1 shows a schematic cross-section through a semiconductor body 10. The semiconductor body 10 comprises a layer stack 41, to which an intermediate layer 40 is applied. An active region 30 is applied to the intermediate layer 40. In addition, the semiconductor body 10 comprises a p-doped region 20 applied to the active region 30.

(6) The layer stack 41 has a first region 42, which directly adjoins the intermediate layer 40. Furthermore, the layer stack 41 has a second region 43 which is arranged on the side of the layer stack 41 facing away from the first region 42. Between the first region 42 and the second region 43 there is a third region 44. The layer stack 41 is formed with exactly one nitride compound semiconductor material apart from dopants. One nitride compound semiconductor material means that the layer stack may contain impurities or foreign atoms with a concentration of less than 5%. The layer stack preferably contains impurities or foreign atoms with a concentration of less than 1%. The layer stack 41 also contains indium.

(7) The indium concentration in the layer stack 41 is not constant. In the second region 43 the indium concentration increases to above a threshold value in a stacking direction z. The stacking direction z is perpendicular to the lateral extent of the semiconductor body 10. Preferably, the indium concentration in the second region 43 increases from a minimum value of <1% or preferably <0.5% to above the threshold value. FIG. 1 shows the stacking direction z of the semiconductor body 10 on the z-axis and the indium concentration in the layer stack 41 on the y-axis. Thus, the indium concentration increases continuously in the second region 43. In the third region 44 of the layer stack 41, the indium concentration is constant. In the first region 42 of the layer stack 41, the indium concentration decreases below the threshold value again. In this case the indium concentration decreases continuously. Preferably the indium concentration in the first region 42 decreases to a minimum value of <1% or preferably <0.5%. For example, the threshold value of the indium concentration may be at least 1.5% and at most 4.9%. Preferably, the threshold value is at least 2% and at most 3%. Since the indium concentration is relatively low, the layer stack 41 can be grown with an improved quality, i.e., with less tensions and dislocations.

(8) For example, the indium concentration can be changed in the first region 42 and in the second region 43 by changing the temperature, growth rate or pressure during the growth of the stack 41 and the supply of indium.

(9) The layer stack 41 can be formed with InGaN, for example, and be n-doped at least in places. For example, the layer stack 41 can be doped with silicon.

(10) The layer stack 41 may have a thickness of at least 5 nm and at most 150 nm. The first region 42 and the second region 43 can each have a thickness of less than 5 nm.

(11) The intermediate layer 40 directly adjoins the layer stack 41 and is arranged between the layer stack 41 and the active region 30. The intermediate layer 40 is nominally free of indium. This means that no indium is provided during the growth of the intermediate layer 40. However, it is possible that indium from adjacent layers is incorporated into the intermediate layer 40. The intermediate layer 40 can be formed with GaN. In addition, the intermediate layer 40 can be n-doped in partial areas. The dopant concentration in the intermediate layer 40 may be at least 2*10.sup.18 1/cm.sup.3 and at most 3*10.sup.19 1/cm.sup.3. The layer stack 41 can also have regions or layers in which the dopant concentration lies within this range.

(12) If a layer containing indium adjoins a layer containing no indium, piezo charges may form at the interface between the two layers. In this exemplary embodiment, the formation of piezo charges is prevented by the fact that the indium concentration in the first region 42 decreases to a very low value. This prevents the formation of piezo charges at the interface between the layer stack 41 and the intermediate layer 40. In addition, the formation of piezo charges at the interface between the second region 43 and underlying layers, which do not belong to the layer stack 41, is prevented.

(13) The active region 30 directly adjoins the intermediate layer 40 and is grown on the same. The active region 30 may be designed for generating or detecting electromagnetic radiation, in particular light. For example, the active region 30 may comprise a multiple quantum well structure comprising a plurality of alternately arranged quantum well layers and barrier layers. The barrier layers can be formed with GaAlN, InGaN or GaN and the quantum well layers can be formed with InAlGaN or InGaN. The p-doped region 20 is arranged on the active region 30.

(14) Due to the fact that the layer stack 41 contains indium, the undesirable incorporation and thus the concentration of impurities in the active region 30 can be reduced. Thus, the semiconductor body 10 can be operated more efficiently.

(15) Due to the fact that the layer stack 41 is formed with exactly one nitride compound semiconductor material, the semiconductor body 10 can be easily manufactured. In addition, the semiconductor body 10 is more robust than a semiconductor body manufactured with a larger number of different materials.

(16) FIG. 2 shows a schematic cross-section through a semiconductor body 10 according to another exemplary embodiment. The structure of the semiconductor body 10 corresponds to the structure shown in FIG. 1. In this exemplary embodiment, however, the third region 44 of the layer stack 41 has pairs of alternating layers. A first layer 45 of each pair is n-doped and a second layer 46 of each pair is nominally undoped. The first layers 45 can be doped with silicon, for example. The fact that the second layers 46 are nominally undoped means that no dopant is provided during the growth of the second layers 46. However, it is possible that dopants from adjacent layers are incorporated into the second layers 46.

(17) FIG. 3 shows a schematic cross-section through a semiconductor body 10 according to another exemplary embodiment. The structure of the semiconductor body 10 corresponds to the structure shown in FIG. 1. In addition, the semiconductor body 10 has a layer sequence 50. The layer stack 41 is arranged between the intermediate layer 40 and the layer sequence so and the layer sequence so is nominally free of indium. The layer sequence so can be formed with GaN and contribute to the protection against electrostatic discharge. For this purpose, existing dislocations in the layer sequence 50 are specifically used. A current pulse can then flow off over the unevenness in the layer sequence 50 caused by the dislocations without damaging the active region 30. Thus, the failure rate of the semiconductor body 10 can be reduced during electrostatic charging. Advantageously, no piezo charges form at the interface between the layer stack 41 and the layer sequence 50 because the indium concentration in the second region 43 is very low at the interface.

(18) FIG. 4 shows a schematic cross-section through a semiconductor body 10 according to another exemplary embodiment. In the area of the layer stack 41, two alternative solutions are shown. In the first case, which is shown on the left, the indium concentration in the layer stack 41 increases continuously in the direction of the intermediate layer 40. Hence, in this case, the layer stack 41 only has a first region 42. At the interface to the intermediate layer 40, the indium concentration in the layer stack 41 is at its maximum. In order to at least reduce the formation of piezo charges at the interface, the intermediate layer 40 can be partially highly n-doped. In the second case, which is shown on the right, the indium concentration in the layer stack 41 decreases in the direction of the intermediate layer 40. At the interface to the intermediate layer 40, the indium concentration in the layer stack 41 is at its minimum. This prevents the formation of piezo charges at this interface. Since in this exemplary embodiment the layer stack 41 only has a first region 42, the semiconductor body 10 can be manufactured particularly easily.

(19) FIG. 5 shows a schematic cross-section through a semiconductor body 10 according to another exemplary embodiment. The structure of the semiconductor body 10 corresponds to the structure shown in FIG. 2. In this case, the first layers 45 and the second layers 46 differ not only in that the first layers 45 are n-doped and the second layers 46 are undoped, but also in that the first layers 45 have a different indium concentration than the second layers 46. The indium concentration is the same in all first layers 45 and differs from the indium concentration of the second layers 46. The indium concentration is also the same in all second layers 46. The indium concentration in the first layers 45 can therefore either be higher or lower than the indium concentration in the second layers 46. For example, the difference between the indium concentrations of the first layers 45 and the second layers 46 can be one percent.

(20) FIG. 6 shows a schematic cross-section through a semiconductor body 10 according to another exemplary embodiment. The structure of the semiconductor body 10 corresponds to the structure shown in FIG. 1. In contrast to FIG. 1, the layer stack 41 in this exemplary embodiment has only a first region 42 and a second region 43. The first region 42 directly adjoins the second region 43. The thickness of the second region 43 in the stacking direction z is considerably greater than the thickness of the first region 42. For example, the thickness of the second region 43 is two to 20 times greater than the thickness of the first region 42. Preferably, the thickness of the second region 43 is three to four times greater than the thickness of the first region 42.

(21) The invention is not limited to the exemplary embodiments by the description using the same. Rather, the invention includes any new feature and any combination of features, which in particular includes any combination of features in the patent claims, even if that feature or combination itself is not explicitly mentioned in the patent claims or exemplary embodiments.