Chip Resistor Manufacturing Method
20210142932 · 2021-05-13
Inventors
Cpc classification
International classification
Abstract
Regarding a chip resistor including a resistor provided with a first trimming groove for coarse adjustment and a second trimming groove for fine adjustment, the steps of setting the length of a first lateral direction cut part of the first trimming groove after L-shaped direction turning to be a certain length, setting coordinates of a trimming start point of the second trimming groove at a position which is constantly separated from a first vertical direction cut part of the first trimming groove only by a certain distance, and irradiating with a laser light from the coordinates toward a direction orthogonal to a direction between the electrodes are performed to form the second trimming groove which faces the first trimming groove and is oriented in the direction opposite to the orientation of the first trimming groove.
Claims
1. A method of manufacturing a chip resistor, the method comprising: an electrodes forming step of forming a pair of electrodes on a front surface of an insulating substrate with a predetermined interval therebetween; a resistor forming step of forming a rectangular parallelepiped resistor so as to connect the pair of electrodes; a first trimming forming step of measuring a resistance value of the resistor, forming a first cutting-out which extends from one of the side faces of the resistor toward a direction orthogonal to a direction between the electrodes until a measured resistance value reaches a first target resistance value that is higher than an initial resistance value but lower than a target resistance value, and then forming a second cutting-out which extends from an end of the first cutting-out toward the direction between the electrodes by a certain distance L1 so as to form an L-shaped first trimming groove; and a second trimming forming step of measuring the resistance value of the resistor, forming a third cutting-out which extends from one of the side faces of the resistor on which the first trimming groove is formed toward the direction orthogonal to the direction between the electrodes until the measured resistance value reaches a second target resistance value that is higher than the resistance value after the first trimming forming step is performed but lower than the target resistance value, and then forming a fourth cutting-out which extends from an end of the third cutting-out toward the first cutting-out of the first trimming groove until the measure resistance value reaches the target resistance value so as to form an L-shaped second trimming groove, wherein the third cutting-out of the second trimming groove extends from a position on one of the side faces of the resistor, which is a trimming start point separated from the first cutting-out of the first trimming groove toward a direction to one of the electrodes by a certain distance L2 that is longer than the certain distance L1, toward the direction orthogonal to the direction between the electrodes.
2. The method of manufacturing a chip resistor according to claim 1, wherein a value of the first target resistance value is determined in accordance with an initial resistance value.
3. The method of manufacturing a chip resistor according to claim 1, wherein the third cutting-out of the second trimming groove is formed so as to exceed a virtual line connecting an intersection point, in which one of the electrodes is in contact with one of the side faces of the resistor, with an end of the first trimming groove, and so as not to exceed a length of the first cutting-out of the first trimming groove.
4. The method of manufacturing a chip resistor according to claim 2, wherein the third cutting-out of the second trimming groove is formed so as to exceed a virtual line connecting an intersection point, in which one of the electrodes is in contact with one of the side faces of the resistor, with an end of the first trimming groove, and so as not to exceed a length of the first cutting-out of the first trimming groove.
Description
BRIEF DESCRIPTION OF DRAWINGS
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DESCRIPTION OF EMBODIMENTS
[0031] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. As illustrated in
[0032] The insulating substrate 2 is made of such as ceramic, and obtained from a large-sized substrate (will be described later) which is divided along vertical and lateral division grooves to obtain multi-piece substrates. The front electrodes 3 are obtained by screen-printing, drying and sintering Ag-based paste, and the back electrodes (not illustrated) are obtained in the same way as the front electrodes 3, that is, by screen-printing, drying and sintering the Ag-based paste.
[0033] The resistor 4 is obtained by screen-printing, drying and sintering resistor paste such as Cu—Ni or ruthenium oxide. Adjustment of a resistance value of the chip resistor 1 is performed by providing the L-shaped first trimming groove 5 and the L-shaped second trimming groove 6 on the resistor 4 such that they face with each other. The details of the adjustment will be described later.
[0034] In this connection, the protective film (not illustrated) is obtained by screen-printing, heating and curing epoxy-based resin paste, and has a function to protect the resistor 4 from an external environment. The end face electrodes are obtained by applying Ag paste on the end faces of the insulating substrate 2 and drying and sintering the applied paste, or sputtering such as Ni/Cr thereon instead of the Ag paste. On each front surface of the end face electrodes, a plating layer such as Ni, Au, or Sn is applied.
[0035] Hereinafter, a process of manufacturing the chip resistor 1 configured as above will be described with reference to
[0036] The first step of the process of manufacturing the chip resistor 1 is to prepare a large-sized substrate from which multi-piece insulating substrates 2 are obtained. In the large-sized substrate, primary division grooves and secondary division grooves are provided in advance to form a grid pattern, and each one of the grids divided by the primary dividing grooves and the secondary dividing grooves serves as a single chip region.
[0037] That is, as illustrated in
[0038] As illustrated in
[0039] Next, as illustrated in
[0040] Next, as illustrated in
[0041] Here, the second trimming groove 6 can be formed in various shape in accordance with purposes, such as I-cut shape extending only toward the direction orthogonal to the direction between the electrodes from the trimming start point. On the other hand, in a case where the second trimming groove 6 is formed in the L-shape which is oriented in the direction opposite to the orientation of the L-shape of the first trimming groove 5, both microcracks, namely, microcracks occurring at the tip of the first trimming groove 5 and those occurring at the tip of the second trimming groove 6, extend toward the direction between the electrodes, and thereby it is possible to more effectively reduce the adverse influence due to the microcracks. Furthermore, when the tip of the L-shaped second trimming groove 6 is formed so as not to exceed the first trimming groove 5, it is possible to effectively reduce the adverse influence due to the microcracks occurring at the tip of the second trimming groove 6, and moreover, when the tip of the second trimming groove 6 extends toward the inside of the L-cut shaped first trimming groove 5, it is possible to reduce the adverse influence due to the microcracks occurring at the tip of the second trimming groove 6.
[0042] Next, the step of screen-printing epoxy resin paste over the first trimming groove 5 and the second trimming groove 6 and heating and curing the screen-printed paste is performed so as to form a protective film (not illustrated) for covering the whole of the resistor 4 (protective film forming step).
[0043] The steps up to here are collectively performed with respect to the large-sized substrate 2A from which multi-piece insulating substrates are obtained. In the next step, primary break processing for dividing the large-sized substrate 2A into strips along primary division grooves is performed so as to obtain strip-shaped substrates (not illustrated) provided with multi-piece chip regions (primary dividing step). Then, the step of applying the Ag paste on divided surfaces of the strip-shaped substrate and then drying and sintering the applied paste, or sputtering Ni/Cr thereon instead of the Ag paste is performed so as to form end face electrodes (not illustrated) for bridging the front electrodes 3 and the back electrodes (end face electrode forming step).
[0044] Thereafter, secondary break processing for dividing the strip-shaped substrate along secondary division grooves is performed to obtain a chip unit having the same dimension as that of the chip resistor 1 (secondary dividing step). The final step is to apply electrolytic plating such as Ni, Au, or Sn on both of the end faces of the insulating substrate 2 in its longitudinal direction for each divided chip unit so as to form an external electrode (not illustrated) for covering the front electrodes 3 exposed from the protective film. In this way, the chip resistor 1 as illustrated in
[0045] Hereinafter, the aforementioned first trimming forming step and the second trimming forming step will be described in detail with reference to
[0046] As illustrated in a flowchart of
[0047] Next, while measuring the resistance value R of the resistor 4 by bringing the probe into contact with the pair of front electrodes 3 (S-3), the step of scanning of a laser light is performed along the Y1 direction from the start point coordinates (x0, y0) illustrated in
[0048] Then, when the measured resistance value R of the resistor 4 reaches the first target resistance value R1 (S-6), the step of turning a direction of the laser light to the left side at the angle of 90° from the position above as turn coordinates (x0, y1) and then scanning of the laser light in the X2 direction (S-7) is performed. Thereby, as illustrated in
[0049] When the first lateral direction cut part 5b extends from the tip of the first vertical direction cut part 5a by the certain distance L1, that is, when an irradiation position of the laser light reaches coordinates (x0+L1, y1) which move from the turn coordinates (x0, y1) by the certain distance L1 in the X2 direction (S-9), irradiation of the laser is finished at the position above so as to form the L-shaped first trimming groove 5 (S-10). At the point which the first trimming groove 5 for coarse adjustment is formed in the aforementioned manner, the resistance value of the resistor 4 is coarsely adjusted to be a second target resistance value R2 which is higher than the first target resistance value R1 but lower than the target resistance value Rt. In this connection, the step for covering the surface of the resistor 4 with a pre-coat layer made of such as glass paste and irradiating of the laser light onto the pre-coat layer may be performed to form the first trimming groove 5 on the resistor 4.
[0050] Here, the amount of change in the resistance value in accordance with the cutting-out distance L1 of the first lateral direction cut part 5b varies depending on a position (turn position) of the tip of the first vertical direction cut part 5a, and as the turn position approaches the upper side of the resistor 4, the amount of change in the resistance value in accordance with the cutting-out distance L1 of the first lateral direction cut part 5b increases. As described above, in the present embodiment, the value of the first target resistance value R1 is determined to be smaller as the difference of the initial resistance value R0 with respect to the target resistance value Rt is larger, and thus even when the initial resistance value R0 greatly fluctuates with respect to the target resistance value Rt, by extending and forming the first lateral direction cut part 5b only by the certain distance L1, it is possible to surely perform coarse adjustment so that the resistance value of the resistor 4 becomes the second target resistance value R2.
[0051] Thereafter, as illustrated in a flowchart of
[0052] In the next step, while measuring the resistance value R of the resistor 4 by bringing the probe into contact with the pair of front electrodes 3 (S-12), the step of scanning of the laser light is performed along the Y1 direction from the start coordinates of laser light irradiation (x0+L2, y0) (S-13). As a result, as illustrated in
[0053] When the measured resistance value R of the resistor 4 reaches a third target resistance value R3 which is higher than the second target resistance value R2 but lower than the target resistance value Rt (S-15), the step of turning the direction of the laser light to the right side at the angle of 90° and scanning of the laser light in the X1 direction is performed (S-16). As a result, as illustrated in
[0054] Then, when the measured resistance value R of the resistor 4 reaches the target resistance value Rt (S-18), irradiation of the laser is finished at the position above to form the second trimming groove 6 (S-19). In this way, all the steps of trimming the resistor 4 are completed.
[0055] As described above, in the method of manufacturing the chip resistor 1 according to the present embodiment, when the first trimming groove 5 for coarse adjustment is formed, the length of the first lateral direction cut part 5b (second cutting-out) of the first trimming groove 5 after L-shaped direction turning is set to be the certain length L1 irrespective of the thickness, material, etc. of the resistor 4, and furthermore, the trimming start point of the second trimming groove 6 for fine adjustment is determined at a position which is constantly separated from the first vertical direction cut part 5a (first cutting-out) of the first trimming groove 5 only by the certain distance L2. Accordingly, the end position of the first trimming groove 5 is prevented from being separated too far from nor too close to the trimming start point of the second trimming groove 6, and thereby it is possible to perform stable adjustment of the resistance value with high accuracy.
[0056] Furthermore, in the present embodiment, the amount of change in the resistance value in accordance with the amount of cutting-out of the first lateral direction cut part 5b (second cutting-out) of the first trimming groove 5 after L-shaped direction turning is predicted to set the first target resistance value R1 to be a predetermined value corresponding to the initial resistance value R0. Accordingly, even when the initial resistance value R0 greatly fluctuates, it is possible to surely perform coarse adjustment of the resistance value by the first trimming groove 5.
[0057] In the present embodiment, the second vertical direction cut part (third cutting-out) 6a of the second trimming groove 6 is formed so as not to exceed the virtual line EL1 connecting the intersection point P1, in which one of the electrodes 3 is in contact with one of the side faces of the resistor 4, with the end of the first trimming groove 5. On the other hand, it may be configured such that the second vertical direction cut part 6a of the second trimming groove 6 extends to a position exceeding the virtual line EL1 but not to exceed the length of the first vertical direction cut part (first cutting-out) 5a of the first trimming groove 5. With this configuration, influence of microcracks occurring at the tip of the first trimming groove 5 is prevented by the second vertical direction cut part 6a of the second trimming groove 6, and thereby it is possible to effectively reduce the adverse influence due to the microcracks occurring at the tip of the first lateral direction cut part 5b of the first trimming groove 5.
REFERENCE SIGNS LIST
[0058] 1 chip resistor [0059] 2 insulating substrate [0060] 3 front electrode [0061] 4 resistor [0062] 5 first trimming groove [0063] 5a first vertical direction cut part (first cutting-out) [0064] 5b first lateral direction cut part (second cutting-out) [0065] 6 second trimming groove [0066] 6a second vertical direction cut part (third cutting-out) [0067] 6b second lateral direction cut part (fourth cutting-out) [0068] EL1 continuity line [0069] Q1 region