Optical detection pixel unit, optical detection circuit, optical detection method and display device

Abstract

The present disclosure provides an optical detection pixel unit, an optical detection pixel circuit, an optical detection method and a display device. The optical detection pixel unit comprise a photosensitive element and a detection transistor, wherein the photosensitive element has a first electrode connected with a photovoltage terminal, and a second electrode connected with a gate of the detection transistor; the photosensitive element is configured to detect an optical signal under the control of the photovoltage terminal; and the detection transistor has a first electrode connected with a detection voltage line, and a second electrode connected with a reading line.

Claims

1. An optical detection method for an optical detection pixel unit, the optical detection pixel unit consisting of a photosensitive element and a detection transistor, wherein the photosensitive element has a first electrode connected with a photovoltage terminal, and a second electrode connected with a gate of the detection transistor; and the detection transistor has a first electrode connected with a detection voltage line, and a second electrode connected with a reading line; wherein the photosensitive element is a photodiode; and an anode of the photodiode is the first electrode of the photosensitive element, and a cathode of the photodiode is the second electrode of the photosensitive element, the method comprising a reset stage, an integration stage and a reading stage sequentially in each detection cycle, wherein: in the reset stage, resetting a potential of the gate of the detection transistor; in the integration stage, providing a first detection voltage for the detection voltage line to turn off the detection transistor, and providing a first photovoltage for the photovoltage terminal so as to enable the photosensitive element to convert an optical signal received by the photosensitive element into a corresponding current signal; and in the reading stage, providing a second detection voltage for the detection voltage line to control the detection transistor to operate in a saturation status.

2. The optical detection method according to claim 1, wherein in the reset stage a second photovoltage is provided for the photovoltage terminal to turn on the photodiode; and in the integration stage the first photovoltage is provided for the photovoltage terminal to reverse bias the photodiode.

3. The optical detection method according to claim 2, wherein the first photovoltage is lower than the second photovoltage, and the first detection voltage is lower than the second detection voltage.

4. An optical detection method for the optical detection pixel unit according to claim 1, wherein the optical detection method comprises a reset stage, a first reading stage, an integration stage and a second reading stage sequentially in each detection cycle, wherein in the reset stage, providing a second photovoltage for the photovoltage terminal to turn on the photodiode; in the first reading stage, providing a second detection voltage for the detection voltage line to control the detection transistor to operate in a saturation status; in the integration stage, providing a first detection voltage for the detection voltage line to turn off the detection transistor, and providing a first photovoltage for the photovoltage terminal to reverse bias the photodiode; and in the second reading stage, providing the second detection voltage for the detection voltage line to control the detection transistor to operate in a saturation status; wherein the first photovoltage is lower than the second photovoltage, and the first detection voltage is lower than the second detection voltage.

5. An optical detection method for an optical detection circuit, wherein the optical detection circuit comprises N rows of detection voltage lines, M columns of reading lines, and optical detection pixel units arranged in N rows and M columns; the optical detection pixel unit in the n.sup.th row and the m.sup.th column consists of a photosensitive element in the n.sup.th row and the m.sup.th column and a detection transistor in the n.sup.th row and the m.sup.th column, wherein the photosensitive element in the n.sup.th row and the m.sup.th column has a first electrode connected with an n.sup.th photovoltage terminal, and a second electrode connected with a gate of the detection transistor in the n.sup.th row and the m.sup.th column; the detection transistor in the n.sup.th row and the m.sup.th column has a first electrode connected with a detection voltage line in the n.sup.th row, and a second electrode connected with a reading line in the m.sup.th column; an m.sup.th current source is connected with the reading line in the m.sup.th column for providing an m.sup.th constant current for the reading line in the m.sup.th column; and both N and M are positive integers, n is a positive integer less than or equal to N, and m is a positive integer less than or equal to M; wherein the optical detection method drives all rows of the optical detection pixel units in the optical detection circuit to perform optical detection one row by one row, and provides an n.sup.th detection cycle for the optical detection pixel units in the n.sup.th row; the n.sup.th detection cycle includes an n.sup.th reset stage, an n.sup.th integration stage and an n.sup.th reading stage, which are sequentially arranged; wherein, in the n.sup.th reset stage, resetting a potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column; in the n.sup.th integration stage, providing a first detection voltage for the detection voltage line in the n.sup.th row to turn off the detection transistor in the n.sup.th row and the m.sup.th column, and providing a first photovoltage for the n.sup.th photovoltage terminal, so as to reverse bias the photosensitive element in the n.sup.th row and the m.sup.th column; in the n.sup.th reading stage, providing a second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status; and the reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit do not overlap with each other.

6. The optical detection method according to claim 5, wherein the photosensitive element in the n.sup.th row and the m.sup.th column is a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column; and the optical detection method further comprises: in the n.sup.th reset stage, providing a second photovoltage for the n.sup.th photovoltage terminal to turn on the photodiode in the n.sup.th row and the m.sup.th column; and in the n.sup.th integration stage, controlling to reverse bias the photodiode in the n.sup.th row and the m.sup.th column.

7. The optical detection method according to claim 6, wherein the first photovoltage is lower than the second photovoltage, and the first detection voltage is lower than the second detection voltage.

8. The optical detection method according to claim 6, wherein the optical detection circuit further comprises sampling sub-circuits; and the optical detection method further comprises: in the n.sup.th reading stage, sampling by a corresponding sampling sub-circuit a photocurrent output on the reading line in the m.sup.th column.

9. The optical detection method according to claim 5, wherein the optical detection circuit further comprises sampling sub-circuits; and the sampling sub-circuits are separately connected to the M columns of reading lines for collecting photocurrent therefrom.

10. The optical detection method according to claim 9, wherein the sampling sub-circuit comprises M sampling modules, each sampling module being corresponding to one column of the M columns of the reading lines; the sampling module comprises an operational transconductance amplifier, a resistor module and a digital-to-analog converter; and the operational transconductance amplifier has an inverting input terminal connected with the reading line, a positive input terminal connected with a reference voltage, and an output terminal connected to an input terminal of the digital-to-analog converter via the resistor module.

11. An optical detection method for an optical detection circuit, comprising N rows of detection voltage lines, M columns of reading lines, and optical detection pixel units arranged in N rows and M columns: the optical detection pixel unit in the n.sup.th row and the m.sup.th column consists of a photosensitive element in the n.sup.th row and the m.sup.th column and a detection transistor in the n.sup.th row and the m.sup.th column, wherein the photosensitive element in the n.sup.th row and the m.sup.th column has a first electrode connected with an n.sup.th photovoltage terminal, and a second electrode connected with a gate of the detection transistor in the n.sup.th row and the m.sup.th column; the detection transistor in the n.sup.th row and the m.sup.th column has a first electrode connected with a detection voltage line in the n.sup.th row, and a second electrode connected with a reading line in the m.sup.th column; an m.sup.th current source is connected with the reading line in the m.sup.th column for providing an m.sup.th constant current for the reading line in the m.sup.th column; and both N and M are positive integers, n is a positive integer less than or equal to N, and m is a positive integer less than or equal to M, wherein the photosensitive element in the n.sup.th row and the m.sup.th column is a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column; and the optical detection pixel units in the n.sup.th row in the optical detection circuit is corresponding to an n.sup.th detection cycle; the n.sup.th detection cycle includes an n.sup.th reset stage, a first reading stage of the n.sup.th row, an n.sup.th integration stage and a second reading stage of the n.sup.th row, which are sequentially arranged; and the optical detection method comprises: in the n.sup.th detection cycle, in the n.sup.th reset stage, providing a second photovoltage for the n.sup.th photovoltage terminal to turn on the photodiode in the n.sup.th row and the m.sup.th column; in the first reading stage of the n.sup.th row, providing a second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status; in the n.sup.th integration stage, providing a first detection voltage for the detection voltage line in the n.sup.th row to turn off the detection transistor in the n.sup.th row and the m.sup.th column, and providing a first photovoltage for the n.sup.th photovoltage terminal, so as to reverse bias the photodiode in the n.sup.th row and the m.sup.th column; in the second reading stage of the n.sup.th row, providing the second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status; and the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit do not overlap with each other; the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit do not overlap with each other; the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit, and the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit do not overlap with each other; and the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit, and the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units in the optical detection circuit do not overlap with each other; wherein the first photovoltage is lower than the second photovoltage, and the first detection voltage is lower than the second detection voltage.

12. The optical detection method according to claim 11, wherein the optical detection circuit further comprises sampling sub-circuits; and the optical detection method further comprises: in the first reading stage of the n.sup.th row, sampling by a corresponding sampling sub-circuit a first photocurrent output on the reading line in the m.sup.th column; in the second reading stage of the n.sup.th row, sampling by a corresponding sampling sub-circuit a second photocurrent output on the reading line in the m.sup.th column; and obtaining the optical signal detected by the photodiode in the n.sup.th row and the m.sup.th column on the basis of a difference between the second photocurrent and the first photocurrent.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic structural diagram of an optical detection pixel unit according to embodiments of the present disclosure;

(2) FIG. 2 is a working sequence diagram of the optical detection pixel unit according to the embodiments of the present disclosure;

(3) FIG. 3 is a circuit diagram of the optical detection pixel unit according to the embodiments of the present disclosure;

(4) FIG. 4 is a working sequence diagram of the optical detection pixel unit shown in FIG. 3;

(5) FIG. 5 is a schematic structural diagram of a sampling module included in a sampling sub-circuit in an optical detection circuit according to the embodiments of the present disclosure;

(6) FIG. 6 is a schematic structural diagram of the optical detection pixel units in the m.sup.th column and the m.sup.th sampling module Cm connected thereto, which are included in the optical detection circuit according to the embodiments of the present disclosure;

(7) FIG. 7 is a first working sequence diagram of the optical detection pixel units in the m.sup.th column shown in FIG. 6; and

(8) FIG. 8 is a second working sequence diagram of the optical detection pixel units in the m.sup.th column shown in FIG. 6.

DETAILED DESCRIPTION

(9) The technical solutions of the embodiments of the present disclosure will be described hereinafter in details in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the embodiments described hereinafter are only some embodiments of the present disclosure, but do not include all embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without any creative work should be considered to fall within the protection scope of the present disclosure.

(10) Transistors used in all embodiments of the present disclosure may be thin film transistors, or field effect transistors, or other devices having the same characteristics. In the embodiments of the present disclosure, for differentiating between two electrodes of a transistor except a gate, one of them is named as a first electrode, and the other one is named as a second electrode. In practical application, the first electrode may be a drain, and the second electrode may be a source; or, the first electrode may be a source, and the second electrode may be a drain.

(11) As shown in FIG. 1, an optical detection pixel unit according to the embodiments of the present disclosure includes a photosensitive element PC and a detection transistor TS, wherein,

(12) the photosensitive element PC has a first electrode connected with a photovoltage terminal VD, and a second electrode connected with a gate of the detection transistor TS; and the photosensitive element PC is configured to detect an optical signal under the control of the photovoltage terminal VD; and

(13) the detection transistor TS has a first electrode connected with a detection voltage line VG, and a second electrode connected with a reading line RL.

(14) In FIG. 1, a photoelectric node PD is a node at which the second electrode of the photosensitive element PC is connected with the gate of the detection transistor TS.

(15) The detection transistor TS is a P-type transistor in the embodiment illustrated by FIG. 1, while it may be an N-type transistor in practical application.

(16) In the embodiment illustrated by FIG. 1, since the detection transistor TS is a P-type transistor, the first electrode of the detection transistor TS is a source, and the second electrode of the detection transistor TS is a drain.

(17) According to some embodiments of the present disclosure, the photosensitive element PC may be a photodiode, but is not limited thereto; when the photosensitive element PC is a photodiode, the first electrode of the photosensitive element PC is an anode of the photodiode, and the second electrode of the photosensitive element PC is a cathode of the photodiode.

(18) The optical detection pixel unit according to the embodiments of the present disclosure obviates the need for reset transistors and gated transistors, and achieves active photosensitive detection by use of a 1T1P structure. Since the optical detection pixel unit according to the embodiments of the present disclosure uses a small number of transistors, it is easy to be applied in large array integration.

(19) In the embodiments of the present disclosure, the detection transistor is kept in different states by controlling a gate potential and a source potential of the detection transistor for integration or reading. The optical detection pixel unit according to the embodiments of the present disclosure is an active photosensitive detection pixel unit adopting a source following design, so that it retains the advantages of the active optical pixel structure, such as good anti-noise performance, in comparison with a passive photosensitive detection pixel unit, but it does not increase an area of an optical pixel structure, which is favorable for large array integration in comparison with a conventional 3T1P structure (which is an optical pixel unit composed of three transistors and one photodiode).

(20) According to some embodiments of the present disclosure, the optical detection pixel unit of the present disclosure may be driven by a control sub-circuit included in an optical detection circuit as follows:

(21) the control sub-circuit is configured to reset a potential of the gate of the detection transistor TS (that is, resetting a potential of the photoelectric node PD) in a reset stage, provide a first detection voltage for the detection voltage line VG in an integration stage to turn off the detection transistor TS, provide a first photovoltage for the photovoltage terminal VD in the integration stage so as to enable the photosensitive element PC to convert an optical signal received by the photosensitive element PC into a corresponding current signal, charge parasitic capacitance (not shown in FIG. 1) of the gate of the detection transistor TS with the current signal so as to change the potential of the gate of the detection transistor TS accordingly, and provide a second detection voltage for the detection voltage line VG in a reading stage so as to control the detection transistor TS to operate in a saturation status to make the reading line RL output photocurrent, the photocurrent being corresponding to the potential of the gate of the detection transistor TS (that is, the potential of the photoelectric node PD) in the reading stage.

(22) According to some embodiments of the present disclosure, the first photovoltage may be a low photovoltage VDL, but is not limited thereto.

(23) Specifically, the photosensitive element may be a photodiode; an anode of the photodiode is the first electrode of the photosensitive element, and a cathode of the photodiode is the second electrode of the photosensitive element.

(24) The control sub-circuit is specifically configured to provide a second photovoltage for the photovoltage terminal in the reset stage to turn on the photodiode so as to reset the potential of the gate of the detection transistor, and further to reverse bias the photodiode in the integration stage so as to enable the photodiode to detect the optical signal.

(25) According to some embodiments of the present disclosure, the second photovoltage may be a high photovoltage VDH, but is not limited thereto.

(26) As shown in FIG. 2, in the reset stage t1, a potential of the photovoltage terminal VD is pulled up to the second photovoltage (which may be the high photovoltage VDH in a time sequence shown in FIG. 2), and a potential of the second electrode of the photosensitive element PC, that is, the potential of the photoelectric node PD, is reset to VDH−Von (Von is a turn-on voltage of the photosensitive element PC);

(27) in the integration stage t2, the first detection voltage (which may be a low detection voltage VGL in the time sequence shown in FIG. 2) is provided for the detection voltage line VG to turn off the detection transistor TS, and the first photovoltage (which may be a low photovoltage VDL in the time sequence shown in FIG. 2) is provided for the photovoltage terminal VD, so as to enable the photosensitive element PC to convert the optical signal received by the photosensitive element PC into the corresponding current signal, which is used to charge the parasitic capacitance (not shown in FIG. 1) of the gate of the detection transistor TS, so as to change the potential of the gate of the detection transistor TS accordingly (that is, changing the potential Vpd of the photoelectric node PD accordingly);

(28) in the reading stage t3, the second detection voltage (which may be a high detection voltage VGH in the time sequence shown in FIG. 2, the high detection voltage VGH being greater than the low detection voltage VGL) is provided for the detection voltage line VG, in which case a gate-source voltage Vgs of the detection transistor TS satisfies Vgs=Vpd−VGH, Vpd−VGH is made to be less than a threshold voltage Vth of the detection transistor TS, and a drain-source voltage Vds of the detection transistor TS is made to be less than Vpd−VGH−Vth, so as to control the detection transistor TS to operate in a saturation status to make the reading line RL output the photocurrent Ip, the photocurrent IP being corresponding to the potential of the gate of the detection transistor TS (that is, the potential Vpd of the photoelectric node PD) in the reading stage t3;
Ip=−½×K×(Vgs−Vth).sup.2

(29) where K is a current coefficient of the detection transistor TS.

(30) When the detection transistor TS in FIG. 1 is replaced with an N-type transistor, it should be ensured that Vds is greater than Vpd−VGH−Vth in the reading stage t3 so as to enable the detection transistor TS to operate in a saturation status.

(31) In some embodiments of the present disclosure, the photosensitive element is a photodiode; and an anode of the photodiode is the first electrode of the photosensitive element, and a cathode of the photodiode is the second electrode of the photosensitive element;

(32) the control sub-circuit is configured to provide a second photovoltage for the photovoltage terminal in a reset stage to turn on the photodiode, so as to reset a potential of the gate of the detection transistor to a reset voltage which is equal to VDH−Vp, provide a second detection voltage for the detection voltage line in a first reading stage, so as to enable the detection transistor to operate in a saturation status to make the reading line output a first photocurrent corresponding to the reset voltage, provide a first detection voltage for the detection voltage line in an integration stage to turn off the detection transistor, provide a first photovoltage for the photovoltage terminal in the integration stage, so as to reverse bias the photodiode to convert an optical signal received by the photodiode into a corresponding current signal, charge parasitic capacitance of the gate of the detection transistor with the current signal so as to change the potential of the gate of the detection transistor accordingly, and provide the second detection voltage for the detection voltage line in a second reading stage, so as to control the detection transistor to operate in a saturation status to make the reading line output a second photocurrent; the second photocurrent is corresponding to the potential of the gate of the detection transistor in the second reading stage; and Vp is a turn-on voltage of the photodiode.

(33) According to some embodiments of the present disclosure, when the photosensitive element is a photodiode, there will be detection errors due to a difference in turn-on voltages of the photodiodes when the potential of the gate of the detection transistor (that is, the potential of the photoelectric node) is reset, therefore, two reading stages are arranged after the reset stage for the optical detection pixel unit according to the embodiments of the present disclosure, so as to counteract the effect of the turn-on voltage of the photodiode on a final detection result, which will be described in details below in conjunction with the sequence diagrams.

(34) As shown in FIG. 3, the optical detection pixel unit according to the embodiments of the present disclosure includes a photodiode DP and a detection transistor TS, wherein,

(35) the photodiode DP has an anode connected with the photovoltage terminal VD, and a cathode connected with the gate of the detection transistor TS; and the photodiode DP is configured to detect an optical signal under the control of the photovoltage terminal VD; and

(36) the detection transistor TS has a source connected with the detection voltage line VG, and a drain connected with the reading line RL.

(37) In FIG. 3, the photoelectric node PD is a node connected with the gate of the detection transistor TS.

(38) The detection transistor TS is a P-type transistor in the embodiment illustrated by FIG. 3, but is not limited thereto.

(39) As shown in FIG. 2, when the optical detection pixel unit of the present disclosure as shown in FIG. 3 operates,

(40) in a reset stage t1, the potential of the photovoltage terminal VD is pulled up to the high photovoltage VDH, so as to reset a potential of the anode of the photodiode DP, that is, the potential of the photoelectric node PD, to VDH−Vp (Vp is the turn-on voltage of the photodiode DP);

(41) in an integration stage t2, the low detection voltage VGL is provided for the detection voltage line VG to turn off the detection transistor TS, and the low photovoltage VDL is provided for the photovoltage terminal VD, so as to make the photodiode DP in a reverse biased state to enable the photodiode DP to convert the optical signal received by the photodiode DP into the corresponding current signal, which is used to charge the parasitic capacitance (not shown in FIG. 3) of the gate of the detection transistor TS, so as to change the potential of the gate of the detection transistor TS accordingly (that is, changing the potential Vpd of the photoelectric node PD accordingly); and

(42) in a reading stage t3, the high detection voltage VGH is provided for the detection voltage line VG, in which case the gate-source voltage Vgs of the detection transistor TS is equal to Vpd−VGH, Vpd−VGH is made to be less than the threshold voltage Vth of the detection transistor TS, and the drain-source voltage Vds of the detection transistor TS is made to be less than Vpd−VGH−Vth, so as to control the detection transistor TS to operate in a saturation status to make the reading line RL output the photocurrent Ip, the photocurrent IP being corresponding to the potential of the gate of the detection transistor TS (that is, the potential of the photoelectric node PD) in the reading stage t3.

(43) In practical application, a difference in the turn-on voltage of the photodiode DP caused by PIN processes will lead to a difference in the reset potential VDH−Vp of the photodiode DP, therefore, the time sequence shown in FIG. 2 may be improved in such a way that a sampling process is performed after the resetting process, and a sample value obtained after the integration process is subtracted, so as to counteract the difference in the turn-on voltage Vp.

(44) As shown in FIG. 4, when the optical detection pixel unit of the present disclosure as shown in FIG. 3 operates,

(45) in a reset stage t41, the high photovoltage VDH is provided for the photovoltage terminal VD to turn on the photodiode DP, so as to reset the potential of the gate of the detection transistor TS (that is, the potential Vpd of the photoelectric node PD) to the reset voltage which is equal to VDH−Vp; wherein, Vp is the turn-on voltage of the photodiode DP);

(46) in a first reading stage t42, the high detection voltage VGH is provided for the detection voltage line VG, in which case the gate-source voltage Vgs of the detection transistor TS is equal to Vpd−VGH, Vpd−VGH is made to be less than the threshold voltage Vth of the detection transistor TS, and the drain-source voltage Vds of the detection transistor TS is made to be less than Vpd−VGH−Vth, so as to control the detection transistor TS to operate in a saturation status to make the reading line RL output a first photocurrent Ip1 corresponding to the reset voltage;

(47) in an integration stage t43, the low detection voltage VGL is provided for the detection voltage line VG to turn off the detection transistor TS, and the low photovoltage VDL is provided for the photovoltage terminal VD, so as to reverse bias the photodiode DP to convert the optical signal received by the photodiode DP into the corresponding current signal, which is used to charge the parasitic capacitance (not shown in FIG. 3) of the gate of the detection transistor TS, so as to change the potential of the gate of the detection transistor TS accordingly (that is, changing the potential Vpd of the photoelectric node PD accordingly);

(48) in a second reading stage t44, the high detection voltage VGH is provided for the detection voltage line VG to control the detection transistor TS to operate in a saturation status, so as to make the reading line RL output a second photocurrent Ip2 corresponding to the potential of the gate of the detection transistor TS in the second reading stage t44; Vp is the turn-on voltage of the photodiode DP; and

(49) the optical signal detected by the photodiode may be obtained on the basis of a difference between Ip2 and Ip1, so as to obviate the detection errors due to the difference in the turn-on voltage Vp of the photodiode DP.

(50) An optical detection method according to the embodiments of the present disclosure is applied to the aforesaid optical detection pixel unit, and in each detection cycle of the optical detection method, a reset stage, an integration stage and a reading stage are sequentially arranged; and the optical detection method includes:

(51) in the reset stage, resetting a potential of the gate of the detection transistor;

(52) in the integration stage, providing a first detection voltage for the detection voltage line to turn off the detection transistor, providing a first photovoltage for the photovoltage terminal, so as to enable the photosensitive element to convert an optical signal received by the photosensitive element into a corresponding current signal, and charging parasitic capacitance of the gate of the detection transistor with the current signal, so as to change the potential of the gate of the detection transistor accordingly;

(53) in the reading stage, providing a second detection voltage for the detection voltage line to control the detection transistor to operate in a saturation status, so as to make the reading line output photocurrent, the photocurrent being corresponding to the potential of the gate of the detection transistor in the reading stage; and

(54) calculating the optical signal received by the photosensitive element according to the photocurrent.

(55) Specifically, the photosensitive element is a photodiode; an anode of the photodiode is the first electrode of the photosensitive element, and a cathode of the photodiode is the second electrode of the photosensitive element; and the optical detection method further includes:

(56) in the reset stage, providing a second photovoltage for the photovoltage terminal to turn on the photodiode so as to reset the potential of the gate of the detection transistor; and

(57) in the integration stage, controlling to reverse bias the photodiode, so as to enable the photodiode to detect the optical signal.

(58) An optical detection method according to the embodiments of the present disclosure is applied to the aforesaid optical detection pixel unit, and the photosensitive element is a photodiode; an anode of the photodiode is the first electrode of the photosensitive element, and a cathode of the photodiode is the second electrode of the photosensitive element; wherein in each detection cycle of the optical detection method, a reset stage, a first reading stage, an integration stage and a second reading stage are sequentially arranged; and the optical detection method includes:

(59) in the reset stage, providing a second photovoltage for the photovoltage terminal to turn on the photodiode so as to reset a potential of the gate of the detection transistor to a reset voltage which is equal to VDH−Vp;

(60) in the first reading stage, providing a second detection voltage for the detection voltage line, so as to enable the detection transistor to operate in a saturation status to make the reading line output a first photocurrent corresponding to the reset voltage;

(61) in the integration stage, providing a first detection voltage for the detection voltage line to turn off the detection transistor, providing a first photovoltage for the photovoltage terminal, so as to reverse bias the photodiode to convert an optical signal received by the photodiode into a corresponding current signal, and charging parasitic capacitance of the gate of the detection transistor with the current signal so as to change the potential of the gate of the detection transistor accordingly; and in the second reading stage, providing the second detection voltage for the detection voltage line, so as to control the detection transistor to operate in a saturation status to make the reading line output a second photocurrent, the second photocurrent being corresponding to the potential of the gate of the detection transistor in the second reading stage; Vp is a turn-on voltage of the photodiode; and

(62) calculating the optical signal detected by the photodiode on the basis of a difference between the second photocurrent and the first photocurrent.

(63) An optical detection circuit according to the embodiments of the present disclosure includes N rows of detection voltage lines, M columns of reading lines, and optical detection pixel units arranged in N rows and M columns;

(64) the optical detection unit in the n.sup.th row and the m.sup.th column includes a photosensitive element in the n.sup.th row and the m.sup.th column and a detection transistor in the n.sup.th row and the m.sup.th column, wherein

(65) the photosensitive element in the n.sup.th row and the m.sup.th column has a first electrode connected with an n.sup.th photovoltage terminal, and a second electrode connected with a gate of the detection transistor in the n.sup.th row and the m.sup.th column; and the photosensitive element is configured to detect an optical signal under the control of the n.sup.th photovoltage terminal;

(66) the detection transistor in the n.sup.th row and the m.sup.th column has a first electrode connected with a detection voltage line in the n.sup.th row, and a second electrode connected with a reading line in the m.sup.th column;

(67) an m.sup.th current source CS-m is connected with the reading line in the m.sup.th column for providing an m.sup.th constant current for the reading line in the m.sup.th column; and

(68) both N and M are positive integers, n is a positive integer less than or equal to N, and m is a positive integer less than or equal to M.

(69) According to some embodiments of the present disclosure, the optical detection circuit of the present disclosure may further include sampling sub-circuits; and

(70) the sampling sub-circuits are separately connected to the M columns of reading lines for collecting photocurrent therefrom.

(71) Specifically, the sampling sub-circuit may include M sampling modules; and the sampling modules are corresponding to the reading lines;

(72) as shown in FIG. 5, the sampling module may include an operational transconductance amplifier Amp, a resistor module 51 and a digital-to-analog converter ADC;

(73) the operational transconductance amplifier Amp has an inverting input terminal connected with the reading line RL, a positive input terminal connected with a reference voltage Vbase, and an output terminal connected to an input terminal of the digital-to-analog converter ADC via the resistor module 51, and the operational transconductance amplifier Amp is configured to convert a photocurrent output by the reading line RL into a corresponding analog photovoltage signal; and

(74) the digital-to-analog converter ADC is configured to subject the analog photovoltage signal to analog-to-digital conversion to obtain a corresponding digital photovoltage signal; and the optical signal detected by the photosensitive element may be obtained according to the digital photovoltage signal.

(75) According to some embodiments of the present disclosure, a control sub-circuit controls and executes a driving process to reset a potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column in an n.sup.th reset stage, provide a first detection voltage for the detection voltage line in the n.sup.th row in an n.sup.th integration stage to turn off the detection transistor in the n.sup.th row and the m.sup.th column, provide a first photovoltage for the n.sup.th photovoltage terminal in the n.sup.th integration stage so as to enable the photosensitive element in the n.sup.th row and the m.sup.th column to convert an optical signal received by the photosensitive element in the n.sup.th row and the m.sup.th column into a corresponding current signal, charge parasitic capacitance of the gate of the detection transistor in the n.sup.th row and the m.sup.th column with the current signal so as to change the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column accordingly, and provide a second detection voltage for the detection voltage line in the n.sup.th row in an n.sup.th reading stage so as to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status to make the reading line in the m.sup.th column output an m.sup.th photocurrent, the m.sup.th photocurrent being corresponding to the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column in the n.sup.th reading stage; and the optical signal detected by the photosensitive element in the n.sup.th row and the m.sup.th column may be calculated according to the m.sup.th photocurrent.

(76) According to some embodiments of the present disclosure, the photosensitive element in the n.sup.th row and the m.sup.th column may be a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column; and

(77) the control sub-circuit is specifically configured to provide a second photovoltage for the n.sup.th photovoltage terminal in the reset stage to turn on the photodiode in the n.sup.th row and the m.sup.th column so as to reset the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column, and further to reverse bias the photodiode in the n.sup.th row and the m.sup.th column in the integration stage.

(78) According to another specific implementation, the photosensitive element in the n.sup.th row and the m.sup.th column is a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column;

(79) the control sub-circuit is configured to provide a second photovoltage for the n.sup.th photovoltage terminal in an n.sup.th reset stage to turn on the photodiode in the n.sup.th row and the m.sup.th column, so as to reset a potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column to a reset voltage of the n.sup.th row and the m.sup.th column which is equal to VDH−Vpnm, provide a second detection voltage for the detection voltage line in the n.sup.th row in a first reading stage of the n.sup.th row, so as to enable the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status to make the reading line in the m.sup.th column output a first photocurrent corresponding to the reset voltage of the n.sup.th row and the m.sup.th column, provide a first detection voltage for the detection voltage line in the n.sup.th row in an n.sup.th integration stage to turn off the detection transistor in the n.sup.th row and the m.sup.th column, provide a first photovoltage for the n.sup.th photovoltage terminal in the n.sup.th integration stage, so as to reverse bias the photodiode in the n.sup.th row and the m.sup.th column to convert an optical signal received by the photodiode in the n.sup.th row and the m.sup.th column into a corresponding current signal, charge parasitic capacitance of the gate of the detection transistor in the n.sup.th row and the m.sup.th column with the current signal so as to change the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column accordingly, and provide the second detection voltage for the detection voltage line in the n.sup.th row in a second reading stage of the n.sup.th row, so as to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status to make the reading line in the m.sup.th column output a second photocurrent, the second photocurrent being corresponding to the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column in the second reading stage of the n.sup.th row; Vpnm is a turn-on voltage of the photodiode in the n.sup.th row and the m.sup.th column; and

(80) the optical signal detected by the photodiode in the n.sup.th row and the m.sup.th column may be calculated on the basis of a difference between the second photocurrent and the first photocurrent.

(81) FIG. 6 shows a schematic structural diagram of the optical detection pixel units in the m.sup.th column and the m.sup.th sampling module Cm connected thereto, which are included in the optical detection circuit according to the embodiments of the present disclosure.

(82) As shown in FIG. 6, the optical detection pixel unit P1m in the first row and the m.sup.th column includes a photodiode DP1m in the first row and the m.sup.th column and a detection transistor TS1m in the first row and the m.sup.th column;

(83) the photodiode DP1m has an anode connected with a first photovoltage terminal VD1, and a cathode connected with a gate of the detection transistor TS1m; and

(84) the photodiode DP1m is configured to detect an optical signal under the control of the first photovoltage terminal VD1;

(85) the detection transistor TS1m has a source connected with a detection voltage line VG1 in the first row, and a drain connected with a reading line RLm in the m.sup.th column;

(86) a photoelectric node PD1m in the first row and the m.sup.th column is a node connected with the gate of the detection transistor TS1m;

(87) the optical detection pixel unit P2m in the second row and the m.sup.th column includes a photodiode DP2m in the second row and the m.sup.th column and a detection transistor TS2m in the second row and the m.sup.th column;

(88) the photodiode DP2m has an anode connected with a second photovoltage terminal VD2, and a cathode connected with a gate of the detection transistor TS2m; and

(89) the photodiode DP2m is configured to detect an optical signal under the control of the second photovoltage terminal VD2;

(90) the detection transistor TS2m has a source connected with a detection voltage line VG2 in the second row, and a drain connected with the reading line RLm in the m.sup.th column;

(91) a photoelectric node PD2m in the second row and the m.sup.th column is a node connected with the gate of the detection transistor TS2m;

(92) the optical detection pixel unit Pnm in the n.sup.th row and the m.sup.th column includes a photodiode DPnm in the n.sup.th row and the m.sup.th column and a detection transistor TSnm in the n.sup.th row and the m.sup.th column;

(93) the photodiode DPnm has an anode connected with an n.sup.th photovoltage terminal VDn, and a cathode connected with a gate of the detection transistor TSnm; and

(94) the photodiode DPnm is configured to detect an optical signal under the control of the n.sup.th photovoltage terminal VDn;

(95) the detection transistor TSnm has a source connected with a detection voltage line VGn in the n.sup.th row, and a drain connected with the reading line RLm in the m.sup.th column;

(96) a photoelectric node PDnm in the n.sup.th row and the m.sup.th column is a node connected with the gate of the detection transistor TS2m;

(97) the m.sup.th sampling module Cm is connected with the reading line RLm;

(98) the m.sup.th sampling module Cm includes an m.sup.th operational transconductance amplifier Amp-m, an m.sup.th resistor Rm and an m.sup.th digital-to-analog converter ADC-m;

(99) the m.sup.th operational transconductance amplifier Amp-m has an inverting input terminal connected with the reading line RLm, a positive input terminal connected with a reference voltage Vbase, and an output terminal connected to an input terminal of the m.sup.th digital-to-analog converter ADC-m via the m.sup.th resistor Rm, and the m.sup.th operational transconductance amplifier Amp-m is configured to convert a photocurrent output by the reading line RLm into a corresponding analog photovoltage signal; and

(100) the m.sup.th digital-to-analog converter ADC-m is configured to subject the analog photovoltage signal to analog-to-digital conversion to obtain a corresponding digital photovoltage signal; and the optical signal detected by the corresponding photodiode may be obtained according to the digital photovoltage signal.

(101) In the embodiment illustrated by FIG. 6, all the transistors are P-type transistors, but are not limited thereto.

(102) As shown in FIG. 7, when the optical detection pixel units in the m.sup.th column and the m.sup.th sampling module Cm connected thereto, which are included in the optical detection circuit as shown in FIG. 6, operates,

(103) the optical detection pixel unit in the first row and the m.sup.th column is corresponding to a first detection cycle t71, which includes a first reset stage t711, a first integration stage t712 and a first reading stage t713, which are sequentially arranged;

(104) the optical detection pixel unit in the second row and the m.sup.th column is corresponding to a second detection cycle t72, which includes a second reset stage t721, a second integration stage t722 and a second reading stage t723, which are sequentially arranged; and

(105) the optical detection pixel unit in the n.sup.th row and the m.sup.th column is corresponding to an n.sup.th detection cycle t7n, which includes an n.sup.th reset stage t7n1, an n.sup.th integration stage t7n2 and an n.sup.th reading stage t7n3, which are sequentially arranged.

(106) In the embodiment illustrated by FIG. 7, a control sub-circuit included in the optical detection circuit executes a driving process in a following exemplary way, wherein, as for the optical detection pixel unit in the first row and the m.sup.th column, in the first reset stage t711, a potential of the detection voltage line VG1 is pulled down to turn off the detection transistor TS1m, a potential of the first photovoltage terminal VD1 is pulled up to a high photovoltage VDH to reset a potential of the photoelectric node PD1m, in which case the potential of the photoelectric node PD1m is equal to VDH−Vp1m, Vp1m being a turn-on voltage of the photodiode DP1m;

(107) in the first integration stage t712, the potential of the first photovoltage terminal VD1 is pulled down to a low photovoltage VDL to make the photodiode DP1m in a reverse biased state so as to enable the photodiode DP1m to convert an optical signal received by the photodiode DP1m into a corresponding current signal, an integration process is begun, and parasitic capacitance of the gate of the detection transistor TS1m is charged with the current signal so as to change a potential of the gate of the detection transistor TS1m accordingly;

(108) in the first reading stage t713, the potential of the detection voltage line VG1 is pulled up to a high detection voltage VGH again, in which case a gate-source voltage of the detection transistor TS1m is equal to Vpd1m−VGH, Vpd1m−VGH is made to be less than Vth1m, a drain-source voltage of the detection transistor TS1m is made to be less than Vpd1m−VGH−Vth1m, so as to enable the detection transistor TS1m to operate in a saturation status, in which case a current flowing through the reading line RLm is determined by Vpd1m, and a photocurrent signal detected by the photodiode DP1m in the first row and the m.sup.th column is read out to the reading line RLm; after the first reading stage t713 ends, a next first detection cycle begins to pull down the potential of the detection voltage line VG1 again to turn off the detection transistor TS1m, and to pull up the potential of the first photovoltage terminal VD1 again for resetting, and so on;

(109) Vpd1m is the potential of the photoelectric node PD1m, and Vth1m is a threshold voltage of the detection transistor TS1m;

(110) as for the optical detection pixel unit in the second row and the m.sup.th column, in the second reset stage t721, a potential of the detection voltage line VG2 is pulled down to turn off the detection transistor TS2m, a potential of the second photovoltage terminal VD2 is pulled up to the high photovoltage VDH to reset a potential of the photoelectric node PD2m, in which case the potential of the photoelectric node PD2m is equal to VDH−Vp2m, Vp2m being a turn-on voltage of the photodiode DP2m;

(111) in the second integration stage t722, the potential of the first photovoltage terminal VD1 is pulled down to the low photovoltage VDL to make the photodiode DP1m in a reverse biased state so as to enable the photodiode DP1m to convert an optical signal received by the photodiode DP1m into a corresponding current signal, an integration process is begun, and parasitic capacitance of the gate of the detection transistor TS1m is charged with the current signal so as to change a potential of the gate of the detection transistor TS1m accordingly;

(112) in the second reading stage t723, the potential of the detection voltage line VG2 is pulled up to the high detection voltage VGH again, in which case a gate-source voltage of the detection transistor TS2m is equal to Vpd2m−VGH, Vpd2m−VGH is made to be less than Vth2m, a drain-source voltage of the detection transistor TS2m is made to be less than Vpd2m−VGH−Vth2m, so as to enable the detection transistor TS2m to operate in a saturation status, in which case a current flowing through the reading line RLm is determined by Vpd2m, and a photocurrent signal detected by the photodiode DP2m in the second row and the m.sup.th column is read out to the reading line RLm;

(113) Vpd2m is the potential of the photoelectric node PD2m, and Vth2m is a threshold voltage of the detection transistor TS2m;

(114) and so on, as for the optical detection pixel unit in the n.sup.th row and the m.sup.th column, in the n.sup.th reset stage t7n1, a potential of the detection voltage line VGn is pulled down to turn off the detection transistor TSnm, a potential of the n.sup.th photovoltage terminal VDn is pulled up to the high photovoltage VDH to reset a potential of the photoelectric node PDnm, in which case the potential of the photoelectric node PDnm is equal to VDH−Vpnm, Vpnm being a turn-on voltage of the photodiode DPnm;

(115) in the n.sup.th integration stage t7n2, the potential of the n.sup.th photovoltage terminal VDn is pulled down to the low photovoltage VDL to make the photodiode DPnm in a reverse biased state so as to enable the photodiode DPnm to convert an optical signal received by the photodiode DPnm into a corresponding current signal, an integration process is begun, and parasitic capacitance of the gate of the detection transistor TSnm is charged with the current signal so as to change a potential of the gate of the detection transistor TSnm accordingly;

(116) in the n.sup.th reading stage t7n3, the potential of the detection voltage line VGn is pulled up to the high detection voltage VGH again, in which case a gate-source voltage of the detection transistor TSnm is equal to Vpdnm−VGH, Vpdnm−VGH is made to be less than Vthnm, a drain-source voltage of the detection transistor TSnm is made to be less than Vpdnm−VGH−Vthnm, so as to enable the detection transistor TS2m to operate in a saturation status, in which case a current flowing through the reading line RLm is determined by Vpdnm, and a photocurrent signal detected by the photodiode DPnm in the n.sup.th row and the m.sup.th column is read out to the reading line RLm; and

(117) Vpdnm is the potential of the photoelectric node PDnm, and Vthnm is a threshold voltage of the detection transistor TSnm;

(118) According to the technical solutions of the present disclosure, in the optical detection circuit, the optical detection pixel units in each row perform active photosensitive detection in a same detection cycle corresponding to said row. In other words, since the pixel units in each column are separately connected to the corresponding sampling sub-circuits, as for any one detection cycle, every optical detection pixel unit in a row corresponding to the detection cycle will perform active photosensitive detection synchronously (parallel) in the detection cycle. Taking FIG. 7 as an example, every optical detection pixel unit in the first row will perform active photosensitive detection in the first detection cycle t71, every optical detection pixel unit in the second row will perform active photosensitive detection in the second detection cycle t72 and every optical detection pixel unit in the n.sup.th row will perform active photosensitive detection in the n.sup.th detection cycle t7n.

(119) According to some embodiments of the present disclosure, as for the a.sup.th reading stage included in the a.sup.th detection cycle corresponding to the optical detection pixel units in the a.sup.th row, and the b.sup.th reading stage included in the b.sup.th detection cycle corresponding to the optical detection pixel units in the b.sup.th row, the a.sup.th reading stage and the b.sup.th reading stage do not overlap with each other, both a and b are positive integers, but a is not equal to b.

(120) In practical application, a difference in the turn-on voltage Vp of the photodiode caused by PIN processes will lead to a difference in the reset potential VDH−Vp of the cathode of the photodiode, therefore, the time sequence shown in FIG. 8 is adopted to obviate the effect of the difference in the turn-on voltage Vp on the detected optical signal.

(121) As shown in FIG. 8, when the optical detection pixel units in the m.sup.th column and the m.sup.th sampling module Cm connected thereto, which are included in the optical detection circuit as shown in FIG. 6, operates, the optical detection pixel unit in the first row and the m.sup.th column is corresponding to a first detection cycle t81; and the optical detection pixel unit in the second row and the m.sup.th column is corresponding to a second detection cycle t82;

(122) the first detection cycle t81 includes a first reset stage t811, a first reading stage t812 of the first row, a first integration stage t813 and a second reading stage t814 of the first row, which are sequentially arranged;

(123) the second detection cycle t82 includes a second reset stage t821, a first reading stage t822 of the second row, a second integration stage t823 and a second reading stage t824 of the second row, which are sequentially arranged;

(124) in the first reset stage t811, a high photovoltage VDH is provided for the first photovoltage terminal VD1 to turn on the photodiode DP1m, so as to reset a potential of the gate of the detection transistor TS1m to a reset voltage of the first row and the m.sup.th column, which is equal to VDH−Vp1m; Vp1m is a turn-on voltage of the photodiode DP1m;

(125) in the first reading stage t812 of the first row, a high detection voltage VGH is provided for the detection voltage line VG1, in which case a gate-source voltage of the detection transistor TS1m is equal to Vpd1m−VGH, Vpd1m−VGH is made to be less than Vth1m, a drain-source voltage of the detection transistor TS1m is made to be less than Vpd1m−VGH−Vth1m, so as to enable the detection transistor TS1m to operate in a saturation status, in which case a current flowing through the reading line RLm is determined by Vpd1m, and a first photocurrent of the first row detected by the photodiode DP1m in the first row and the m.sup.th column is read out to the reading line RLm; the first photocurrent of the first row is corresponding to the reset voltage of the first row and the m.sup.th column; Vpd1m is a potential of the photoelectric node PD1m, and Vth1m is a threshold voltage of the photodiode DP1m;

(126) in the first integration stage t813, a low detection voltage VGL is provided for the detection voltage line VG1 to turn off the detection transistor TS1m, and a low photovoltage VDL is provided for the first photovoltage terminal VD1, so as to reverse bias the photodiode DP1m to convert an optical signal received by the photodiode DP1m into a corresponding current signal, which is used to charge parasitic capacitance of the gate of the detection transistor TS1m, so as to change the potential of the gate of the detection transistor TS1m accordingly;

(127) in the second reading stage t814 of the first row, the high detection voltage VGH is provided for the detection voltage line VG1, so as to control the detection transistor TS1m to operate in a saturation status to make the reading line RLm output a second photocurrent of the first row, which is corresponding to the potential of the gate of the detection transistor TS1m in the second reading stage of the first row; the optical signal detected by the photodiode DP1m may be calculated on the basis of a difference between the second photocurrent of the first row and the first photocurrent of the first row, and the effect of the difference in Vp1m is obviated;

(128) in the second reset stage t821, the high photovoltage VDH is provided for the second photovoltage terminal VD2 to turn on the photodiode DP2m, so as to reset a potential of the gate of the detection transistor TS2m to a reset voltage of the second row and the m.sup.th column, which is equal to VDH−Vp2m; Vp2m is a turn-on voltage of the photodiode DP2m;

(129) in the first reading stage t822 of the second row, the high detection voltage VGH is provided for the detection voltage line VG2, in which case a gate-source voltage of the detection transistor TS2m is equal to Vpd2m−VGH, Vpd2m−VGH is made to be less than Vth2m, a drain-source voltage of the detection transistor TS2m is made to be less than Vpd2m−VGH−Vth2m, so as to enable the detection transistor TS2m to operate in a saturation status, in which case a current flowing through the reading line RLm is determined by Vpd2m, and a first photocurrent of the second row detected by the photodiode DP2m in the second row and the m.sup.th column is read out to the reading line RLm; the first photocurrent of the second row is corresponding to the reset voltage of the second row and the m.sup.th column; Vpd2m is a potential of the photoelectric node PD2m, and Vth2m is a threshold voltage of the photodiode DP2m;

(130) in the second integration stage t823, the low detection voltage VGL is provided for the detection voltage line VG2 to turn off the detection transistor TS2m, and the low photovoltage VDL is provided for the second photovoltage terminal VD2, so as to reverse bias the photodiode DP2m to convert an optical signal received by the photodiode DP2m into a corresponding current signal, which is used to charge parasitic capacitance of the gate of the detection transistor TS2m, so as to change the potential of the gate of the detection transistor TS2m accordingly; and

(131) in the second reading stage t824 of the second row, the high detection voltage VGH is provided for the detection voltage line VG2, so as to control the detection transistor TS2m to operate in a saturation status to make the reading line RLm output a second photocurrent of the second row, which is corresponding to the potential of the gate of the detection transistor TS2m in the second reading stage of the second row; the optical signal detected by the photodiode DP2m may be calculated on the basis of a difference between the second photocurrent of the second row and the first photocurrent of the second row, and the effect of the difference in Vp2m is obviated;

(132) According to some embodiments of the present disclosure, the a.sup.th detection cycle is corresponding to the optical detection pixel units in the a.sup.th row, and the b.sup.th detection cycle is corresponding to the optical detection pixel units in the b.sup.th row, a first reading stage of the a.sup.th row included in the a.sup.th detection cycle and a first reading stage of the b.sup.th row included in the b.sup.th detection cycle do not overlap with each other, a second reading stage of the a.sup.th row included in the a.sup.th detection cycle and a second reading stage of the b.sup.th row included in the b.sup.th detection cycle do not overlap with each other, the first reading stage of the a.sup.th row included in the a.sup.th detection cycle and the second reading stage of the b.sup.th row included in the b.sup.th detection cycle do not overlap with each other, the second reading stage of the a.sup.th row included in the a.sup.th detection cycle and the first reading stage of the b.sup.th row included in the b.sup.th detection cycle do not overlap with each other, both a and b are positive integers, but a is not equal to b.

(133) An optical detection method according to the embodiments of the present disclosure is applied to the aforesaid optical detection circuit, and the optical detection pixel units in the n.sup.th row included in the optical detection circuit is corresponding to an n.sup.th detection cycle; the n.sup.th detection cycle includes an n.sup.th reset stage, an n.sup.th integration stage and an n.sup.th reading stage, which are sequentially arranged; and the optical detection method includes: in the n.sup.th detection cycle,

(134) in the n.sup.th reset stage, resetting a potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column;

(135) in the n.sup.th integration stage, providing a first detection voltage for the detection voltage line in the n.sup.th row to turn off the detection transistor in the n.sup.th row and the m.sup.th column, providing a first photovoltage for the n.sup.th photovoltage terminal, so as to reverse bias the photodiode in the n.sup.th row and the m.sup.th column to convert an optical signal received by the photodiode in the n.sup.th row and the m.sup.th column into a corresponding current signal, and charging parasitic capacitance of the gate of the detection transistor in the n.sup.th row and the m.sup.th column with the current signal, so as to change the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column accordingly;

(136) in the n.sup.th reading stage, providing a second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status, so as to make the reading line in the m.sup.th column output a photocurrent, the photocurrent being corresponding to the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column in the n.sup.th reading stage;

(137) the reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit do not overlap with each other; and

(138) n is a positive integer less than or equal to N, m is a positive integer less than or equal to M, and both N and M are positive integers.

(139) Specifically, the photosensitive element in the n.sup.th row and the m.sup.th column may be a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column; and the optical detection method may further include:

(140) in the n.sup.th reset stage, providing a second photovoltage for the n.sup.th photovoltage terminal to turn on the photodiode in the n.sup.th row and the m.sup.th column so as to reset the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column; and

(141) in the n.sup.th integration stage, controlling to reverse bias the photodiode in the n.sup.th row and the m.sup.th column, so as to enable the photodiode in the n.sup.th row and the m.sup.th column to detect the optical signal.

(142) Specifically, the optical detection circuit may include sampling sub-circuits; and the optical detection method may further include:

(143) in the n.sup.th reading stage, sampling a photocurrent output by the reading line in the m.sup.th column with the sampling sub-circuit, and obtaining the optical signal detected by the photodiode in the n.sup.th row and the m.sup.th column according to the photocurrent output by the reading line in the m.sup.th column.

(144) An optical detection method according to the embodiments of the present disclosure is applied to the aforesaid optical detection circuit, and the photosensitive element in the n.sup.th row and the m.sup.th column is a photodiode in the n.sup.th row and the m.sup.th column; an anode of the photodiode in the n.sup.th row and the m.sup.th column is the first electrode of the photosensitive element in the n.sup.th row and the m.sup.th column, and a cathode of the photodiode in the n.sup.th row and the m.sup.th column is the second electrode of the photosensitive element in the n.sup.th row and the m.sup.th column; and the optical detection pixel units in the n.sup.th row included in the optical detection circuit is corresponding to an n.sup.th detection cycle; the n.sup.th detection cycle includes an n.sup.th reset stage, a first reading stage of the n.sup.th row, an n.sup.th integration stage and a second reading stage of the n.sup.th row, which are sequentially arranged; and the optical detection method includes: in the n.sup.th detection cycle,

(145) in the n.sup.th reset stage, providing a second photovoltage for the n.sup.th photovoltage terminal to turn on the photodiode in the n.sup.th row and the m.sup.th column so as to reset a potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column to a reset voltage of the n.sup.th row and the m.sup.th column, which is equal to VDH−Vpnm;

(146) in the first reading stage of the n.sup.th row, providing a second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status, so as to make the reading line in the m.sup.th column output a first photocurrent, the first photocurrent being corresponding to the reset voltage of the n.sup.th row and the m.sup.th column;

(147) in the n.sup.th integration stage, providing a first detection voltage for the detection voltage line in the n.sup.th row to turn off the detection transistor in the n.sup.th row and the m.sup.th column, providing a first photovoltage for the n.sup.th photovoltage terminal, so as to reverse bias the photodiode in the n.sup.th row and the m.sup.th column to convert an optical signal received by the photodiode in the n.sup.th row and the m.sup.th column into a corresponding current signal, and charging parasitic capacitance of the gate of the detection transistor in the n.sup.th row and the m.sup.th column with the current signal, so as to change the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column accordingly;

(148) in the second reading stage of the n.sup.th row, providing the second detection voltage for the detection voltage line in the n.sup.th row to control the detection transistor in the n.sup.th row and the m.sup.th column to operate in a saturation status, so as to make the reading line in the m.sup.th column output a second photocurrent, the second photocurrent being corresponding to the potential of the gate of the detection transistor in the n.sup.th row and the m.sup.th column in the second reading stage of the n.sup.th row;

(149) Vpnm is a turn-on voltage of the photodiode in the n.sup.th row and the m.sup.th column;

(150) the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit do not overlap with each other; the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit do not overlap with each other; the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit, and the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit do not overlap with each other; and the second reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit, and the first reading stages each included in a detection cycle corresponding to a row of optical detection pixel units included in the optical detection circuit do not overlap with each other; and

(151) n is a positive integer less than or equal to N, m is a positive integer less than or equal to M, and both N and M are positive integers.

(152) Specifically, the optical detection circuit may further include sampling sub-circuits; the optical detection method may further include:

(153) in the first reading stage of the n.sup.th row, sampling by a corresponding sampling sub-circuit a first photocurrent output on the reading line in the m.sup.th column;

(154) in the second reading stage of the n.sup.th row, sampling by a corresponding sampling sub-circuit a second photocurrent output on the reading line in the m.sup.th column;

(155) and

(156) obtaining the optical signal detected by the photodiode in the n.sup.th row and the m.sup.th column on the basis of a difference between the second photocurrent and the first photocurrent.

(157) A display device according to the embodiments of the present disclosure includes the aforesaid optical detection circuit.

(158) The display device according to the embodiments of the present disclosure may be any product or component having a display function, such as a mobile phone, a tablet computer, a TV, a monitor, a laptop computer, a digital photo frame and a navigator.

(159) The above is preferred embodiments of the present disclosure. It should be noted that those of ordinary skill in the art may make various improvements and modifications without departing from the principle of the present disclosure, and these improvements and modifications shall be considered to fall into the protection scope of the present disclosure.