Thyristor valve test system based on cooperation of logical functions of software

Abstract

A thyristor valve test system based on cooperation of logic functions of software, wherein the test system comprises: a thyristor valve (5) to be tested, a VBE (3) and a tester (4), and the VBE (3) has a dedicated test mode, the tester (4) provides three steps for each test item. The thyristor valve (5) to be tested and the VBE (3) are connected by optical fibers (1), and the thyristor valve (5) to be tested and the tester (4) are connected by cables (2), and there is no connection between the VBE (3) and the tester (4).

Claims

1. A thyristor valve test system based on cooperation of logic functions of software, wherein the test system comprises: a tested thyristor valve, a tester and a valve based electronics (VBE), wherein the tested thyristor valve and the VBE are connected via optical fibers, which are used for transmitting a firing pulse (FP) and an indication pulse (IP); the tested thyristor valve and the tester are connected via cables, which are used for the tester to apply a test voltage to the tested thyristor valve; there is no connection between the VBE and the tester; the tested thyristor valve includes at least one thyristor level, the thyristor level at least includes a thyristor, a thyristor control unit (TCU) and an auxiliary circuit; the TCU feeds back an IP1 to the VBE when in normal operation, and the value of a return counter is incremented by 1 each time the VBE receives an IP1; and the TCU feeds back an IP2 to the VBE when being protective fired, and the value of an auxiliary counter is incremented by 1 each time the VBE receives an IP2; VBE is provided with a test mode correspondingly, and in the test mode: a. send a FP to the tested thyristor valve and clear the return counter if the VBE receives N consecutive IP1 and the value of an auxiliary counter is 0; b. after receiving the IP2, the value of the auxiliary counter is incremented by 1, the VBE does not send FP to the tested thyristor valve when next time receiving N consecutive IP1; c. if the VBE does not receive any of the IPs within a certain time T, calculate the number of the IP1 and IP2 from zero by clearing the values of the return counter and the auxiliary counter to 0; and the tester applies different voltages in different stages according to the test requirements.

2. The thyristor valve test system based on cooperation of logic functions of software according to claim 1, wherein applying different voltages in different stages by the tester according to the test requirements specifically refers to that each test item comprises three steps: a. applying a sinusoidal voltage, wherein the tester detects whether the thyristor is turned on during this stage, and determines whether the entire thyristor level circuit and optical paths work normally; b. applying a sinusoidal voltage or a surge voltage or the combination of a sinusoidal voltage and a surge voltage corresponding to the content of the test item, wherein the tester detects the thyristor voltage and current in this stage, and determines whether the thyristor valve in the test item satisfies the electrical requirements; and c. applying a sinusoidal voltage, wherein the tester detects whether the thyristor is turned on in this stage, and determines whether the optical signal sent by the thyristor valve to the VBE in step b is correct.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1 is a schematic diagram of a conventional test system for a thyristor valve.

(2) FIG. 2 is a schematic diagram of a thyristor test system according to the present invention.

(3) FIG. 3 is a spatial layout diagram of a thyristor test system according to the present invention.

(4) FIG. 4 is a logic flow chart of a test mode of a VBE according to the present invention.

(5) FIG. 5 is a step diagram of a test procedure of a tester according to the present invention.

DESCRIPTION OF EMBODIMENTS

(6) The present invention will be further explained and described below in conjunction with an embodiment, but the scope of protection of the present invention is not limited thereto.

(7) The test system provided in the embodiment is shown in FIG. 2, and comprises a tester 4, a tested thyristor valve 5, and a VBE 3, wherein, the tested thyristor valve 5 and the VBE 3 are connected with each other via only two optical fibers which are used for transmitting FP and IP (one for reception and one for transmission); the tested thyristor valve 5 and the tester 4 are connected with each other via only two cables, which are used for the tester 4 to apply a test voltage to the tested thyristor valve 5; there is no connection between the tester 4 and the VBE 3.

(8) The spatial layout of the test system provided in the embodiment is shown in FIG. 3. The tested thyristor valve 5 is connected to the VBE 3 located in the control room 6 through optical fiber 1. The tester 4 is located in a valve hall 7, and is close to the tested thyristor valve 5. The tester 4 is connected to the tested thyristor valve 5 via the cable 2.

(9) By functional logic cooperation, the VBE 3 and the tester 4 in the embodiment can achieve the accuracy of the TCU IP signal without the need of fiber connection. The method is described specifically as follows:

(10) In addition to the normal firing function, the VBE 3 has a dedicated test mode. A testing technician can switch the VBE 3 to the test mode by setting a control word or other method. In the test mode, the functional logic of the VBE 3 is shown in FIG. 4:

(11) Each time when the VBE 3 receives a IP having a width of less than 15 μs, the return counter is incremented by 1. When the count value is 10, if the value of the auxiliary counter is 0, the VBE 3 sends a FP to the tested thyristor valve 5 and clears the counter. If the value of the auxiliary counter is 1, the VBE 3 does not send a firing FP, and directly clears all counters;

(12) When the VBE 3 receives a IP having a width greater than 15 μs, the auxiliary counter is incremented by 1 and the return counter is cleared;

(13) When the VBE 3 does not receive the IP within 2 s, all the counters are cleared.

(14) The tester 4 applies voltage in each test item can be divided into three steps, as shown in FIG. 5:

(15) In the first stage, the tester 4 applies a sinusoidal voltage of 15 cycles. In this stage, the VBE 3 sends a firing FP to the tested thyristor valve 5. If all circuits and optical paths are normal, tested thyristor valve 5 will be turned on, the tester 4 detects the thyristor current in this stage for determining whether the entire thyristor level circuit and optical paths work normally;

(16) In the second stage, the tester 4 applies a sinusoidal voltage or a surge voltage or the combination of a sinusoidal voltage and a surge voltage corresponding to the content of the test project. This stage is the main stage of the test, in which the tester 4 detects the thyristor voltage and current, and determines whether the thyristor valve meets the test requirements of this test item in terms of electrical aspects;

(17) In the third stage, the tester 4 applies a sinusoidal voltage of 15 cycles. In this stage, the VBE 3 determines whether to send a firing FP to the tested thyristor valve 5 according to whether the feedback signal received in the second stage is correct. In this stage, the tester detects whether the thyristor is turned on, and determines whether the optical signal returned to the VBE 3 by the tested thyristor valve 5 in the second stage is correct.

(18) The invention is characterized in that all the tests and test requirements can be achieved by the cooperation in terms of logic function between the VBE and the tester, without inserting and removing the connected fibers in the field.

(19) A person skilled in the art can make variations and modifications within the scope of the invention as long as it does not exceed the scope of the claims.