APPARATUS AND METHOD FOR REFLECTIVE IMAGE DISPLAY WITH DIELECTRIC LAYER

Abstract

Semi-retro-reflective total internal reflection-based image displays may be equipped with at least one dielectric layer. The at least one dielectric layer may be deposited on one or more of a front electrode layer, rear electrode layer or pixel walls. This may lead to displays with enhanced brightness, improved electrophoretic particle responsiveness, improved grayscale and chemical stability in the presence of an electrophoretic medium, and improved resistance to high electric fields and high temperatures. In one embodiment, a total internal reflection-based image display comprises a dielectric layer formed by one or more of methods molecular layer deposition, atomic layer deposition, chemical vapor deposition, plasma enhance chemical vapor deposition, spin coating or slot die coating. In another embodiment, a total internal reflection-based image display comprises at least one dielectric layer and at least one surface modification layer.

Claims

1. A method to form a Total Internal Reflection (TIR) display, the method comprising: forming a transparent front sheet having a plurality of convex protrusions; conformally forming a front electrode over the transparent front sheet; conformally forming a seed layer over the front electrode, the seed layer having a substantially uniform thickness ranging between 0.5-100 nm; conformally forming a dielectric layer over the seed layer, the dielectric layer having a substantially uniform thickness ranging between 1-20 nm; and forming a rear electrode proximal to the dielectric layer, wherein the rear electrode and the dielectric layer form a gap therebetween.

2. The method of claim 1, wherein at least one convex protrusion defines a hemispherical protrusion.

3. The method of claim 1, wherein the seed layer comprises aluminum dioxide (AlO.sub.x), wherein x is between about 1 and 3, and wherein the seed layer comprises a thickness of about 1-10 nm.

4. The method of claim 1, wherein the front electrode comprises Indium Tin Oxide (ITO).

5. The method of claim 1, wherein the front electrode comprises one or more inorganic dielectric layers, one or more organic dielectric layers or a combination of one or more inorganic dielectric layers and one or more organic dielectric layers.

6. The method of claim 1, wherein the step of forming a dielectric layer over the seed layer further comprises forming a dielectric layer comprising SiO.sub.2 having a thickness of at least about 0.05 nm.

7. The method of claim 1, wherein the step of forming a dielectric layer over the seed layer further comprises forming a dielectric layer of SiO.sub.2 having thickness of about one atomic layer.

8. The method of claim 1, wherein the seed layer comprises AlO.sub.x of up to about 10 nm thickness and wherein the dielectric layer comprises SiO.sub.2 of thickness of up to 20 nm.

9. The method of claim 1, wherein the dielectric layer comprises one or more of Si.sub.3N.sub.4, SiO.sub.2, SiN, SiN.sub.x, SiON, AlO.sub.x, Al.sub.2O.sub.3 or ceramic, wherein x is between about 1 and 3.

10. The method of claim 1, wherein the step of forming a dielectric layer further comprises one of atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD), atomic layer epitaxy (ALE), atomic layer growth (ALG), molecular layer epitaxy (MLE), molecular layering (ML), atomic layer CVD (ALCVD) and molecular vapor deposition (MVD).

11. A Total Internal Reflection (TIR) display, comprising: a transparent front sheet having a plurality of convex protrusions; a front electrode formed over the transparent front sheet; a dielectric layer formed over the seed layer, the dielectric layer having a substantially uniform thickness in the range between 1-20 nm; a rear electrode positioned proximal to the dielectric layer, wherein the rear electrode and the dielectric layer form a gap therebetween; and a plurality of electrophoretic particles disposed in the gap.

12. The TIR display of claim 11, further comprising a seed layer formed over the front electrode, the seed layer having a substantially uniform thickness of about 0.5-100 nm.

13. The TIR display of claim 12, wherein at least one convex protrusion defines a hemispherical protrusion.

14. The TIR display of claim 12, wherein the seed layer comprises aluminum dioxide (AlO.sub.x) wherein x is between about 1 and 3, and wherein the AlO.sub.x has a thickness of about 1-10 nm.

15. The TIR display of claim 12, wherein the front electrode comprises Indium Tin Oxide (ITO).

16. The TIR display of claim 12, wherein the front electrode comprises one or more inorganic dielectric layers, one or more organic dielectric layers or a combination of one or more inorganic dielectric layers and one or more organic dielectric layers.

17. The TIR display of claim 12, wherein the dielectric layer further comprises SiO.sub.2 having a thickness of at least about 0.05 nm.

18. The TIR display of claim 12, wherein the dielectric layer further comprises SiO.sub.2 having thickness of about one atomic layer.

19. The TIR display of claim 12, wherein the seed layer comprises AlO.sub.x, wherein x is between about 1 and 3, and wherein the seed layer is up to about 10 nm thickness and wherein the dielectric layer comprises SiO.sub.2 of thickness of up to 20 nm.

20. The TIR display of claim 12, wherein the dielectric layer comprises one or more of Si.sub.3N.sub.4, SiO.sub.2, SiN, SiN.sub.x, SiON, AlO.sub.x, Al.sub.2O.sub.3 or ceramic, and wherein x is between about 1 and 3.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0016] These and other embodiments of the disclosure will be discussed with reference to the following exemplary and non-limiting illustrations, in which like elements are numbered similarly, and where:

[0017] FIG. 1A schematically illustrates a cross-section of a portion of a conventional TIR-based display;

[0018] FIG. 1B schematically illustrates a cross-section of a portion of a conventional TIR-based display showing the approximate location of the evanescent wave region;

[0019] FIG. 1C schematically illustrates a cross-section of a portion of an overhead view of a conventional TIR-based display; and

[0020] FIG. 2 is a graphical representation of a TIR-based image display with various dielectric layer combinations during switching.

DETAILED DESCRIPTION

[0021] Embodiments described herein illustrate methods to deposit dielectric materials in TIR-based reflective image displays that may lead to thin conformal coatings with substantially controlled thickness, resistivity, resistance, permittivity, chemical compatibility/resistance, surface energy, surface charge, minimal pin holes and improved electrical properties. The one or more dielectric layers 126, 128 may be used to protect one or both of the front electrode layer 114 and/or rear electrode layer 116. In some embodiments, the one or more dielectric layers may be deposited on walls 140. In some embodiments, the one or more dielectric layers on front electrode layer 114 may comprise a different composition than the dielectric layer on rear electrode layer 116. The dielectric on the front electrode layer 114 may comprise more than one layer. For example, the dielectric on front electrode 114 may comprise one or more inorganic-based dielectric layers and one or more organic-based dielectric layers or a combination of one or more inorganic dielectric layers and one or more organic dielectric layers. The dielectric on the rear electrode layer 116 may comprise more than one layer. For example, the dielectric on rear electrode 116 may comprise one or more inorganic-based dielectric layers and one or more organic-based dielectric layers. In some embodiments, the one or more dielectric layers 126, 128 may be used to protect one or more pixel walls in display 100. The dielectric layers may be substantially uniform, conforming, continuous and substantially free of surface defects. The one or more dielectric layers may be at least about 0.05 nm in thickness or more. In some embodiments, the dielectric layer thickness may be in the range of about 1-300 nm. In other embodiments, the dielectric layer thickness may be in the range of about 1-200 nm. In still other embodiments, the dielectric layer thickness may be about 1-100 nm. In still other embodiments, the dielectric layer thickness may be about 1-50 nm. In still other embodiments, the dielectric layer thickness may be about 1-20 nm. In still other embodiments, the dielectric layer thickness may be about 1-10 nm.

[0022] In some embodiments, the one or more dielectric layers in TIR-based image displays may not comprise a pin hole. In some embodiments, the one or more dielectric layers may comprise at least one pin hole. The dielectric layer may define a conformal coating and may be free of pin holes or may have minimal pin holes. The dielectric layer may also be a structured layer. The dielectric layer may also act as a barrier layer to prevent moisture or gas ingress. The dielectric layers may have a high or low dielectric constant. In some embodiments, the dielectric layers may have a dielectric constant in the range of about 1-30. In other embodiments, the dielectric layers may have a dielectric constant in the range of about 1-15. In some embodiments, the dielectric layers may further comprise a surface modification layer. The surface modification layer may be used to control the surface properties of the dielectric layers.

[0023] Dielectric materials used in TIR-based image displays may be inorganic in type. The most common inorganic dielectric materials are Si.sub.3N.sub.4 and SiO.sub.2 commonly used in integrated chips. The dielectric layer may be one or more of SiN, SiN.sub.x or SiON. The dielectric layer may be AlO.sub.x or Al.sub.2O.sub.3. Wherein x is between about 1 and 3. The dielectric layer may be a ceramic.

[0024] Dielectric materials used in TIR-based image displays may be organic in type. Organic dielectric materials are typically polymers such as polyimides, fluoropolymers, polynorbornenes and hydrocarbon-based polymers lacking polar groups. The dielectric layers may be a polymer or a combination of polymers. Dielectric layers 126, 128 may comprise one or more of the following polyimide-based dielectrics Dalton DL-5260T, TC-139, DL-2193, Nissan SE-150, SE-410, SE-610, SE-3140N, SE-3310, SE-3510, SE-5661, SE-5811, SE-6414, SE-6514, SE-7492, SE-7992 or JSR AL-1054, AL-3046, AL22620, AL16301, AL60720. The dielectric layers may be combinations of polymers, metal oxides and ceramics. Dielectric layers 126, 128 may comprise Parylene C, Parylene N, Parylene F, Parylene HT or Parylene HTX. Other inorganic or organic dielectric materials or combinations thereof may also be used for the dielectric layers. One or more of the dielectric layers may be PVD, CVD, PECVD or sputter coated. One or more of dielectric layers 126, 128 may be a solution coated polymer, flexo-printed polymer dielectric, vapor deposited dielectric, spin coated polymer dielectric, slot die coated polymer dielectric or sputter deposited dielectric. Dielectric layer 128 may be conformal to electrode structures or could be used to planarize the electrode structures on rear electrode 116.

[0025] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display may be deposited by the method of atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD) or molecular vapor deposition (MVD). In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display may be deposited by the method of thermal or plasma enhanced atomic layer deposition (ALD). ALD may also be referred to as atomic layer epitaxy (ALE), atomic layer growth (ALG), molecular layer epitaxy (MLE), molecular layering (ML) and atomic layer CVD (ALCVD). ALD is a deposition method capable of forming uniform, conformal coatings with thickness controlled at the atomic level onto structured, high aspect ratio surfaces, such as surface 108.

[0026] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a metal oxide. The metal oxide may include one or more of Al.sub.2O.sub.3, AlO.sub.x, BaO.sub.x, CaO, CuO, Er.sub.2O.sub.3, Ga.sub.2O.sub.3, HfO.sub.2, HfO.sub.x, InZnO, InGaZnO, La.sub.2O.sub.3, MgO, MoO.sub.x, Nb.sub.2O.sub.5, NbO.sub.x, NiO, Sc.sub.2O.sub.3, SiO.sub.2, SnO.sub.2, SnO.sub.x, SrO.sub.x, Ta.sub.2O.sub.5, TaO.sub.x, TiO.sub.2, TiO.sub.x, VO.sub.x, Y.sub.2O.sub.3, YO.sub.x, Yb.sub.2O.sub.3, ZnSnO.sub.x, ZnO or ZrO.sub.2 or a combination thereof (where x and y are between about 1 and 3).

[0027] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise one or more of metal nitrides AlN, BN, GaN, SiN, SiN.sub.x, TaN, TaN.sub.x, TiAlN, TiN, WN or TiN.sub.x or a combination thereof (Wherein x is between about 1 and 3).

[0028] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a metal carbide. The metal carbides may include TaC or TiC.

[0029] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a metal sulfide. The metal sulfide may include one or more of ZnS or SrS or a combination thereof.

[0030] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a metal fluoride. The metal fluoride may include one or more of CaF.sub.2, LaF.sub.3, MgF.sub.2 or SrF.sub.2 or a combination thereof.

[0031] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a polymer. In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a biomaterial such as hydroxyapatite Ca.sub.10(PO.sub.4).sub.6(OH).sub.2.

[0032] In an exemplary embodiment, the one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode in a TIR-based image display deposited by the method of ALD may comprise a mixed structure comprising two or more of a metal oxide, metal nitride, metal carbide, metal sulfide, metal fluoride, biomaterial or a polymer.

[0033] In an exemplary embodiment, ALD coatings of dielectrics in a TIR-based image display may be coated on a roll-to-roll method, batch method or spatial ALD method.

[0034] The data in the following table illustrates the advantage of ALD over sputtering. Sputtering is a well-known physical vapor deposition method of forming thin films on surfaces. The method of ALD is more capable of depositing thinner and more uniform layers than sputtering. The following table lists the thickness of a SiO.sub.2 dielectric layer onto a transparent conductive film of indium tin oxide (ITO) in a TIR-based image display as illustrated in FIG. 1A. Sputtering was used to coat SiO2 thickness of about 100 nm and 50 nm. The white state reflectance (%) was measured at about 71% for 100 nm and 81% at 50 nm thickness (The percentage reflectance is measured relative to a white, diffuse 100% reflectance standard by Labsphere, Inc., North Sutton, N.H., USA). The dark or black state reflectance was measured at about 12% for 100 nm thickness and about 13% for 50 nm thickness of SiO.sub.2. This resulted in a contrast ratio (white state reflectance/black state reflectance) of about 5.9 for 100 nm and about 6.2 for 50 nm thickness of SiO.sub.2. ALD was used to coat SiO.sub.2 dielectric layers of 5, 12 and 25 nm. In all cases the white state reflectance was about 80-85%. The dark state reflectance decreased from about 4% at 25 nm thickness down to about 1.7-2% at 5 nm SiO.sub.2 thickness. As a result the contrast ratio increased greatly for ALD coated samples, compared to sputtering, from about 20 and 25 nm up to a ratio of about 40-50 at a thickness of about 5 nm.

TABLE-US-00001 Dielectric White Black Contrast Thickness Deposition Reflectance Reflectance Ratio (nm) Method (%) (%) (W/B) 100 Sputter 71 12 5.9 50 Sputter 81 13 6.2 25 ALD 80-85 4 20-21 12 ALD 80-85   2-3 27-43 5 ALD 80-85 1.7-2 40-50

[0035] The one or more dielectric layers on the front electrode, rear electrode or pixel walls in a TIR-based image display may be deposited by the method of molecular layer deposition (MLD). MLD may be used to deposit polymer-based, inorganic-based and hybrid polymer-inorganic-based dielectric layers in TIR-based image displays. Polymers may, for example, include polyimides or polyamides. MLD may be used to deposit materials comprising one or more of metal oxides such as Al.sub.2O.sub.3, AlO.sub.x, BaO.sub.x, CaO, CuO, Er.sub.2O.sub.3, Ga.sub.2O.sub.3, HfO.sub.2, HfO.sub.x, InZnO, InGaZnO, La.sub.2O.sub.3, MgO, MoO.sub.x, Nb.sub.2O.sub.5, NbO.sub.x, NiO, Sc.sub.2O.sub.3, SiO.sub.2, SnO.sub.2, SnO.sub.x, SrO.sub.x, Ta.sub.2O.sub.5, TaO.sub.x, TiO.sub.2, TiO.sub.x, VO.sub.x, Y.sub.2O.sub.3, YO.sub.x, Yb.sub.2O.sub.3, ZnSnO.sub.x, ZnO or ZrO.sub.2; metal nitrides such as AlN, BN, GaN, SiN, SiN.sub.x, TaN, TaN.sub.x, TiAlN, TiN, WN or TiN.sub.x; metal carbides such as TaC, TiC; metal sulfides such as ZnS, SrS; metal fluorides such as CaF.sub.2, LaF.sub.3, MgF.sub.2, SrF.sub.2; biomaterials such as Ca.sub.10(PO.sub.4).sub.6(OH).sub.2 or combinations thereof (Wherein x is between about 1 and 3). In an exemplary embodiment, the one or more dielectric layers in a TIR-based image display deposited by the method of MLD may comprise a mixed structure comprising two or more of a metal oxide, metal nitride, metal carbide, metal sulfide, metal fluoride, biomaterial or an organic or inorganic polymer.

[0036] The one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode or pixel walls in a TIR-based image display may be deposited by one or more methods of chemical vapor deposition (CVD), molecular vapor deposition (MVD), plasma enhanced atomic layer deposition (PEALD) or plasma-enhanced chemical vapor deposition (PECVD). In an exemplary embodiment, one or more dielectric layers comprising SiO.sub.2 may be deposited using CVD, MVD, MLD, PEALD or PECVD in a TIR-based image display. CVD, MVD, MLD, PEALD or PECVD may be used to deposit materials comprising one or more of metal oxides such as Al.sub.2O.sub.3, AlO.sub.x, BaO.sub.x, CaO, CuO, Er.sub.2O.sub.3, Ga.sub.2O.sub.3, HfO.sub.2, HfO.sub.x, InZnO, InGaZnO, La.sub.2O.sub.3, MgO, MoO.sub.x, Nb.sub.2O.sub.5, NbO.sub.x, NiO, Sc.sub.2O.sub.3, SiO.sub.2, SnO.sub.2, SnO.sub.x, SrO.sub.x, Ta.sub.2O.sub.5, TaO.sub.x, TiO.sub.2, TiO.sub.x, VO.sub.x, Y.sub.2O.sub.3, YO.sub.x, Yb.sub.2O.sub.3, ZnSnO.sub.x, ZnO or ZrO.sub.2; metal nitrides such as AlN, BN, GaN, SiN, SiN.sub.x, TaN, TaN.sub.x, TiAlN, TiN, WN or TiN.sub.x; metal carbides such as TaC, TiC; metal sulfides such as ZnS, SrS; metal fluorides such as CaF.sub.2, LaF.sub.3, MgF.sub.2, SrF.sub.2; biomaterials such as Ca.sub.10(PO.sub.4).sub.6(OH).sub.2 or combinations thereof (Wherein x and y are between about 1 and 3). In an exemplary embodiment, the one or more dielectric layers in a TIR-based image display deposited by the method of CVD, MVD, MLD, PEALD or PECVD may comprise a mixed structure comprising two or more of a metal oxide, metal nitride, metal carbide, metal sulfide, metal fluoride, biomaterial or an organic or inorganic polymer.

[0037] The one or more dielectric layers on the front electrode or the one or more dielectric layers on the rear electrode or pixel walls in a TIR-based image display may be deposited by the method of sputtering. In an exemplary embodiment, one or more dielectric layers comprising SiO.sub.2 may be deposited using sputtering in a TIR-based image display. Sputtering may be used to deposit materials comprising one or more of metal oxides such as Al.sub.2O.sub.3, AlO.sub.x, BaO.sub.x, CaO, CuO, Er.sub.2O.sub.3, Ga.sub.2O.sub.3, HfO.sub.2, HfO.sub.x, InZnO, InGaZnO, La.sub.2O.sub.3, MgO, MoO.sub.x, Nb.sub.2O.sub.5, NbO.sub.x, NiO, Sc.sub.2O.sub.3, SiO.sub.2, SnO.sub.2, SnO.sub.x, SrO.sub.x, Ta.sub.2O.sub.5, TaO.sub.x, TiO.sub.2, TiO.sub.x, VO.sub.x, Y.sub.2O.sub.3, YO.sub.x, Yb.sub.2O.sub.3, ZnSnO.sub.x, ZnO or ZrO.sub.2; metal nitrides such as AlN, BN, GaN, SiN, SiN.sub.x, TaN, TaN.sub.x, TiAlN, TiN, WN or TiN.sub.x; metal carbides such as TaC, TiC; metal sulfides such as ZnS, SrS; metal fluorides such as CaF.sub.2, LaF.sub.3, MgF.sub.2, SrF.sub.2; biomaterials such as Ca.sub.10(PO.sub.4).sub.6(OH).sub.2 or combinations thereof (Wherein x is between about 1 and 3). In an exemplary embodiment, the one or more dielectric layers in a TIR-based image display deposited by the method of sputtering may comprise a mixed structure comprising two or more of a metal oxide, metal nitride, metal carbide, metal sulfide, metal fluoride, biomaterial or an organic or inorganic polymer.

[0038] The one or more dielectric layers on the front electrode, rear electrode or pixel walls in a TIR-based image display may comprise two or more sub-layers. The sub-layers may each comprise a different material. The sub-layers of different materials may be deposited using one or more of the methods of sputtering, ALD, PEALD, MVD, MLD, CVD, PECVD, spin coating or slot die coating. Sub-layers comprising the same or different materials may be deposited by a combination of two or more methods of sputtering, ALD, PEALD, MVD, MLD, CVD, PECVD, spin coating or slot die coating.

[0039] In one embodiment, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-100 nm thick sputtered Al.sub.yO.sub.x (wherein x and y are between about 1 and 3) and a second sub-layer on top comprising about 0.5-100 nm thick layer of sputtered SiO.sub.2.

[0040] In one embodiment, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-50 nm thick of ALD deposited AlO.sub.x and a second sub-layer on top comprising about 0.5-10 nm thick layer of ALD deposited SiO.sub.2. In other embodiments, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-20 nm thick of ALD deposited AlO.sub.x and a second sub-layer on top comprising about 0.5-20 nm thick layer of ALD deposited SiO.sub.2.

[0041] FIG. 2 is a graphical representation of a TIR-based image display with various dielectric layer combinations during switching. In FIG. 2, driving voltage profile 200 is illustrated where the x-axis is the bias driving time in seconds and the y-axis on the right side is the driving voltage applied to the rear electrode. The front electrode, which is located on the surface of the convex protrusions, is connected to the ground. The y-axis on the left side in plot 202 is the optical reflectance (%). The % reflectance (The % reflectance is measured relative to a white, diffuse 100% reflectance standard by Labsphere, Inc., North Sutton, N.H., USA) of each sample over time was recorded continuously while the voltage on the rear electrode was switched in a stepwise manner from 0V to +1V, to 0V, to −1V, and back to 0V (This is one complete cycle) to electrophoretically move particles (e.g. particles 122 in display 100 in FIG. 1A) between the front and rear electrodes in a low refractive index, fluorocarbon-based medium. Each voltage step was held for 60 seconds.

[0042] Four samples were tested with each having a different dielectric layer composition. The first sample labeled “ITO” 204 denoted by a dash-dot-dash line (- ⋅ -) in FIG. 2 is the control and does not comprise a dielectric layer on top of the ITO-based front electrode layer. The second sample labeled “ITO+10 nm AlO.sub.x” 206 denoted by a dashed line (- -) comprises a ˜10 nm thick dielectric layer of aluminum oxide (AlO.sub.x) on top of the ITO-based front electrode. The third sample labeled “ITO+10 nm SiO.sub.2” 208 denoted by a solid line (-) in FIG. 2 comprises a dielectric layer of SiO.sub.2 of about 10 nm on top of the ITO-based front electrode. Lastly, the fourth sample labeled “ITO+10 nm AlO.sub.x+10 nm SiO.sub.2” 210 denoted by a dash-dot-dot-dash line (- ⋅ ⋅ -) comprises a dielectric layer of about 10 nm of AlO.sub.x on top of the ITO-based front electrode followed by a layer of about 10 nm of SiO.sub.2 on top of the AlO.sub.x layer (Wherein x is about 1.5 (i.e., Al.sub.2O.sub.3)).

[0043] Applying +1V at the rear electrode, the positively charged particles are attracted to the front electrode near the evanescent wave region. For all samples 204-210, % reflectance drops to about 8-12% as the particles are attracted to the front electrode layer where they may frustrate TIR and create a dark state as shown in the plot in FIG. 2. Very little difference is observed between the TIR-based displays with the various combinations of dielectric layers. This state is held at 1V for 60 sec.

[0044] A step potential change to −1V is then applied to displays 204-210. The particles are then attracted towards the rear electrode and out of the evanescent wave region. This creates a bright state of the display. Clear differences are observed in the speed by which the particles switch and the magnitude of the % reflectance. Sample 210 with a layer of SiO.sub.2 on top of AlO.sub.x reaches a near maximum % reflectance of about 62% nearly instantaneously once −1V is applied. This is followed by sample 208 that reaches a maximum of about 45% reflectance followed by sample 204 at about 22% reflectance followed lastly by sample 206 with an AlO.sub.x layer on top of ITO of about 14%. The % reflectance is in the order of sample 210>208>204>206.

[0045] The applied voltage is then reversed to +1V where all displays reach a dark state reflectance of about 8-12% as previously observed. One last time in the plot in FIG. 2, the voltage is then stepped to −1V. The same order is observed in the % reflectance as shown previously of 210>208>204>206. The best combination observed is −10 nm layer of AlO.sub.x on top of ITO followed by an outer layer of −10 nm of SiO.sub.2 on top of the AlO.sub.x layer. The second best sample observed is when there is an SiO.sub.2 layer on top of the ITO layer 208. Beneficial switching speed and % reflectance properties are observed when the outer SiO.sub.2 layer includes an AlO.sub.x layer sandwiched between the ITO and SiO.sub.2 layers.

[0046] In one embodiment, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-100 nm thick of ALD deposited AlO.sub.x and a second sub-layer on top comprising about 0.5-200 nm thick layer of CVD deposited SiN.sub.x. In one embodiment, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-50 nm thick of ALD deposited AlO.sub.x and a second sub-layer on top comprising about 0.5-100 nm thick layer of CVD deposited SiN.sub.x. In other embodiments, one or more dielectric coatings on the front or rear electrode layers in a TIR-based image display may include a first sub-layer comprising about 0.5-20 nm thick of ALD deposited AlO.sub.x and a second sub-layer on top comprising about 0.5-20 nm thick layer of CVD deposited SiN.sub.x.

[0047] In an exemplary embodiment, dielectric layers may also be deposited on pixels walls in a TIR-based image display by one or more of methods sputtering, ALD, MLD, MVD, PEALD, CVD, PECVD, spin coating or slot die coating.

[0048] In an exemplary embodiment, any of the metal oxide, metal nitride, metal sulfide, metal carbide, metal fluoride, polymeric or biomaterial-based dielectric materials that may be deposited by one or methods of sputtering, ALD, MLD, MVD, PEALD, CVD, PECVD, spin coating or slot die coating may further comprise a surface modification layer. The surface modification layer may be deposited by a variety of methods such as wet deposition method, spin coating, slot die coating, dry deposition method, vapor deposition, MVD, ALD, MLD, PEALD, CVD or PECVD. The surface modification layer may comprise a silane-based material. The silane-based material may comprise one or more of a hydrocarbon chain, fluorocarbon chain, amino group, ammonium group, chlorine, bromine, phosphoric acid group, carboxylate group, phenyl group, hydroxyl group, acrylate, methacrylate or an alkoxy group such as a methoxy or ethoxy group. The silane-based material may comprise one or more of 3-(trimethoxysilyl)propyl methacrylate, 1H,1H,2H,2H-Perfluorododecyltrichlorosilane, trichlorododecylsilane, hexadecyltrimethoxysilane, octadecyldimethyl (3-trimethoxysilylpropyl)ammonium chloride, N-trimethoxysilylpropyl-N,N,N-trimethylammonium chloride, carboxyethylsilanetriol-disodium salt, phosphoric acid 2-hydroxyethyl methacrylate ester, nonafluorohexyltrimethoxysilane, 2-phenylethyltrimethoxysilane or hexamethyldisilazane. In an exemplary embodiment, the silane-based material may comprise one or both of a positively charged group or a negatively charged group.

[0049] In the exemplary display embodiments described herein, they may be used in Internet of Things (IoT) devices. The IoT devices may comprise a local wireless or wired communication interface to establish a local wireless or wired communication link with one or more IoT hubs or client devices. The IoT devices may further comprise a secure communication channel with an IoT service over the internet using a local wireless or wired communication link. The IoT devices comprising one or more of the display devices described herein may further comprise a sensor. Sensors may include one or more of a temperature, humidity, light, sound, motion, vibration, proximity, gas or heat sensor. The IoT devices comprising one or more of the display devices described herein may be interfaced with home appliances such as a refrigerator, freezer, television (TV), close captioned TV (CCTV), stereo system, heating, ventilation, air conditioning (HVAC) system, robotic vacuum, air purifiers, lighting system, washing machine, drying machine, oven, fire alarms, home security system, pool equipment, dehumidifier or dishwashing machine. The IoT devices comprising one or more of the display devices described herein may be interfaced with health monitoring systems such as heart monitoring, diabetic monitoring, temperature monitoring, biochip transponders or pedometer. The IoT devices comprising one or more of the display devices described herein may be interfaced with transportation monitoring systems such as those in an automobile, motorcycle, bicycle, scooter, marine vehicle, bus or airplane.

[0050] In the exemplary display embodiments described herein, they may be used IoT and non-IoT applications such as in, but not limited to, electronic book readers, portable computers, tablet computers, cellular telephones, smart cards, signs, watches, wearables, military display applications, automotive displays, automotive license plates, shelf labels, flash drives and outdoor billboards or outdoor signs comprising a display. The displays may be powered by one or more of a battery, solar cell, wind, electrical generator, electrical outlet, AC power, DC power or other means.

[0051] The following non-limiting exemplary embodiments are provided to further illustrate different aspect of the disclosed embodiments.

[0052] Example 1 is directed to a method to form a Total Internal Reflection (TIR) display, the method comprising: forming a transparent front sheet having a plurality of convex protrusions; conformally forming a front electrode over the transparent front sheet; conformally forming a seed layer over the front electrode, the seed layer having a substantially uniform thickness of about 0.5-100 nm; conformally forming a dielectric layer over the seed layer, the dielectric layer having a substantially uniform thickness in the range of about 1-20 nm; and forming a rear electrode proximal to the dielectric layer; wherein the rear electrode and the dielectric layer form a gap therebetween.

[0053] Example 2 is directed to the method of example 1, wherein at least one convex protrusion defines a hemispherical protrusion.

[0054] Example 3. is directed to the method of example 1, wherein the seed layer comprises aluminum dioxide (AlO.sub.x), wherein x is between about 1 and 3, and wherein the seed layer comprises a thickness of about 1-10 nm.

[0055] Example 4 is directed to the method of example 1, wherein the front electrode comprises Indium Tin Oxide (ITO).

[0056] Example 5 is directed to the method of example 1, wherein the front electrode comprises one or more inorganic dielectric layers, one or more organic dielectric layers or a combination of one or more inorganic dielectric layers and one or more organic dielectric layers.

[0057] Example 6 is directed to the method of example 1, wherein the step of forming a dielectric layer over the seed layer further comprises forming a dielectric layer comprising SiO.sub.2 having a thickness of at least about 0.05 nm.

[0058] Example 7 is directed to the method of example 1, wherein the step of forming a dielectric layer over the seed layer further comprises forming a dielectric layer of SiO.sub.2 having thickness of about one atomic layer.

[0059] Example 8 is directed to the method of example 1, wherein the seed layer comprises AlO.sub.x of up to about 10 nm thickness and wherein the dielectric layer comprises SiO.sub.2 of thickness of up to 20 nm.

[0060] Example 9 is directed to the method of example 1, wherein the dielectric layer comprises one or more of Si3N4, SiO2, SiN, SiN.sub.x, SiON, AlO.sub.x, Al2O3 or ceramic, wherein x is between about 1 and 3.

[0061] Example 10 is directed to the method of example 1, wherein the step of forming a dielectric layer further comprises one of atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD), atomic layer epitaxy (ALE), atomic layer growth (ALG), molecular layer epitaxy (MLE), molecular layering (ML), atomic layer CVD (ALCVD) and molecular vapor deposition (MVD).

[0062] Example 11 is directed to a Total Internal Reflection (TIR) display, comprising: a transparent front sheet having a plurality of convex protrusions; a front electrode formed over the transparent front sheet; a dielectric layer formed over the seed layer, the dielectric layer having a substantially uniform thickness in the range of about 1-20 nm; a rear electrode positioned proximal to the dielectric layer, wherein the rear electrode and the dielectric layer form a gap therebetween; and a plurality of electrophoretic particles disposed in the gap.

[0063] Example 12 is directed to the TIR display of example 11, further comprising a seed layer formed over the front electrode, the seed layer having a substantially uniform thickness of about 0.5-100 nm.

[0064] Example 13 is directed to the TIR display of example 12, wherein at least one convex protrusion defines a hemispherical protrusion.

[0065] Example 14 is directed to the TIR display of example 12, wherein the seed layer comprises aluminum dioxide (AlO.sub.x), wherein x is between about 1 and 3, and wherein the AlO.sub.x has a thickness of about 1-10 nm.

[0066] Example 15 is directed to the TIR display of example 12, wherein the front electrode comprises Indium Tin Oxide (ITO).

[0067] Example 16 is directed to the TIR display of example 12, wherein the front electrode comprises one or more inorganic dielectric layers, one or more organic dielectric layers or a combination of one or more inorganic dielectric layers and one or more organic dielectric layers.

[0068] Example 17 is directed to the TIR display of example 12, wherein the dielectric layer further comprises SiO2 having a thickness of at least about 0.05 nm.

[0069] Example 18 is directed to the TIR display of example 12, wherein the dielectric layer further comprises SiO2 having thickness of about one atomic layer.

[0070] Example 19 is directed to the TIR display of example 12, wherein the seed layer comprises AlO.sub.x, wherein x is between about 1 and 3, and wherein the seed layer is up to about 10 nm thickness and wherein the dielectric layer comprises SiO2 of thickness of up to 20 nm.

[0071] Example 20 is directed to the TIR display of example 12, wherein the dielectric layer comprises one or more of Si3N4, SiO2, SiN, SiN.sub.x, SiON, AlO.sub.x, Al2O3 or ceramic, and wherein x is between about 1 and 3.

[0072] While the principles of the disclosure have been illustrated in relation to the exemplary embodiments shown herein, the principles of the disclosure are not limited thereto and include any modification, variation or permutation thereof.

[0073] Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.

[0074] The figures and the following description describe certain embodiments by way of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles described herein. Reference will now be made in detail to several embodiments, examples of which are illustrated in the accompanying figures. It is noted that wherever practicable similar or like reference numbers may be used in the figures to indicate similar or like functionality.

[0075] The foregoing description of the embodiments of the present invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the present invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the present invention be limited not by this detailed description, but rather by the claims of this application. As will be understood by those familiar with the art, the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Likewise, the particular naming and division of the modules, routines, features, attributes, methodologies and other aspects are not mandatory or significant, and the mechanisms that implement the present invention or its features may have different names, divisions and/or formats.

[0076] Additionally, the present invention is in no way limited to implementation in any specific programming language, or for any specific operating system or environment. Accordingly, the disclosure of the present invention is intended to be illustrative, but not limiting, of the scope of the present invention, which is set forth in the following claims.