Precharge resistor protection apparatus

Abstract

A precharge resistor protection apparatus including a sensing unit configured to measure a battery voltage applied to both ends of a battery cell included in the battery pack and a precharge current flowing in the precharge resistor, and a processor operably coupled to the sensing unit. The processor calculates a first power estimated as being supplied to the precharge resistor and a second power supplied to the precharge resistor during a driving time of the precharge circuit unit by using at least one of a capacitance of a capacitor connected to both ends of the battery pack, the battery voltage and the precharge current, compares a reference power range according to the first power with the second power, and controls an operation state of the precharge relay based on the comparison result.

Claims

1. A precharge resistor protection apparatus configured to protect a precharge resistor that is connected in series to a precharge relay of a precharge circuit unit, wherein the precharge resistor apparatus is configured to be connected in parallel to a main relay provided to a charge and discharge path of a battery pack, the precharge resistor protection apparatus comprising: one or more sensors configured to measure a battery voltage applied to both ends of a battery cell included in the battery pack and a precharge current flowing in the precharge resistor; and a processor operably coupled to the one or more sensors, wherein the processor calculates is configured to: calculate a first power estimated as being supplied to the precharge resistor and a second power supplied to the precharge resistor during a driving time of the precharge circuit unit based on at least one of a capacitance of a capacitor connected to both ends of the battery pack, the battery voltage and the precharge current; compare a reference power range based on the first power with the second power; and control an operation state of the precharge relay based on a result of the comparison.

2. The precharge resistor protection apparatus according to claim 1, wherein the processor is configured to calculate the first power according to the following equation: $W1={\int }_{T1}^{T2}\mathrm{Vb}\left(T1\right)\times \left(\left(\frac{\mathrm{Vb}\left(T1\right)}{R}\right)\times e^{-\left(\frac{t}{\mathrm{RC}}\right)}\right)\mathrm{dt}$ wherein W1 is the first power, T1 is a start point of the driving time, T2 is an end point of the driving time, Vb(T1) is the battery voltage measured at the start point of the driving time, R is a resistance of the precharge resistor, and C is the capacitance of the capacitor.

3. The precharge resistor protection apparatus according to claim 1, wherein the processor is configured to calculate the driving time as a time difference between a first time point at which a turn-on control signal for controlling the operation state of the precharge relay to a turn-on state is output and a second time point at which a turn-off control signal for controlling the operation state of the precharge relay to a turn-off state is output.

4. The precharge resistor protection apparatus according to claim 1, wherein the processor is configured to calculate the second power supplied to the precharge resistor during the driving time based on the precharge current and the battery voltage.

5. The precharge resistor protection apparatus according to claim 4, wherein the processor is configured to calculate the second power according to the following equation:
W2=∫.sub.T1.sup.T2Vb(t)×Ir(t)dt wherein W2 is the second power, T1 is a start point of the driving time, T2 is an end point of the driving time, Vb(t) is the battery voltage, and Ir(t) is the precharge current.

6. The precharge resistor protection apparatus according to claim 4, wherein the processor is configured to: set a first reference power range; and set a second reference power range lower than the first reference power range, based on the first power.

7. The precharge resistor protection apparatus according to claim 6, wherein the processor is configured to determine that a circuit connected to the capacitor is shorted, when the second power is within the first reference power range based on the result of the comparison.

8. The precharge resistor protection apparatus according to claim 6, wherein the processor is configured to determine that both ends of the battery pack are opened, when the second power is within the second reference power range based on the result of the comparison.

9. The precharge resistor protection apparatus according to claim 6, wherein the processor is configured to control at least one of the operation state of the precharge relay or an operation state of the main relay to a turn-off state, when the second power is within the first reference power range or the second reference power range based on the result of the comparison.

10. A battery management device, which comprises the precharge resistor protection apparatus according to claim 1.

Description

DESCRIPTION OF DRAWINGS

(1) The accompanying drawings illustrate a preferred embodiment of the present disclosure and together with the foregoing disclosure, serve to provide further understanding of the technical features of the present disclosure, and thus, the present disclosure is not construed as being limited to the drawing.

(2) FIG. 1 is a diagram schematically showing a conventional battery pack including a precharge circuit unit.

(3) FIG. 2 is a block diagram schematically showing a precharge resistor protection apparatus according to an embodiment of the present disclosure.

(4) FIG. 3 is a diagram schematically showing a connection configuration among the precharge resistor protection apparatus according to an embodiment of the present disclosure, a battery pack and a load.

(5) FIG. 4 is a diagram for illustrating a process in which the precharge resistor protection apparatus according to an embodiment of the present disclosure diagnoses whether a circuit connected to a capacitor is shorted.

(6) FIG. 5 is a diagram for illustrating a process in which the precharge resistor protection apparatus according to an embodiment of the present disclosure diagnoses whether both ends of the battery pack are opened.

(7) FIG. 6 is a diagram schematically showing a connection configuration among the precharge resistor protection apparatus according to another embodiment of the present disclosure, the battery pack and the load.

DETAILED DESCRIPTION

(8) Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Prior to the description, it should be understood that the terms used in the specification and the appended claims should not be construed as limited to general and dictionary meanings, but interpreted based on the meanings and concepts corresponding to technical aspects of the present disclosure on the basis of the principle that the inventor is allowed to define terms appropriately for the best explanation.

(9) Therefore, the description proposed herein is just a preferable example for the purpose of illustrations only, not intended to limit the scope of the disclosure, so it should be understood that other equivalents and modifications could be made thereto without departing from the scope of the disclosure.

(10) Additionally, in describing the present disclosure, when it is deemed that a detailed description of relevant known elements or functions renders the key subject matter of the present disclosure ambiguous, the detailed description is omitted herein.

(11) FIG. 2 is a block diagram schematically showing a precharge resistor protection apparatus 100 according to an embodiment of the present disclosure, and FIG. 3 is a diagram schematically showing a connection configuration among the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure, a battery pack and a load L.

(12) Referring to FIGS. 2 and 3, the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure may protect a precharge resistor Rp provided in a precharge circuit unit PC that is included in a battery pack.

(13) The battery pack including the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure may have a main relay R1 provided to a charge and discharge path and a precharge circuit unit PC connected in parallel to the main relay RE The precharge circuit unit PC may have a precharge resistor Rp and a precharge relay R2 connected in series to each other. Also, the battery pack may include one or more battery cells, and the plurality of battery cells may be connected in series and/or in parallel. In the present disclosure, the plurality of battery cells will be modeled as one equivalent battery cell B.

(14) Meanwhile, a load L may be connected to both ends of the battery pack, namely to an output terminal, and the load L may have a capacitor C1 connected in parallel to the output terminal. That is, both ends of the capacitor C1 may be connected to both ends of the battery pack.

(15) The capacitor C1 may refer to an element having a capacitance and satisfying Equation 1 below.
I=C dv/dt  <Equation 1>
where C is a capacitance of the capacitor, I is a current flowing in the capacitor, V is a voltage at both ends of the capacitor, and t is time.

(16) In addition, the capacitor C1 may be implemented not only as a single capacitor but also as a combination of a plurality of capacitors, and may also be implemented as a combination of passive elements and active elements different from each other. In addition, the capacitance C of the capacitor C1 is not limited and may have an optimal value selected in consideration of the voltage at both ends of the battery pack. Meanwhile, it is preferable that the capacitance C of the capacitor C1 is known in advance or is easily measured.

(17) Referring to FIGS. 2 and 3 again, the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure may include a sensing unit 110, a memory unit 120, a processor 130, and a notification unit 140.

(18) The sensing unit 110 is operably coupled to the processor 130. That is, the sensing unit 110 may be connected to the processor 130 to transmit an electrical signal to the processor 130 or to receive an electrical signal from the processor 130.

(19) The sensing unit 110 may measure data that is used for the processor 130 to estimate a first power and calculate a second power, explained later.

(20) To this end, the sensing unit 110 may repeatedly measure a battery voltage applied to both ends of the battery cell B and a precharge current flowing in the precharge resistor Rp at predetermined intervals and provide a measurement signal indicating the measured battery voltage and precharge current to the processor 130.

(21) The sensing unit 110 may include a voltage sensor configured to measure a battery voltage applied to both ends of the battery cell B. Also, the sensing unit 110 further includes a current sensor configured to measure a precharge current flowing in the precharge resistor Rp.

(22) If a measurement signal is received from the sensing unit 110, the processor 130 may determine digital values of the battery voltage and the precharge current, respectively, through signal processing and then store the digital values in the memory unit 120.

(23) The memory unit 120 is a semiconductor memory device that records, erases and updates data generated by the processor 130, and stores a plurality of program codes prepared for protecting the precharge resistor Rp. In addition, the memory unit 120 may store preset values of various predetermined parameters used in implementing the present disclosure.

(24) The memory unit 120 may is not particularly limited as long as it is a semiconductor memory element known in the art as being capable of recording, erasing and updating data. For example, the memory unit 120 may be dynamic random access memory (DRAM), synchronous DRAM (SDRAM), a flash memory, read-only memory (ROM), electrically-erasable programmable read-only memory (EEPROM), a register, and the like. In addition, the memory unit 120 may further include a storage medium that stores program codes defining the control logics of the processor 130. The storage medium includes a non-volatile storage element such as a flash memory or a hard disk. The memory unit 120 may be physically separate from the processor 130 or may be integrated with the processor 130.

(25) The processor 130 may estimate the first power estimated as being supplied to the precharge resistor Rp during a driving time of a precharge circuit unit PC by using the capacitance of the capacitor C1 connected to both ends of the battery pack and the battery voltage.

(26) In order to drive the precharge circuit unit PC, the processor 130 may control the operation state of the main relay R1 into a turn-off state and control the operation state of the precharge relay R2 into a turn-on state. Accordingly, the voltage of the battery cell B may be applied to the capacitor C1 of the load L via the precharge circuit unit PC. In addition, the current may flow through the precharge circuit unit PC. That is, the current may also flow through the precharge resistor Rp provided in the precharge circuit unit PC.

(27) After that, in order to terminate the operation of the precharge circuit unit PC, the processor 130 may control the operation state of the precharge relay R2 into a turn-off state. Accordingly, the voltage of the battery cell B may not be applied to the precharge circuit unit PC and the capacitor C1 of the load L. Also, the current may not flow in the precharge circuit unit PC. That is, the current may not also flow through the precharge resistor Rp provided in the precharge circuit unit PC.

(28) At this time, the processor 130 may calculate the driving time as a time difference between a first time point at which a turn-on control signal for controlling the operation state of the precharge relay R2 into a turn-on state is output and a second time point at which a turn-off control signal for controlling the operation state of the precharge relay R2 into a turn-off state is output. At this time, the first time point and the second time point may be a start point and an end point of the driving time of the precharge circuit unit PC, respectively.

(29) That is, the processor 130 may calculate the time during which the current flows through the precharge resistor Rp as the driving time.

(30) In this way, the processor 130 may estimate the first power estimated as being supplied to the precharge resistor Rp during the driving time of the precharge circuit unit PC by using the capacitance of the capacitor C1 connected to both ends of the battery pack and the battery voltage.

(31) The first power may be a power estimated in a state where the capacitor C1 of the load L is normally connected to both ends of the battery pack and a short circuit failure or an open failure does not occur in the circuit connected to the precharge circuit unit PC and the capacitor C1 of the load L.

(32) At this time, the processor 130 may calculate the first power by using Equation 2 below.

(33) $\begin{array}{cc}W1={\int }_{T1}^{T2}\mathrm{Vb}\left(T1\right)\times \left(\left(\frac{\mathrm{Vb}\left(T1\right)}{R}\right)\times e^{-\left(\frac{t}{\mathrm{RC}}\right)}\right)\mathrm{dt}& .Math.\mathrm{Equation}2.Math.\end{array}$

(34) where W1 is the first power, T1 is a start point of the driving time, T2 is an end point of the driving time, Vb(T1) is the battery voltage measured at the start point of the driving time, R is a resistance of the precharge resistor, and C is a capacitance of the capacitor.

(35) More specifically, if the operation state of the precharge relay R2 is controlled into a turn-on state and the operation state of the main relay R1 is controlled into a turn-off state, it is possible to form an RC circuit that has the precharge resistor Rp and the capacitor C1 and uses the battery cell B as a voltage source.

(36) By using this, the processor 130 may calculate and estimate the first power by multiplying the battery voltage by the calculated value of the current calculation equation for the capacitor C1 corresponding to the RC circuit during the driving time of the precharge circuit unit PC.

(37) After that, the processor 130 may set a first reference power range and a second reference power range by using the calculated first power. Here, the second reference power range may be set lower than the first reference power range.

(38) More specifically, the processor 130 may set the first reference power range to be more than double of the calculated first power. In addition, the processor 130 may set the second reference power range to be less than half of the calculated first power.

(39) After that, the processor 130 may calculate the second power supplied to the precharge resistor Rp during the driving time of the precharge circuit unit PC by using the precharge current and the battery voltage. Here, the second power may refer a power actually supplied to the precharge resistor Rp during the driving time of the precharge circuit unit PC.

(40) At this time, the processor 130 may calculate the second power by using Equation 3 below.
W2=∫.sub.T1.sup.T2Vb(t)×Ir(t)dt  <Equation 3>

(41) where W2 is the second power, T1 is a start point of the driving time, T2 is an end point of the driving time, Vb(t) is the battery voltage, and Ir(t) is the precharge current.

(42) Hereinafter, the process in which the processor 130 compares the second power with the reference power range (the first reference power range and the second reference power range) will be described.

(43) FIG. 4 is a diagram for illustrating a process in which the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure diagnoses whether a circuit connected to the capacitor C1 is shorted.

(44) Referring to FIG. 4, the processor 130 may diagnose that the circuit connected to the capacitor C1 is shorted, if the estimated second power is included in the first reference power range. More specifically, as shown in FIG. 4, if the circuit connected to the capacitor C1 is shorted to the ground GND, the power over an allowed power level may be supplied to the precharge resistor Rp.

(45) Accordingly, the second power, which is the power actually supplied to the precharge resistor Rp, may be included in the first reference power range that is set to more than double of the first power.

(46) By using this, the processor 130 may diagnose that the circuit connected to the capacitor C1 is shorted, if the estimated second power is included in the first reference power range.

(47) After that, the processor 130 may control the operation state of the precharge relay R2 into a turn-off state, if the estimated second power is included in the first reference power range. By doing so, the processor 130 allows the precharge resistor Rp not to be supplied with power any more, thereby preventing the precharge resistor Rp from being damaged.

(48) In another embodiment, the processor 130 may control the operation state of the main relay R1 into a turn-off state, if the estimated second power is included in the first reference power range. By doing so, the processor 130 may allow the battery cell B not to be shorted to the ground GND, thereby preventing the battery cell B from being discharged as the voltage of the battery cell B is applied to the ground GND.

(49) FIG. 5 is a diagram for illustrating a process in which the precharge resistor protection apparatus 100 according to an embodiment of the present disclosure diagnoses whether both ends of the battery pack are opened.

(50) Referring to FIG. 5 further, the processor 130 may diagnose that both ends of the battery pack are opened, if the estimated second power is included in the second reference power range. More specifically, as shown in FIG. 5, if the capacitor C1 of the load L is not connected to both ends of the battery pack, both ends of the battery pack may be opened so that the current may not flow through the precharge resistor Rp.

(51) Accordingly, the second power, which is a power actually supplied to the precharge resistor Rp, may be included in the second reference power range that is set to be less than half of the first power.

(52) By using this, the processor 130 may diagnose that both ends of the battery pack are opened, if the estimated second power is included in the second reference power range.

(53) After that, the processor 130 may control the operation state of the precharge relay R2 and the main relay R1 into a turn-off state, if the estimated second power is included in the second reference power range. By doing so, the processor 130 may prevent a worker or a user from being electrically shocked as the current of the battery pack is leaked to both open ends of the battery pack.

(54) Meanwhile, the processor 130 may selectively include an application-specific integrated circuit (ASIC), another chipset, a logic circuit, a register, a communication modem, and a data processing device. At least one of the various control logics executable by the processor 130 may be combined, and the combined control logic is written in a computer-readable code system and recorded on a computer-readable recording medium. The recording medium has no limitation as long as it can be accessed by the processor 130 included in a computer. As one example, the recording medium includes at least one selected from the group consisting of a ROM, a RAM, a register, a CD-ROM, a magnetic tape, a hard disk, a floppy disk and an optical data recording device. In addition, the code system may be modulated into a carrier signal and stored in a communication carrier at a specific time, and may be stored and executed in a distributed manner on computers connected through a network. Moreover, functional programs, code and segments for implementing the combined control logics may be easily inferred by programmers in the technical field to which the present disclosure belongs.

(55) Meanwhile, the notification unit 140 may receive the diagnosis result of the processor 130 from the processor 130 or output the diagnosis result of the processor 130 stored in the memory unit 120 to the outside.

(56) More specifically, the notification unit 140 may include at least one of a display unit for displaying the diagnosis result of the processor 130 by using at least one of symbols, numbers and codes, and a speaker unit for outputting the diagnosis result of the processor 130 with a sound.

(57) Hereinafter, a precharge resistor protection apparatus 100′ according to another embodiment of the present disclosure will be described.

(58) FIG. 6 is a diagram schematically showing a connection configuration among the precharge resistor protection apparatus 100′ according to another embodiment of the present disclosure, the battery pack and the load L.

(59) Referring to FIG. 6 further, the precharge resistor protection apparatus 100′ according to another embodiment of the present disclosure is substantially identical to the precharge resistor protection apparatus 100 of the former embodiment, except that a variable resistor Rv is further provided to the charge and discharge path of the battery pack. Thus, repeated description will be omitted.

(60) The variable resistor Rv may be a resistance element whose resistance is changed under the control of the processor 130. The type of the variable resistor Rv is not limited as long as the resistance changes corresponding to the control signal of the processor 130.

(61) The processor 130 according to another embodiment may control the variable resistor Rv to change the resistance of the variable resistor Rv into a minimum resistance before the circuit connected to the capacitor C1 is diagnosed as being shorted.

(62) After that, the processor 130 may diagnose that the circuit connected to the capacitor C1 is shorted to the ground GND, if the second power described above is included in the first reference power range. The processor 130 may control the variable resistor Rv to increase the resistance of the variable resistor Rv, if the circuit connected to the capacitor C1 is diagnosed as being shorted to the ground GND. At this time, the processor 130 may control the variable resistor Rv to increase the resistance of the variable resistor Rv corresponding to the battery voltage.

(63) By doing so, if the circuit connected to the capacitor C1 is shorted to the ground GND and a non-load circuit is formed between the battery cell B and the ground GND, it is possible to prevent the battery cell B from being discharged as the battery voltage of the battery cell B is applied to the ground GND.

(64) Meanwhile, the precharge resistor protection apparatus according to the present disclosure may be applied to a battery management device for managing a battery, such as a battery pack and an energy storage device. That is, the battery management device according to the present disclosure may include the precharge resistor protection apparatus according to the present disclosure.

(65) The present disclosure has been described in detail. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the disclosure, are given by way of illustration only, since various changes and modifications within the scope of the disclosure will become apparent to those skilled in the art from this detailed description.

(66) The features described in the individual embodiments of this specification may be implemented in combination in a single embodiment. Conversely, various features described in a single embodiment may be implemented in various embodiments individually or in a suitable sub-combination.