SYSTEM AND METHOD FOR TESTING OPTICAL RECEIVERS

Abstract

Disclosed are a testing unit, system, and method for testing and predicting failure of optical receivers. The testing unit and system are configured to apply different values of current, voltage, heat stress, and illumination load on the optical receivers during testing. The test methods are designed to check dark current, photo current, forward voltage, and drift over time of these parameters.

Claims

1.-34. (canceled)

35. A method for testing optical receivers, the method comprising: placing within a temperature controlled oven: a testing board configured to support at least one socket, wherein each socket is configured to receive a substrate configured to support at least one optical receiver; and an emitter board configured to support at least one optical emitter, wherein the emitter board is supported above the testing board such that the emitter board is substantially parallel to the testing board and each of the one or more optical emitters on the emitter board is substantially aligned with a corresponding socket of the testing board; and performing one or more testing operations without removal of the testing board or the emitter board from the temperature controlled oven.

36. The method according to claim 35, wherein the one or more testing operations further comprise a pre-test procedure comprising: determining a temperature of the substrate; and outputting a fail state in an instance in which the determined temperature of the substrate is outside an operating range of the optical receiver.

37. The method according to claim 35, wherein the one or more testing operations further comprise a pre-test procedure comprising: determining an absence of the optical receiver supported by the substrate; and outputting a fail state in response to the absence of the optical receiver.

38. The method according to claim 35, wherein the one or more testing operations further comprise a pre-test procedure comprising: applying a current to the optical receiver; measuring a voltage of the optical receiver; and outputting a fail state in an instance in which the measured voltage is outside an operating range of the optical receiver.

39. The method according to claim 35, wherein the one or more testing operations further comprise a pre-test procedure comprising: determining an open circuit and/or leakage on the optical receiver; outputting a fail state in response to the determined open circuit and/or leakage.

40. The method according to claim 35, wherein the one or more testing operations further comprise a pre-test procedure comprising: determining a temperature of the substrate; determining an absence of the optical receiver supported by the substrate; applying a current to the optical receiver; measuring a voltage of the optical receiver; determining an open circuit and/or leakage on the optical receiver; and outputting a fail state: in an instance in which the determined temperature of the substrate is outside an operating range of the optical receiver; in response to the absence of the optical receiver, in an instance in which the measured voltage is outside an operating range of the optical receiver; or in response to the determined open circuit and/or leakage.

41. The method according to claim 35, wherein the one or more testing operations further comprise a first testing procedure comprising: applying a reverse voltage to the optical receiver; determining a dark current for the optical receiver; outputting a fail state in an instance in which the determined dark current is outside of a designed operating range of the optical receiver; and storing the dark current and a temperature at a Time=0 in an instance in which the determined dark current is inside of a designed operating range of the optical receiver.

42. The method according to claim 35, wherein the one or more testing operations further comprise a first testing procedure comprising: applying a reverse voltage to the optical receiver; providing an illumination load on the optical receiver; determining a photo current for the optical receiver; outputting a fail state in an instance in which the determined photo current is outside of a designed operating range of the optical receiver; and storing the photo current and a temperature at a Time=0 in an instance in which the determined photo current is inside of a designed operating range of the optical receiver.

43. The method according to claim 35, wherein the one or more testing operations further comprise a first testing procedure comprising: applying a forward current to the optical receiver; determining a forward voltage for the optical receiver; outputting a fail state in an instance in which the determined forward voltage is outside of a designed operating range of the optical receiver; and storing the forward voltage and a temperature at a Time=0 in an instance in which the determined forward voltage is inside of a designed operating range of the optical receiver.

44. The method according to claim 35, wherein the one or more testing operations further comprise a first testing procedure comprising: applying a reverse voltage to the optical receiver; determining a dark current for the optical receiver; providing an illumination load on the optical receiver; determining a photo current for the optical receiver; applying a forward current to the optical receiver; determining a forward voltage for the optical receiver; outputting a fail state in an instance in which: the determined dark current is outside of a designed operating range of the optical receiver; the determined photo current is outside of a designed operating range of the optical receiver; and/or the determined forward voltage is outside of a designed operating range of the optical receiver; and storing the dark current, the photo current, the forward voltage, and a temperature at a Time=0 in an instance in which the determined dark current, the photo current, and the forward voltage are inside of a designed operating range of the optical receiver.

45. A method according to claim 35, wherein the one or more testing operations further comprise a second testing procedure comprising: increasing a temperature of the temperature controlled oven greater than an ambient temperature of the temperature controlled over; applying a constant reverse voltage to the optical receiver; iteratively measuring a substrate temperature to determine if the temperature is above or below a preset value; iteratively measuring a dark current of the optical receiver to determine if the dark current is inside a designed operating range of the optical receiver; halting the second testing procedure in an instance in which the substrate temperature is above or below the preset value; and outputting a fail state for the optical receiver in response to halting the second testing procedure.

46. The method according to claim 45, wherein the operations of the second testing procedure are completed at a constant temperature.

47. The method according to claim 45, wherein the operations of the second testing procedure are performed in the absence of an illumination load on the optical receiver.

48. The method according to claim 35, wherein the one or more testing operations further comprise a second testing procedure comprising: increasing a temperature of the temperature controlled oven greater than an ambient temperature of the temperature controlled over; applying an illumination load on the optical receiver; applying a constant reverse voltage to the optical receiver; iteratively measuring a substrate temperature to determine if the temperature is above or below a preset value; iteratively measuring a photo current of the optical receiver to determine if the photo current is inside a designed operating range of the optical receiver; halting the second testing procedure in an instance in which the substrate temperature is above or below the preset value; and outputting a fail state for the optical receiver in response to halting the second testing procedure.

49. The method according to claim 35, wherein the one or more testing operations further comprise a third testing procedure comprising: applying a reverse voltage to the optical receiver; determining a dark current for the optical receiver; providing an illumination load on the optical receiver; determining a photo current for the optical receiver; applying a forward current to the optical receiver; determining a forward voltage for the optical receiver; outputting a fail state in an instance in which: the determined dark current is outside of a designed operating range of the optical receiver; the determined photo current is outside of a designed operating range of the optical receiver; and/or the determined forward voltage is outside of a designed operating range of the optical receiver; storing the dark current, the photo current, the forward voltage, and a temperature at a Time=X in an instance in which the determined dark current, the photo current, and the forward voltage are inside of a designed operating range of the optical receiver; determining a drift of the dark current, the photo current, and the forward voltage between a Time=0 and the Time=X; and outputting a fail state in an instance in which the drift of the dark current, the drift of the photo current, or the drift of the forward voltage is outside a defined limited for the optical receiver.

50. The method according to claim 49, wherein a value of the applied reverse voltage and a value of the applied forward current is variable.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0092] FIG. 1 schematically shows a diagram of a system for testing optical receivers in accordance with the present invention;

[0093] FIG. 2 schematically shows a block diagram of an example apparatus that may be configured in accordance with some embodiments discussed herein;

[0094] FIG. 3 schematically shows a side view of a testing unit in accordance with some embodiments discussed herein;

[0095] FIG. 4 symbolically shows a top view of a testing board of FIG. 1 in accordance with some embodiments discussed herein;

[0096] FIG. 5 symbolically shows a perspective view of a socket, substrate, and plurality of optical receivers in accordance with some embodiments discussed herein;

[0097] FIG. 6 symbolically shows a top view of a substrate of FIG. 4 in accordance with some embodiments discussed herein;

[0098] FIG. 7 symbolically shows a top view of a particular configuration of the substrate of FIG. 4 in accordance with some embodiments discussed herein; and

[0099] FIG. 8 symbolically shows a bottom view of the emitters board of FIG. 3 in accordance with some embodiments discussed herein;

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0100] FIG. 1 schematically shows a system 100 for testing and predicting failure of optical receivers. System 100 includes testing units 102, backplane elements 104, drivers 108, a control unit 112, and a power supply 114. The testing units 102 include or otherwise support various optoelectronic components, such as optical emitters and optical receivers, so that one or more testing procedures may be performed on the optoelectronic components supported thereon. As shown, in some embodiments, a testing unit 102 may be supported by a backplane element 104 such that the backplane element 104 is in electrical communication with the testing unit 102. To establish and maintain electrical communication, in some embodiments, the testing unit may include an edge connector 106 configured to be received by a corresponding connector of the backplane element 104. The connection between the backplane element 104 and the testing unit 102 is such that electrical signals may flow between them. Additionally, and as shown in FIG. 1, the backplane element 104 may also be configured to support one or more testing units 102 where each testing unit may define a corresponding edge connector 106 in order to electrically connect with the backplane element 104. While reference hereinafter may be made to one testing unit 102 and/or one corresponding backplane element 104, the present disclosure contemplates that any number of testing units 102 may be supported by a backplane element 104 and/or that the system 100 may include any number of additional backplane elements 104. Furthermore, in some embodiments, the system 100 may not include a backplane element 104 such that the testing unit may be directly connected to a driver 108 or a control unit 112. Said another way, the present disclosure contemplates that any number of structural support elements (e.g., datacenter racks, cabinets, testing chambers, ovens, or the like) may function to support the testing unit 102 and/or may facilitate electrical connection between the testing unit 102 and an electrical or current input device (e.g., the driver 108) and/or may function to control values of parameters of environmental conditions surrounding testing unit 102 (e.g. the temperature).

[0101] Driver 108 is configured to generate inputs (e.g., a voltage input) that are applied to optoelectronic components (e.g., photodiodes) supported by the testing unit 102. For example, the driver 108 may be configured to generate and apply a stress current or voltage to the testing unit 102 supported by the backplane 104. The driver 108 is in electrical communication with a plurality of optical receivers (e.g., a plurality of optical receivers 502 in FIG. 5) in one or more sockets (e.g., one or more sockets 302 in FIG. 3) and in electrical communication with the one or more optical emitters (e.g., one or more optical emitters 314 in FIG. 3) on the emitters board (e.g., a emitter board 304 in FIG. 3). The driver 108 is configured to apply a voltage input to at least one optical receiver and to monitor a corresponding output parameter (e.g., output voltage, operating temperature, etc.). Further, the driver 108 is configured to receive electrical signals output by the testing unit 102 that may be directed to a control unit 112 described herein below. Furthermore, the driver 108 may include circuitry and/or optoelectronic elements (e.g., a multiplexer) configured to multiplex outputs signals received by the driver 108 from the testing unit 102 into a combined signal for transmission over a shared transmission medium (e.g. an optical fiber or the like) to a control unit 112 or other device in electrical communication with the driver 108. In some embodiments, the driver 108 may be further configured to determine a pass state or a fail state of any number of a plurality of optical receivers based on a comparison of various output parameters to corresponding output parameter thresholds.

[0102] In some embodiments, the driver 108 may be in electrical communication with the backplane element 104 via a rigid-flex printed circuit board (PCB) 110. Additionally, in some embodiments, the system 100 may include one or more drivers 108 configured to provide inputs to one or more testing units 102. By way of example, in some embodiments, the number of drivers 102 used by the system 100 may correspond to the number of testing units 102 used by the system such that each driver 108 provides an input to a corresponding testing unit 102. By way of a more particular example as shown in FIG. 1, in some embodiments, the system 100 may include four (4) drivers 108 each in electrical communication with a backplane element 104 and a corresponding testing unit 102. While illustrated with the driver 108 providing inputs to only one corresponding testing unit 102, the present disclosure contemplates that any number of drivers may provide inputs to any number of testing units 102. Said another way, one driver 108 may provide inputs to multiple testing units 102 and/or multiple drivers 108 may provide inputs to a single corresponding testing unit 102.

[0103] In some embodiments, the system 100 may also include a control unit 112 configured to execute or otherwise control the operation of the testing methods and procedures applied to the optoelectronic components supported by the testing unit 102. In some embodiments, the control unit 112 may be in electrical communication with the driver 108 such that electrical signals may be provided to the driver 108 (e.g., voltage inputs) and electrical signals may be provided from the driver 108 to the control unit 112 (e.g., output parameters, multiplex signals, or the like). As would be understood by one or ordinary skill in the art in light of the present disclosure, with reference in particular to the description of below FIG. 3, the control unit 112 may operate as a computer or computer program product. In particular, the control unit 112 may be configured to execute one or more testing methods (e.g., measurements, algorithms, protocols, or the like) by directing or otherwise controlling operation of the driver 108. Thus, the control unit 112 may provide commands to the driver 108 to apply various inputs (e.g., voltages) to the testing unit 102 and may receive output data (e.g., electrical signals) from the testing unit 102 via the driver 108.

[0104] Furthermore, the control unit 112 may be configured to monitor or control various other variables or parameters of the system 100. For example, the control unit 112 may be in electrical communication with one or more sensors (e.g., thermometers, pressure sensors, humidity sensors, accelerometers, photo resistors, barometers, and the like) so as to monitor input, output, and/or ambient conditions of the system 100. For example, the control unit 112 may monitor the ambient temperature of the system 100 and/or the output temperature of one or more optoelectronic components (e.g., when subjected to a voltage input) via electrical communication with one or more thermometers. Although described herein with respect to the control unit 112 executing testing methods or procedures via input commands to the driver 108, the present disclosure contemplates that the driver 108 may also include some or all of the circuitry or operation of the control unit 112. Said another way, the driver 108 may be integral to the control unit 112 in physical structure and/or operation. Similar to the backplane element 104 and the driver 108 above, in some embodiments, the system 100 may comprise one or more control units 112 configured to direct the operation of one or more drivers 108. In any embodiment described herein, the system 100 may include one or more power supplies 114 configured to provide power to one or more of the control unit 112 and/or the driver 108.

[0105] Regardless of the type of device that embodies the control unit 112 or the driver 108, the control unit 112 and/or driver 108 may include or be associated with an apparatus 200 as shown in FIG. 2. In this regard, the apparatus 200 may include or otherwise be in communication with a processor 202, a memory device 204, a communication interface 206, and/or a user interface 208. As such, in some embodiments, although devices or elements are shown as being in communication with each other, hereinafter such devices or elements should be considered to be capable of being embodied within the same device or element and thus, devices or elements shown in communication should be understood to alternatively be portions of the same device or element.

[0106] In some embodiments, the processor 202 (and/or co-processors or any other processing circuitry assisting or otherwise associated with the processor) may be in communication with the memory device 204 via a bus for passing information among components of the apparatus 200. The memory device 204 may include, for example, one or more volatile and/or non-volatile memories. In other words, for example, the memory device 204 may be an electronic storage device (e.g., a computer readable storage medium) comprising gates configured to store data (e.g., bits) that may be retrievable by a machine (e.g., a computing device like the processor). The memory device 204 may be configured to store information, data, content, applications, instructions, or the like for enabling the apparatus 200 to carry out various functions in accordance with an example embodiment of the present invention. In this regard, the memory device 204 may store various testing procedures, testing parameters, and/or threshold values configured to evaluate the reliability of a photodiode as discussed below. For example, the memory device 204 could be configured to buffer input data for processing by the processor 202. Additionally or alternatively, the memory device 204 could be configured to store instructions for execution by the processor 202.

[0107] As noted above, the apparatus 200 may be embodied by the driver 108 or the control unit 112 configured to be utilized in an example embodiment of the present invention. However, in some embodiments, the apparatus 200 may be embodied as a chip or chip set. In other words, the apparatus 200 may comprise one or more physical packages (e.g., chips) including materials, components and/or wires on a structural assembly (e.g., a baseboard). The structural assembly may provide physical strength, conservation of size, and/or limitation of electrical interaction for component circuitry included thereon.

[0108] The processor 202 may be embodied in a number of different ways. For example, the processor 202 may be embodied as one or more of various hardware processing means such as a coprocessor, a microprocessor, a controller, a digital signal processor (DSP), a processing element with or without an accompanying DSP, or various other processing circuitry including integrated circuits such as, for example, an ASIC (application specific integrated circuit), an FPGA (field programmable gate array), a microcontroller unit (MCU), a hardware accelerator, a special-purpose computer chip, or the like.

[0109] In an example embodiment, the processor 202 may be configured to execute instructions stored in the memory device 204 or otherwise accessible to the processor 202. Alternatively or additionally, the processor 202 may be configured to execute hard coded functionality. As such, whether configured by hardware or software methods, or by a combination thereof, the processor 202 may represent an entity (e.g., physically embodied in circuitry) capable of performing operations according to an embodiment of the present invention while configured accordingly. Thus, for example, when the processor 202 is embodied as an ASIC, FPGA or the like, the processor 202 may be specifically configured hardware for conducting the operations described herein. Alternatively, as another example, when the processor 202 is embodied as an executor of software instructions, the instructions may specifically configure the processor 202 to perform the algorithms and/or methods described herein when the instructions are executed. However, in some cases, the processor 202 may be a processor 202 of a specific device (e.g., a control unit 112 or driver 108 as shown in FIG. 1) configured to be employed by an embodiment of the present invention by further configuration of the processor 202 by instructions for performing the algorithms and/or operations described herein.

[0110] Meanwhile, the communication interface 206 may be any means such as a device or circuitry embodied in either hardware or a combination of hardware and software that is configured to receive and/or transmit data between computing devices and/or servers. For example, the communication interface 206 may be configured to communicate wirelessly with the one or more drivers 108 and/or testing units 102, such as via Wi-Fi, Bluetooth, or other wireless communications techniques. In some instances, the communication interface may alternatively or also support wired communication. For example, the communication interface 206 may be configured to communicate via wired communication with other components of the driver 108 and/or testing unit 102.

[0111] In some embodiments, the apparatus 200 may optionally include a user interface 208 in communication with the processor 202, such as by user interface circuitry, to receive an indication of a user input and/or to provide an audible, visual, mechanical, or other output to a user. As such, the user interface 208 may include, for example, a keyboard, a mouse, a display, a touch screen display, a microphone, a speaker, and/or other input/output mechanisms. The user interface may also be in communication with the memory 204 and/or the communication interface 206, such as via a bus.

[0112] With reference to FIG. 3, a testing unit 102 of the system 100 is schematically illustrated. As shown, the testing unit 102 may include a testing board 300, an emitter board 304, one or more support rails 306, and an edge connector 106. As shown, in some embodiments, the testing board 300 may be configured to support one or more sockets 302 via a top surface of the testing board 300. As described hereinafter with reference to FIGS. 4-7, each of the one or more sockets 302 may receive a substrate supporting one or more optical receivers for receiving optical signals (e.g., a substrate 500 and an optical receiver 502 in FIG. 5). The testing board 300 of the testing unit 102 may include a substrate, circuit board, or any other support structure which allows electrical signals to be directed to the socket 302, and subsequently to the optical receivers supported thereon, from the driver 108 via the backplane 104 (in FIG. 1). In particular, the testing board may define one or more electrical traces, connections, or the like configured to allow electrical communication between the plurality of optical receivers (e.g., optical receivers 502 in FIG. 5) and the driver 108 (see FIG. 1). As described above with reference to FIG. 1, the testing board 300 (e.g., of the testing unit 102) may define an edge connector 106 configured to be received by a corresponding connector of the backplane element 104. The connection between the backplane element 104 and the testing unit 102 may be such that electrical signals may flow therebetween.

[0113] The testing unit 102 may also include a emitter board 304 supporting one or more optical emitters 314 (e.g., LEDs) via a bottom surface of the emitter board 304. As described more fully hereinafter, the one or more optical emitters may be configured to transmit optical signals to be received by a plurality of optical receivers, which are configured to convert the optical signals to corresponding electrical signals. As shown in FIG. 3, the one or more optical emitters 314 may be in optical communication via alignment of the testing board 300 with the emitter board 304. For example, the testing unit 102 may be configured such that the top surface of the testing board 300 supporting the one or more sockets 302 is disposed opposite the bottom surface of the testing board 300 supporting the one or more optical emitters 314.

[0114] The testing unit 102 may further include one or more support rails 306 attached to one of the testing board 300 or the emitter board 304, and the one or more support rails 306 may be configured to attach the testing board 300 to the emitter board 304. While illustrated with three (3) support rails 306 in FIG. 3, the present disclosure contemplates that any number of support rails may be used in any configuration. Additionally, the support rails 306 may be attached to either one of the emitter board 304 or testing board 300 so long as the one or more support rails 306 may be configured to substantially align each of the one or more optical emitters 314 of the emitter board with a corresponding socket 302 of the testing board 300 such that optical signals transmitted by an optical emitter (e.g., an optical emitter 314 in FIG. 3) of the emitter board 304 may be received by the corresponding optical receiver 502 of the socket 302 when the testing unit 102 is in an operational configuration. Still further, the emitter board 304 may also be disposed substantially parallel with respect to the testing board 300 via the support rails 306 and located such that the distance between the emitter board 304 and the socket 302 of the testing board 300 is, for example, less than 9.33 mm; but in general will depend on the type of optical emitter 314 being used.

[0115] In an embodiment, the emitter board 304 will comprise a LED array e.g. 44 or 66, positioned above each socket 302 on testing board 300. This source will assure that each point inside the socket area containing the photodiodes 502 will receive the same light intensity during a test. In some embodiments, and as shown in FIG. 3, the testing board 300 may include a first connector 310 (e.g. a female connector) configured to receive a corresponding second connector 308 (e.g. a male connector) defined by the emitter board 304. The connection between first connector 310 and the corresponding second connector 308 may facilitate securing and aligning the sensor emitter 304 with respect to the testing board 300 such that optical communication between the one or more optical emitters 314 and the plurality of optical receivers 502 (e.g., shown in FIG. 5) received by the socket 302 are maintained. As would be understood by one of ordinary skill in the art in light of the present disclosure, each of the testing board 300 or the emitter board 304 may define any attachment mechanism (e.g., snaps, grooves, or the like) in order to secure the emitter board 304 to the testing board 300.

[0116] With reference to FIG. 4, a top view of a testing board 300 configured to support eight (8) optical receivers (not shown) via eight (8) sockets 302 is illustrated. In some embodiments, the testing board 300 may be configured (e.g., sized and shaped) so as to form a connecting portion 400 and a testing portion 402. In such an embodiment, the connecting portion 400, including the edge connector 106 described above with reference to FIGS. 1-2, may define a first width W.sub.1, and the testing portion 402 may define a second width W.sub.2. As shown in FIG. 4, the first width W.sub.1 of the connection portion 400 may be less than the second width W.sub.2 of the testing portion 402 so as to form a T-shaped testing board 300. While described with reference to a T-shaped testing board 300 with eight (8) sockets 302, the present disclosure contemplates that any number of sockets 302 may be supported by the testing board 300 in any configuration. Furthermore, the present disclosure contemplates that the testing board 300 may be any shape or size so as to be received by a corresponding backplane element (e.g., backplane element 104 in FIG. 1).

[0117] With reference to FIGS. 5-7, a socket 302 configured to receive a substrate 500 supporting a plurality of optical receivers 502 (e.g., photodiodes) is illustrated. As shown, the substrate 500 may be configured to be received by a socket 302 such that electrical signals received by the socket 302 (e.g., via electrical communication with the testing board 300) may be transmitted from the socket 302 to the substrate 500, and further transmitted to a plurality of optical receivers 502 supported thereon. The plurality of optical receivers 502 are configured to convert the optical signals received from the optical emitters 314 to corresponding electrical signals. As shown in FIG. 7, the plurality of optical receivers 502 may be connected with a contact point 602 of the substrate 500 via one or more wire bonds 600. As described hereinafter with regard to one or more testing methods applied to the plurality of optical receivers 502, the connection of at least one optical receivers 502 with a corresponding contact point 602 via the wire bond 600 may allow various parameters or outputs (e.g., an output voltage, an output current, an operating temperature, etc.) to be transmitted as electrical signals from the respective optical receiver 502 to a control unit (e.g., the control unit 112 in FIG. 1) for analysis. In some embodiments, the substrate 500 received by the socket 302 may support sixteen (16) optical receivers (e.g., photodiodes). While described in reference to sixteen (16) optical receivers 502 supported by a single substrate 500, the present disclosure contemplates that any number of optical receivers 502 may be supported by a corresponding substrate 500 in any configuration. Furthermore, with reference to FIGS. 6-7, the present disclosure contemplates that any orientation or configuration of wire bonds 600 and contact points 602 may be unitized by embodiments of the present invention such that one or more of the plurality of optical receivers 502 is in electrical communication with a driver (e.g., driver 108).

[0118] With reference to FIG. 8, a bottom view of the emitter board 304 is schematically illustrated. As shown, the bottom surface of the emitter board 304 may be configured to support one or more optical emitters 314 (e.g., VCSELs, LEDs, LED arrays). When in an operational configuration, in which the bottom surface of the emitter board 304 is substantially aligned with the testing board 300, each optical emitter 314 may be configured to transmit optical signals to the plurality of optical receivers 502, which are configured to convert the optical signals to corresponding electrical signals. In some embodiments, the emitter board 304 may support eight (8) optical emitters 314. However, the present disclosure contemplates that any number of optical emitters 314 may be supported by the emitter board 304 so as to transmit optical signals to the plurality of optical receivers 502 provided in the corresponding sockets 302 of the testing board 300. As would be evident to one of ordinary skill in the art in light of the present disclosure, the emitter board 304, in some embodiments, may support the same number of optical emitters 314 as the number of sockets 302 supported by the corresponding testing board 300. Furthermore the configuration or orientation of these optical emitters 314 may match that of the orientation of sockets 302 of the testing board 300 so as allow for optical communication between the optoelectronic elements supported thereon. In an example embodiment described herein, the emitter board 304 may define eight (8) optical emitters 314 positioned to substantially align with eight (8) corresponding sockets 302 of the testing board 300 such that a set of sixteen (16) optical receivers 502 of each socket 302 is in optical communication with a single corresponding optical emitter 314. Accordingly, in such an embodiment, the emitter board 304 supports eight (8) optical emitters 314 in optical communication with a maximum of one hundred twenty-eight (128) optical receivers 502.

[0119] As described below in detail with reference to particular testing methods, the testing system 100 may serve to provide electrical inputs to a plurality of optical receivers 502 and monitor corresponding output parameters. By way of example, with reference to FIGS. 1, 3, and the control unit 112 may execute a testing method by directing the driver 108 to provide a voltage input to at least one of the plurality of optical receivers 502. The control unit 112 may provide this command via electrical signals transmitted to the driver 108. The driver 108 may then provide a corresponding voltage input to the testing unit 102 via electrical signals transmitted by the driver 108 to the testing unit via the rigid-flex PCB 110, the backplane 104, and the edge connector 106 (FIG. 1). The electrical signals may then be provided to at least one optical receiver 502 via electrical traces 312 of the testing board 300, socket 302, and substrate 500. Similarly, the control unit 112 and driver 108 may activate the optical emitters 314 on emitter board 304 to provide light when desired. The optical receiver 502 converts the optical signals to electrical signals that are transferred to control unit 112. The control unit 112 analyses and/or determines various parameters or outputs of the optical receiver 502 based upon these electrical signals to determine passage or failure of the optical receiver. Although described as providing a voltage input to a single optical receiver, the present disclosure contemplates that the control unit 112 and/or driver 108 may selectively apply inputs to any number or combination of the plurality of optical transmitters 502.

[0120] A system built according to the above comprises sixteen optical receivers 502 in eight sockets 302 on sixteen testing boards 300 and will be controlled by a single control unit 112 to enable testing, with and without illumination, up to 2048 optical receivers 502 without taking the optical receivers out of the system. This reduces time and optical receiver failure due to handling issues.

[0121] Different types of reliability tests will now be outlined that can be carried out using the system described above. As described, the system can be manually controlled or programmed to automatically carry out the different tests on individual optical receiver 502 on any testing board 300 or in any socket 302 in which it is located. Specifically the tests described below are for photodiodes and the PASS/FAIL state that is determined by the test is specific to each photodiode.

[0122] Three testing procedures and a pre-test will now be described. Each of the testing procedures is a separate program in memory device 204 of apparatus 200 and may be run separately. However the normal flow for photodiode reliability testing will consist of running the pre-test and then the three test procedures consecutively with procedures two and three repeated cyclically, wherein the overall test time and number of stress intervals can be chosen by the operator. An example of a typical test time is two thousand (2000) hours and number of stress cycles is eight (8).

[0123] Pre-Test

[0124] This test is carried out before each test procedure if they are carried out separately and only before the first test if the test procedures are carried out sequentially. [0125] a. Check the substrate temperature to determine if it is inside the designed operating range of the optical receiver. [0126] b. Check that the optical receiver to be tested is present. [0127] c. Apply current on the optical receiver and check that the voltage is the designed operating range of the optical receiver. [0128] d. Check for an open or short circuit and leakage on optical receiver. [0129] .fwdarw.In case of fail of any of steps a to d the test stops.

[0130] A. First Test Procedure

[0131] The purpose of this test is to determine the current-voltage (I-V) characteristics of the optical receiver prior to applying stress. This test can be carried out without illumination (steps a and c) and with illumination (step b). [0132] a. Apply reverse voltage on optical receiver (can be applied using different voltage values). Check that the dark current is inside the designed operating range of the optical receiver. [0133] b. Apply reverse voltage on optical receiver (can be applied using different voltage values). Turn on the illumination and check that the photo current is inside the designed operating range of the optical receiver. [0134] c. Apply forward current on optical receiver (can be applied using different current values). Check that the forward voltage is inside the designed operating range of optical receiver.

[0135] .fwdarw.In case of fail of any of the steps a to c, the optical receiver is marked as FAIL.

[0136] .fwdarw.Document the dark current, photo current, forward voltage, and temperature at Time=0.

[0137] B. Second Test Procedure

[0138] The purpose of this test is to check the effect of thermal stress on the optical receiver. The procedure can be carried out in two optionseither without or with illumination. The overall concept of this test is to keep photodiodes in a constant temperature environment and under constant reverse voltage for a period of time (e.g. 24 hours). Constant illumination can also be added and, in both options, values of parameters are periodically checked, (e.g. every 10 minutes). [0139] 1st option: without illumination [0140] a. Raise temperature of the substrate above ambient (in an embodiment this is carried out by locating the testing units 102 in an oven and raising the temperature in the oven) [0141] b. Apply constant reverse voltage on optical receiver. [0142] c. Measure the substrate temperature periodically and check if the temperature is above or below a preset value (note that this test should be carried out at a constant temperature, e.g. 85 C.). [0143] .fwdarw.In case of fail the test stops. [0144] d. Measure dark current periodically and check if inside the designed operating range of the optical receiver. [0145] .fwdarw.In case of fail of step d the optical receiver is marked as FAIL. [0146] 2nd option: with illumination [0147] a. Raise temperature of substrate. [0148] b. Apply constant reverse voltage on optical receiver and turn on illumination. [0149] c. Measure substrate temperature periodically and check if the temperature is above or below a preset value. [0150] .fwdarw.In case of fail the test stops. [0151] d. Measure photo current periodically and check if inside the designed operating range of the optical receiver. [0152] .fwdarw.n case of fail of step d optical receiver is marked as FAIL.

[0153] C. Third Test Procedure

[0154] The purpose of this test is to check the drift of the I-V characteristics of the optical receiver, with and without illumination, over time. Also if carried out cyclically with the second test procedure the effect of thermal stress on the drift of the I-V characteristics of the optical receiver over time is checked. In this test the parameters are recorded at least at two different times. [0155] a. Apply reverse voltage on optical receiver (can be applied using different voltage values). Check that the dark current is inside the designed operating range of the optical receiver. [0156] b. Apply reverse voltage on optical receiver (can be applied using different voltage values). Turn on the illumination and check that the photo current is inside the designed operating range of the optical receiver. [0157] c. Apply forward current on optical receiver (can be applied using different current values). Check that the forward voltage is inside the designed operating range of the optical receiver.

[0158] .fwdarw.In case of fail of any of the steps a to c, the optical receiver is marked as FAIL.

[0159] .fwdarw.Document the dark current, photo current, forward voltage, and temperature at Time=X. [0160] d. Compute the drift of dark current, photo current, and forward voltage between Time=O and Time=X and check if inside the designed limit for the optical receiver.

[0161] .fwdarw.In case the drift of one or more of the parameters is outside the designed limit the optical receiver is marked as FAIL.

[0162] Note that: [0163] i) When computing the drift in step d the temperature and illumination conditions should be same at time=0 and time=X. [0164] ii) The values of the parameters in step d may be used to check the drift relative to measurements at time=0, before any stress is applied. The data in the database from the first procedure can be used for time=0 allowing drift to be computed; but there is an option in program to set any measurement as time=0, the point relative to which the drift will be computed.

[0165] Although embodiments of the invention have been described by way of illustration, it will be understood that the invention may be carried out with many variations, modifications, and adaptations, without exceeding the scope of the claims.