SEMICONDUCTOR DOPING METHOD AND AN INTERMEDIATE SEMICONDUCTOR DEVICE

Abstract

The method for doping a semiconductor includes the following steps in the following order: separation layer deposition step, in which a separation layer is deposited on the surface of a substrate, a mixture material source layer deposition step, in which a mixture material source layer including a mixture material is deposited on the separation layer, the mixture material of the mixture material source layer including a dopant substance, and annealing the substrate, the separation layer, and the mixture material source layer in an annealing step to arrange diffusion of dopant substance from the mixture material source layer to the substrate and to the separation layer.

Claims

1.-24. (canceled)

25. A method for doping a semiconductor, the method comprising an initial step where a semiconductor substrate comprising a surface is placed into a deposition tool, wherein the method comprises, in the following order, the steps of: a) depositing a separation layer on the surface of the semiconductor substrate in a separation layer deposition step, b) depositing a mixture material source layer in a mixture material source layer deposition step, in which the mixture material source layer comprising a mixture material is deposited on the separation layer, the mixture material of the mixture material source layer comprising a dopant substance, and c) annealing the semiconductor substrate, the separation layer, and the mixture material source layer in an annealing step, in which the substrate, the separation layer, and the mixture material source layer are heated to an elevated temperature to arrange diffusion of a dopant substance from the mixture material source layer to the substrate and to the separation layer.

26. The method for doping a semiconductor according to claim 25, wherein the separation layer deposition step comprises an atomic layer deposition.

27. The method for doping a semiconductor according to claim 26, wherein the atomic layer deposition of the separation layer deposition step comprises depositing: a first precursor being selected from the group of a precursor for a stable oxide and an oxidizing precursor, and a second precursor being the other from the group of a precursor for a stable oxide and an oxidizing precursor.

28. The method for doping a semiconductor according to claim 26, wherein the atomic layer deposition of the separation layer deposition step comprises depositing: a first precursor selected from a group of a silicon precursor and an oxidizing precursor, and a second precursor being the other from the group of a silicon precursor and an oxidizing precursor.

29. The method for doping a semiconductor according to claim 26, wherein the atomic layer deposition of the separation layer deposition step is arranged to deposit the separation layer having a thickness of 0.5 nm-15 nm.

30. The method for doping a semiconductor according to claim 26, wherein the mixture material source layer deposition is deposited using atomic layer deposition.

31. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition is arranged to deposit the mixture material comprising: a first precursor being selected from a group of a precursor for a stable oxide and an oxidizing precursor, arranged to deposit a first sub-material, a second precursor being the other from the group of a precursor for a stable oxide and an oxidizing precursor, arranged to deposit the first sub-material, a third precursor being selected from a group of a dopant precursor and an oxidizing precursor, arranged to deposit a second sub-material, and a fourth precursor being the other from the group of a dopant precursor and an oxidizing precursor, arranged to deposit the second sub-material.

32. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition is arranged to deposit the mixture material comprising: a first precursor being selected from the group of a silicon precursor and an oxidizing precursor, arranged to deposit a first sub-material, a second precursor being the other from the group of a silicon precursor and an oxidizing precursor, arranged to deposit the first sub-material, a third precursor being selected from the group of a dopant precursor and an oxidizing precursor, arranged to deposit a second sub-material, and a fourth precursor being the other from the group of a dopant precursor and an oxidizing precursor, arranged to deposit the second sub-material.

33. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition is arranged to deposit the mixture material comprising: a first precursor being selected from the group of a precursor for a stable oxide and an oxidizing precursor, arranged to deposit a first sub-material, a second precursor being the other from the group of a precursor for a stable oxide and an oxidizing precursor, arranged to deposit a first sub-material, and a third precursor being a dopant precursor, arranged to introduce dopants to the first sub-material to arrange the mixture material of the mixture material source layer from the first sub-material.

34. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition step is arranged to deposit the mixture material comprising: a first precursor being selected from the group of a silicon precursor and an oxidizing precursor, arranged to deposit a first sub-material, a second precursor being the other from the group of a silicon precursor and an oxidizing precursor, arranged to deposit the first sub-material, and a third precursor being a dopant precursor, arranged to introduce dopants to the first sub-material to arrange the mixture material of the mixture material source layer from the first sub-material.

35. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition is arranged to deposit the mixture material source layer having a thickness of 0.1 nm-5 nm.

36. The method for doping a semiconductor according to claim 30, wherein the atomic layer deposition of the mixture material source layer deposition is arranged to deposit the mixture material source layer comprising the mixture material, and an atomic ratio of the dopant substance in the deposited mixture material source layer is arranged to be 0.001 at. %-10 at. %.

37. The method for doping a semiconductor according to claim 25, wherein the method further comprises: after step b), the mixture material source layer deposition step, and before step c), the annealing step, a step b2), a diffusion drain layer deposition step, in which a diffusion drain layer is deposited over the mixture material source layer; and in step c), the annealing step, the substrate, the separation layer, the mixture material source layer and the diffusion drain layer are annealed and heated to an elevated temperature to arrange diffusion of the dopant substance from the mixture material source layer to the substrate, to the diffusion drain layer and to the separation layer.

38. The method for doping a semiconductor according to claim 37, wherein the diffusion drain layer deposition is deposited using atomic layer deposition.

39. The method for doping a semiconductor according to claim 38, wherein the atomic layer deposition of the diffusion drain layer deposition is arranged to deposit the diffusion drain layer comprising: a first precursor being selected from the group of a stable oxide and an oxidizing precursor, and a second precursor being the other from the group of a stable oxide and an oxidizing precursor.

40. The method for doping a semiconductor according to claim 38, wherein the atomic layer deposition of the diffusion drain layer deposition is arranged to deposit the diffusion drain layer comprising: a first precursor being selected from the group of a silicon precursor and an oxidizing precursor, and a second precursor being the other from the group of a silicon precursor and an oxidizing precursor.

41. The method for doping a semiconductor according to claim 37, wherein the diffusion drain layer deposition step is arranged to deposit the diffusion drain layer having a thickness of 1 nm-10 nm.

42. The method for doping a semiconductor according to claim 25, wherein the elevated temperature of the annealing step is between 800 C.-1100 C.

43. The method for doping a semiconductor according to claim 25, wherein after the annealing step c), as step d), the method further comprises an etching step, in which the layers deposited are etched away and removed from the semiconductor substrate.

44. An intermediate semiconductor device comprising a semiconductor substrate comprising a surface, wherein the intermediate semiconductor device comprises a dopant source layer stack comprising: a) a separation layer on the surface of a substrate, b) a mixture material source layer on the separation layer, the mixture material source layer comprising a mixture material comprising a dopant substance, and the atomic ratio of the dopant substance in the mixture material source layer is arranged to be 0.001 at. %-10 at. %.

45. The intermediate semiconductor device according to claim 44, wherein the dopant substance comprises boron, phosphorous, antimony or arsenic.

46. The intermediate semiconductor device according to claim 44, wherein the separation layer comprises a stable oxide, and the mixture material source layer comprises: phosphorous oxide and a stable oxide; or boron oxide and a stable oxide; or arsenic oxide and a stable oxide; or antimony oxide and a stable oxide.

47. The intermediate semiconductor device according to claim 44, wherein the separation layer comprises silicon dioxide (SiO.sub.2), and the mixture material source layer comprises: phosphorous oxide and silicon dioxide; or boron oxide and silicon dioxide; or arsenic oxide and silicon dioxide; or antimony oxide and silicon dioxide.

48. The intermediate semiconductor device according to claim 44, wherein the intermediate semiconductor device comprises a diffusion drain layer on the mixture material source layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0087] The invention is described in detail by means of specific embodiments with reference to the enclosed drawings, in which

[0088] FIG. 1 shows schematics of a prior art diffusion doping method,

[0089] FIGS. 2a and 2b show the characteristics of prior art diffusion and ion implantation doping methods, respectively, with relation to so-called high aspect ratio structures,

[0090] FIG. 3 shows the basic prior art process steps in an atomic layer deposition method when a single material film is grown,

[0091] FIG. 4a shows the basic prior art process steps where a nanolaminate structure or a mixture material film of two different sub-materials is grown with the atomic layer deposition method,

[0092] FIG. 4b shows the basic prior art process steps where a mixture material film is grown, based on first depositing a first sub-material and then intermixing the first sub-material with a third precursor with the atomic layer deposition method,

[0093] FIG. 5 shows schematics of the steps of a method according to an embodiment of the present invention,

[0094] FIG. 6 shows schematics of the steps of a method according to another embodiment of the present invention,

[0095] FIG. 7 shows schematics of the steps of a method according to yet another embodiment of the present invention,

[0096] FIGS. 8a and 8b show an intermediate device according to the present invention, and

[0097] FIG. 9 shows a dopant substance concentration achieved with the method according to an embodiment of the invention at two annealing temperatures.

[0098] It is to be emphasised that in FIGS. 1-8b are schematic in nature, and the dimensions of the illustrated structures, especially the dimensions of the thin film thicknesses vs. the dimensions of the substrate are exaggerated for illustrative clarity.

DETAILED DESCRIPTION OF THE INVENTION

[0099] In the following description, like labels (e.g. 101b) or numbers (e.g. 200) denote like elements. In addition, the following definitions are made:

[0100] FIG. 1 shows a prior art method for doping a semiconductor substrate. In FIG. 1, in step 100, semiconductor substrate 10, for example a substrate of single crystal silicon is provided. In dopant layer deposition step 101, a deposition method 150 like chemical vapor deposition (CVD) or atomic layer deposition (ALD) is used to deposit a dopant source layer 20 of thickness of some to tens of nanometres, for example 1 nm-20 nm, on the substrate 10. The dopant source layer comprises the dopant substance or dopant substances, and thus, after the step 101, the relative concentration 210 of the dopant substance is shown schematically in graph 200a with a step-like function of rich concentration of dopant substance or dopant substances and then, in the depth direction perpendicular to the surface, no or very small amounts of dopant substance or dopant substances.

[0101] In an annealing step 102, an annealing method 151 like arranging an elevated temperature to the substrate 10 and layer 20 is used to drive at least some of the atoms of the dopant source layer 20 into the substrate 10, markedly changing the concentration distribution from a step-like function into a downward sloping curve 220 depicting the relative concentration of the dopant substance in graph 200b, incorporating at least of portion of the dopant substances of the dopant source layer 20 into the substrate 10, marked with a fading dotted pattern 22 in step 102. Advantageous elevated temperature for the annealing step 102 is 800 C.-1100 C., more preferably 850 C.-1000 C. and most preferably 900 C.-950 C.

[0102] FIG. 2a shows a schematic representation of a prior art diffusion doping result into a substrate 23. The substrate 23 comprises a surface 11. The substrate has one or more three-dimensional (3D) features 24 that also extend to the depth direction of the substrate surface, perpendicular to the substrate surface. A substrate can comprise many 3D structures or 3D features 24 of different shapes and sizes. The 3D feature 24 comprises wall or walls 13 and a bottom 12.

[0103] The 3D features 24 can be e.g. trenches that, when filled with suitable materials in the semiconductor manufacturing processes, for example isolate and/or insulate two areas of semiconductors from one another. Symbols 165 denote the diffusive nature of the movement of the one or more dopant substances close to a three-dimensional structure in a semiconductor substrate. The dopant concentration depth profiles 326a and 326b are very similar owing to the isotropic nature of the diffusion doping in both horizontal and vertical segments of the doped structure surfaces. In other words, diffusion doping can provide an uniform doping on the surface 11 of the substrate and on the walls 13 and bottom 12 of the 3D feature in the substrate with essentially same concentration at the surface 11, and the bottom 12 and at the walls 13.

[0104] FIG. 2b shows a schematic representation of a prior art ion implantation doping result. Symbols 166 denote the directed, anisotropic nature of the movement or bombardment of the substrate by the dopant substance. The surfaces of the substrate that are perpendicular to the direction of the movement of the dopant substance receive considerably larger dose of dopant substance or substances, denoted with doping concentration distribution 327a, than the surfaces that are parallel to the bombardment, denoted with doping concentration distribution 327b.

[0105] FIG. 3 shows the steps of a prior art vapor-phase deposition method, the atomic layer deposition method (also called the ALD method or ALD for short), where a film or a layer of material or at least patches of deposit is deposited on the surface of a substrate using two precursors A (also called the first precursor, #1) and B (also called the second precursor, #2). In the loading step 301 or initial step 301, the deposition tool is loaded with one or more substrates. This may mean, for example, placing the substrates on a rack or racks of a reaction chamber, which is then placed into the vacuum chamber of the ALD deposition tool. In evacuation step 302, the vacuum chamber is evacuated of the ambient air, generating a vacuum or low-pressure condition where the pressure in the vacuum chamber is for example 1 mbar-10 mbar, for example 2 mbar. At the same time, the vacuum chamber temperature is elevated, also elevating the temperature of the reaction chamber and the substrates therein. For deposition, temperatures in the range of 100 C.-800 C., more preferably 200 C.-500 C. and most preferably 250 C.-400 C. are advantageous. In ALD, it is important to keep the temperature range such that the supplied reactants or precursors remain in vapor phase (implying high enough temperature), but do not yet decompose (which would be indicative of too high temperature).

[0106] In first precursor exposure step 303, as precursor A or as the first precursor, e.g. TMA (tri-methyl-aluminium) is introduced to the reaction chamber and by the same token, on the surfaces of the one or more substrates where it chemisorbs on the surfaces. In first purge step 304, the reaction chamber is purged with a gas which is inert in relation to the reactions and substances growing the film, for example nitrogen, argon or helium. First purge step 304 sweeps away excess molecules or atoms of precursor A from the surfaces of the substrate or substrates, but also from the surfaces of most of the conduits and valves required to feed and regulate the flows of the precursors. In second precursor exposure step 305, precursor B or second precursor, e.g. water vapor, is introduced to the reaction chamber. Precursor B is chemisorbed on the surfaces of the substrates, already having a monolayer of precursor A present, causing precursors A and B react, finally giving rise to the growth of film on the surface. For example, in case of TMA and water vapor, the growing film is essentially aluminium oxide, Al.sub.2O.sub.3. Second purge step 306 sweeps away excess molecules or atoms of precursor B from the surfaces of the substrate or substrates. Steps 304 and 306 can be identical, e.g. use same purge gas for the same duration.

[0107] In film thickness determination step 307, it is determined if the film deposited on the surface or surfaces is suitably thick or otherwise ready. This can be done a priori by setting the number of deposition cycles that are to be carried out. In other words, the film thickness determination step may comprise counting the number of cycles NS needed to reach a certain thickness of film. One deposition cycle may comprise first precursor exposure step 303, first purge step 304, second precursor exposure step 305 and second purge step 306. Film thickness determination step can also comprise measuring the thickness of the deposited film e.g. optically. If the film is not ready, denoted by decision 308, (not enough deposition cycles are carried out), steps 303-306 are repeated to grow more film. If film, on the other hand, is ready, denoted with a decision 309, the tool can be vented and cooled down to a temperature where the reaction chamber and the one or more substrates can be taken out of the deposition tool in a post-deposition step 310. Alternate to venting and cooling down, the process parameters (e.g. temperature) are changed and/or the precursors are changed to grow another type of film on the film just deposited. In completion step 311, the deposition is completed and the substrates with the deposited film on them can be processed or examined further.

[0108] In addition to an elevated temperature, plasma generated for example with capacitive or inductive plasma generation devices can also be provided to the surface or near the surface of the substrate to promote the reactions needed to grow film (this step not shown). Precursor A (first precursor) or precursor B (second precursor) can also comprise plasma.

[0109] FIG. 4a shows an example process of a prior art atomic layer deposition method, where a film or a layer of mixture material is deposited using four precursors A (also called the first precursor #1), B (also called the second precursor #2), C (also called the third precursor #3) and D (also called the fourth precursor #4). SMD1 and SMD2 refer to first sub-material deposition and second sub-material deposition, respectively. SMD1 and SMD2 also refer to first sub-material deposit and second sub-material deposit, respectively. Sub-material deposition cycles 1 (steps 403-406) and 2 (steps 413-416) correspond to the film growing cycle 303-306 in FIG. 3, but have distinct precursors A-D and other distinct process parameters like deposition temperature, exposure times of the coated objects or substrates to the precursors A-D, purge times, vacuum pressure in the vacuum and reaction chambers etc. Sub-material deposition cycle 1 and sub-material deposition cycle 2 may be repeated until a film or layer of required thickness is grown. This film is a mixture material film, and the material therein is mixture material.

[0110] In more detail, FIG. 4a shows the steps of a prior art vapor-phase deposition method, the atomic layer deposition method or the ALD method, where a film or a layer of material or at least patches of deposit is deposited on the surface of a substrate using four precursors, A (also called the first precursor) and B (also called the second precursor) to deposit the first sub-material, and C (also called the third precursor) and D (also called the fourth precursor) to deposit the second sub-material. As indicated above, first and second sub-material depositions may be repeated until a mixture material film of suitable thickness is achieved.

[0111] In the loading step 401 or initial step 401, the deposition tool is loaded with one or more substrates. This may mean, for example, placing the substrates on a rack or racks of a reaction chamber, which is then placed into the vacuum chamber of the ALD deposition tool. In evacuation step 402, the vacuum chamber is evacuated of the ambient air, generating a vacuum or low-pressure condition where the pressure in the vacuum chamber is for example 1 mbar-10 mbar, for example 2 mbar. At the same time, the vacuum chamber temperature is elevated, also elevating the temperature of the reaction chamber and the substrates therein. For deposition, temperatures in the range of 100 C.-800 C., more preferably 200 C.-500 C. and most preferably 250 C.-400 C. are advantageous. In ALD, it is important to keep the temperature range such that the supplied reactants or precursors remain in vapor phase (implying high enough temperature), but do not yet decompose (which would be indicative of too high temperature).

[0112] To deposit the first sub-material (SMD1), in first precursor exposure step 403, as precursor A or as the first precursor, e.g. TMA (tri-methyl-aluminium) is introduced to the reaction chamber and by the same token, on the surfaces of the one or more substrates where it chemisorbs on the surfaces. In first purge step 404, the reaction chamber is purged with a gas which is inert in relation to the reactions and substances growing the film, for example nitrogen, argon or helium. First purge step 404 sweeps away excess molecules or atoms of precursor A from the surfaces of the substrate or substrates, but also from the surfaces of most of the conduits and valves required to feed and regulate the flows of the precursors. In second precursor exposure step 405, precursor B or second precursor, e.g. water vapor, is introduced to the reaction chamber. Precursor B is chemisorbed on the surfaces of the substrates, already having a monolayer of precursor A present, causing precursors A and B react, finally giving rise to the growth of film or a patch of film on the surface. For example, in case of TMA and water vapor, the deposited film is essentially aluminium oxide, Al.sub.2O.sub.3. Second purge step 406 sweeps away excess molecules or atoms of precursor B from the surfaces of the substrate or substrates. Steps 404 and 406 can be identical, e.g. use same purge gas for the same duration.

[0113] In first sub-material related film thickness determination step 407, it is determined if the first sub-material deposit or film deposited on the surface or surfaces is suitably thick or otherwise ready. This can be done a priori by setting the number of deposition cycles that are to be carried out. In other words, the first sub-material related film thickness determination step may comprise counting the number of cycles NS1 needed to reach a certain thickness of film. One deposition cycle related to the first sub-material deposition comprises first precursor exposure step 403, first purge step 404, second precursor exposure step 405 and second purge step 406. Film thickness determination step can also comprise measuring the thickness of the deposited film e.g. optically. If the film is not ready, denoted by decision 408, (not enough deposition cycles are carried out), steps 403-406 are repeated to grow more film or deposit of the first sub-material. If the film is ready, determined by the decision 409, a deposit, a patch, or a film of the first sub-material 427 (SMD1) is deposited. Thus, deposition of the second sub-material may start.

[0114] To deposit the second sub-material (SMD2), in third precursor exposure step 413, as precursor C or as the third precursor, e.g. TiCl4 (titanium tetrachloride) is introduced to the reaction chamber and by the same token, on the surfaces of the one or more substrates where it chemisorbs on the surfaces. In the third purge step 414, the reaction chamber is purged with a gas which is inert in relation to the reactions and substances growing the film, for example nitrogen, argon or helium. Third purge step 414 sweeps away excess molecules or atoms of precursor C from the surfaces of the substrate or substrates, but also from the surfaces of most of the conduits and valves required to feed and regulate the flows of the precursors. In fourth precursor exposure step 415, precursor D or fourth precursor, e.g. water vapor, is introduced to the reaction chamber. Precursor D is chemisorbed on the surfaces of the substrates, already having a monolayer of precursor C present, causing precursors C and D react, finally giving rise to the growth of film or a patch of film on the surface. For example, in case of TiCl4 and water vapor, the growing film is essentially titanium dioxide, TiO2. Fourth purge step 416 sweeps away excess molecules or atoms of precursor D from the surfaces of the substrate or substrates. Steps 414 and 416 can be identical, e.g. use same purge gas for the same duration.

[0115] In second sub-material related film thickness determination step 417, it is determined if the second sub-material deposit or film deposited on the surface or surfaces is suitably thick or otherwise ready. This can be done a priori by setting the number of deposition cycles that are to be carried out. In other words, the film thickness determination step may comprise counting the number of cycles NS2 needed to reach a certain thickness of film. One deposition cycle related to the second sub-material comprises third precursor exposure step 413, third purge step 414, fourth precursor exposure step 415 and fourth purge step 416. Second sub-material related film thickness determination step can also comprise measuring the thickness of the deposited film e.g. optically. If the film is not ready, denoted by decision 418, (not enough deposition cycles are carried out), steps 413-416 are repeated to grow more film or deposit of the second sub-material. If the film is ready, a deposit, a patch, or a film of the second sub-material 437 is deposited.

[0116] If the second sub-material film deposition SMD2, is ready, denoted with a decision 419, determination if the entire film is ready is to be made in step 420. This determination can again be made by counting the total number of deposition cycles of the first and second sub-materials, respectively, that is, value of NS1+NS2. Alternatively, the readiness of SMD1 and SMD2 can be determined by observing e.g. the optical properties of the sub-material deposition 1 and sub-material deposition 2 especially if a nanolaminate structure is deposited. If the film is not ready, indicated with decision 421 (no), the method is continued from step 403 related to the deposition of the first sub-material. If the film is ready, indicated by decision 422, the tool is vented (step 423) and the mixture material and related mixture material film deposition is ready (step 424) and the one or more substrates with the deposited film on them can be processed or examined further.

[0117] In other words, sub-material deposition 1 and sub-material deposition 2 may be a deposit of a distinct film of sub-material 1 and sub-material 2, for which usually several, usually above 10 ALD cycles are needed of precursors A (first precursor) and B (second precursor) (for sub-material 1) or C (third precursor) and D (fourth precursor) (for sub-material 2). This yields a so-called nanolaminate.

[0118] Alternatively, a sub-material deposition 1 or 2 can only comprise few, at minimum one cycle of precursors A (first precursor) and B (second precursor), and minimum of one cycle of precursors C (third precursor) and D (fourth precursor). In this case, no distinct sub-material film is yet able to grow, but instead the material forms islands or patches of growth, effectively mixing the two sub-materials 1 and 2 together to a solid layer of intermixed film.

[0119] As indicated above, precursor A is also called the first precursor, precursor B the second precursor, precursor C the third precursor, and precursor D the fourth precursor.

[0120] FIG. 4b shows an example process of a prior art atomic layer deposition method, where a film or a layer of mixture material is deposited using three precursors A (also called the first precursor #1), B (also called the second precursor #2), and C (also called the third precursor #3). SMD1 refers to first sub-material deposition.

[0121] Sub-material deposition cycles 1 (steps 403-406) and steps 401, 402, 407, 408 and 409 are identical to FIG. 4a in FIG. 4b. However, in step 413b, the surface of the substrate is exposed to precursor C e.g. with one pulse of precursor C into the reaction area or reaction chamber of the deposition tool, but after this not to precursor D. If precursor C is the dopant precursor, dopant substances are introduced to the layer or film grown according to the steps 403-408 in FIG. 4b, and subsequently become intermixed with the first sub-material deposit SMD1, 427. Excess precursor C may be purged from the surface of the substrate in the third purge step 414b. Alternatively, the third purge step 414b can be omitted, and thus there is no third purge step 414b.

[0122] Also steps 420-424 are identical to FIG. 4a in FIG. 4b. Thus, an intermixed mixture material film is grown, and the intermixed mixture material is a mixture material.

[0123] An intermixed mixture material may mean either patches or islands of the at least two distinct materials that are grown according to FIG. 4a to a distinct layer or film of material, or an intermixed film which is grown according to the steps shown in FIG. 4b. Nanolaminates, intermixed films and films that comprise both nanolaminates and intermixed films are generally called mixture materials in the present application, and a layer of mixture material is called a mixture material layer. When a mixture material comprises a dopant substance, the mixture material layer is called the mixture material source layer (source being the source of dopants diffused to the surrounding layers in one or more annealing steps according to the invention or its embodiments). Thus, generalising, in the present application, the mixture material is arranged by using at least three distinct precursors in the vapour phase deposition process (like CVD or ALD) of the mixture material, for example a first precursor and a second precursor to grow a film and then arranging a third precursor to the deposition process to arrange a mixture material and to alter the properties of the film grown.

[0124] FIG. 5 shows an aspect of the present invention, a method for doping a semiconductor. The method comprises an initial step where a semiconductor substrate comprising a surface is placed into a deposition tool. The method comprises, in the following order, the steps of [0125] a) depositing a separation layer 30 on the surface of a substrate 11 in a separation layer deposition step 110, in which a separation layer 30 is deposited on the surface 11 of a substrate 10, [0126] b) depositing a mixture material source layer 31 in a mixture material source layer deposition step 111, in which a mixture material source layer 31 comprising a mixture material is deposited on the separation layer 30, the mixture material of the mixture material source layer comprising a dopant substance, and [0127] c) annealing the substrate 10, the separation layer 30, and the mixture material source layer 31 in an annealing step 113, in which the substrate 10, the separation layer 30, and the mixture material source layer 31 are heated to an elevated temperature to arrange diffusion of dopant substance from the mixture material source layer 31 to the substrate 10 and to the separation layer 30, 36.

[0128] In the method according to an embodiment of the invention in FIG. 5, the initial step 110 of providing a semiconductor may comprise placing one or more semiconductor substrates into a deposition tool like an ALD tool or a CVD tool.

[0129] In the separation layer deposition step 110, a separation layer 30 is deposited on the surface 11 of a substrate 10 with a deposition treatment 160. Separation layer deposition step 110 may be deposited e.g. according to the principles of chemical vapor deposition (CVD), or in particular, the separation layer deposition step 110 may be deposited with an atomic layer deposition method, the process and steps of which are discussed in detail with reference to FIG. 3, FIG. 4a and FIG. 4b.

[0130] When using an atomic layer deposition method as the deposition method of the separation layer deposition step 110, the separation layer deposition step 110 may be deposited with a first precursor comprising a precursor for a stable oxide, and a second precursor comprising an oxidizing precursor. In particular, when using an atomic layer deposition method as the deposition method of the separation layer deposition step 110, the separation layer deposition step 110 may be deposited with a first precursor comprising a silicon precursor, and a second precursor comprising an oxidizing precursor. First precursor (precursor A) and second precursor (precursor B) are defined in conjunction with FIG. 3 above.

[0131] When using an atomic layer deposition method as the deposition method of the separation layer deposition step 110, the separation layer deposition step 110 may also be deposited with a first precursor being selected from the group of a precursor for a stable oxide and an oxidising precursor, and a second precursor being the other from the group of a precursor for a stable oxide and an oxidising precursor. The atomic layer deposition of the separation layer deposition step 110 may also be deposited with a first precursor being selected from the group of a silicon precursor and an oxidising precursor, and a second precursor being the other from the group of a silicon precursor and an oxidising precursor. First precursor (precursor A) and second precursor (precursor B) are defined in conjunction with FIG. 3 above.

[0132] The atomic layer deposition method of the separation layer deposition step 110 may be arranged to deposit a separation layer 30 of a thickness of 0.5 nm-15 nm, 1 nm-5 nm or 2 nm-3 nm.

[0133] The mixture material source layer deposition step 111 may also be deposited with the atomic layer deposition method. The mixture material source layer deposition step 111 may also be deposited with other thin film deposition method like CVD or sputtering or other deposition treatment 161. Mixture material source layer comprises a mixture material.

[0134] Still referring to FIG. 5, in an embodiment, the atomic layer deposition of the mixture material source layer deposition step may be arranged to deposit a mixture material deposited with a first precursor comprising a precursor for a stable oxide, arranged to deposit a first sub-material, a second precursor comprising an oxidizing precursor, arranged to deposit a first sub-material, a third precursor comprising a dopant precursor, arranged to deposit a second sub-material, and a fourth precursor comprising an oxidizing precursor, arranged to deposit a second sub-material. The flow of the ALD process is defined in FIG. 4a, with precursor A as the first precursor, with precursor B as the second precursor, with precursor C as the third precursor, and with precursor D as the fourth precursor.

[0135] More specifically, in an embodiment, the atomic layer deposition of the mixture material source layer deposition step 111 arranged to deposit a mixture material may be deposited with a first precursor comprising a silicon precursor, arranged to deposit a first sub-material, and a second precursor comprising an oxidizing precursor, arranged to deposit a first sub-material, a third precursor comprising a dopant precursor, arranged to deposit a second sub-material, and a fourth precursor comprising an oxidizing precursor arranged to deposit a second sub-material. Again, the flow of the ALD process is defined in FIG. 4a, with precursor A as the first precursor, with precursor B as the second precursor, with precursor C as the third precursor, and with precursor D as the fourth precursor.

[0136] More specifically, in an embodiment, the atomic layer deposition of the mixture material source layer deposition step 111 arranged to deposit a mixture material is deposited with a first precursor being selected from the group of a precursor for a stable oxide and an oxidising precursor, arranged to deposit a first sub-material 427, a second precursor being the other from the group of a precursor for a stable oxide and an oxidising precursor, arranged to deposit a first sub-material 427, and a third precursor being selected from the group of a dopant precursor and an oxidising precursor, arranged to deposit a second sub-material 437, and a fourth precursor being the other from the group of a dopant precursor and an oxidizing precursor, arranged to deposit a second sub-material 437. Again, the flow of the ALD process is defined in FIG. 4a, with precursor A as the first precursor, with precursor B as the second precursor, with precursor C as the third precursor, and with precursor D as the fourth precursor.

[0137] In another embodiment, the atomic layer deposition of the mixture material source layer deposition step 111 arranged to deposit a mixture material is deposited with a first precursor being selected from the group of a silicon precursor and an oxidising precursor, arranged to deposit a first sub-material 427, a second precursor being the other from the group of a silicon precursor and an oxidizing precursor, arranged to deposit a first sub-material 427, and a third precursor being selected from the group of a dopant precursor and an oxidising precursor, arranged to deposit a second sub-material 437, a fourth precursor being the other from the group of a dopant precursor and an oxidizing precursor, arranged to deposit a second sub-material 437. Again, the flow of the ALD process is defined in FIG. 4a, with precursor A as the first precursor, with precursor B as the second precursor, with precursor C as the third precursor, and with precursor D as the fourth precursor.

[0138] In another embodiment, the atomic layer deposition of the mixture material source layer deposition step may be arranged to deposit a mixture material with a first precursor comprising a precursor for a stable oxide, arranged to deposit a first sub-material 427, and a second precursor comprising an oxidizing precursor, arranged to deposit a first sub-material 427, and a third precursor comprising a dopant precursor, the third precursor arranged to introduce dopants to the first sub-material 427 to arrange a mixture material of the mixture material source layer 31 from the first sub-material. The steps of the ALD method related to this embodiment are illustrated in relation to FIG. 4b above.

[0139] In another embodiment, the atomic layer deposition of the mixture material source layer deposition step may be arranged to deposit a mixture material with a first precursor comprising a silicon precursor, arranged to deposit a first sub-material 427, and a second precursor comprising an oxidizing precursor, arranged to deposit a first sub-material 427, and a third precursor comprising a dopant precursor, the third precursor arranged to introduce dopants to the first sub-material 427 to arrange a mixture material of the mixture material source layer 31 from the first sub-material 427. The steps of the ALD method related to this embodiment are also illustrated in relation to FIG. 4b above.

[0140] In another embodiment, the atomic layer deposition of the mixture material source layer deposition step may be arranged to deposit a mixture material with a first precursor being selected from a group of a precursor for a stable oxide and an oxidising precursor, arranged to deposit a first sub-material 427, a second precursor being the other from a group of a precursor for a stable oxide and an oxidising precursor, arranged to deposit a first sub-material 427, and a third precursor being a dopant precursor, arranged to introduce dopants to the first sub-material 427 to arrange a mixture material of the mixture material source layer 31 from the first sub-material 427.

[0141] In yet another embodiment, the atomic layer deposition of the mixture material source layer deposition step may be arranged to deposit a mixture material with a first precursor being selected from the group of a silicon precursor and an oxidising precursor, arranged to deposit a first sub-material 427, a second precursor being the other from the group of a silicon precursor and an oxidising precursor, arranged to deposit a first sub-material 427, and a third precursor being a dopant precursor, arranged to introduce dopants to the first sub-material 427 to arrange a mixture material of the mixture material source layer 31 from the first sub-material 427.

[0142] In an embodiment, the atomic layer deposition method of the mixture material source layer deposition step 111 may be arranged to deposit a mixture material source layer 31 of a thickness of 0.1 nm-5 nm, more preferably 0.2 nm-2 nm or most preferably 0.4 nm-1.0 nm.

[0143] In an embodiment, the atomic layer deposition method of the mixture material source layer deposition step may be arranged to deposit a mixture material source layer comprising a mixture material. Again, the arrangement for depositing a mixture material is specified in detail above in relation to FIG. 4a or FIG. 4b. The deposition of the mixture material source layer may be arranged to comprise the precursor comprising the dopant substance. The atomic ratio of the dopant substance in the deposited mixture material source layer is arranged to be 0.001 at. %-10 at. %; or more preferably 0.01 at. %-1 at. %; or most preferably 0.05 at. %-0.5 at. %. Noteworthy is that that the resulting concentration of the dopant substance in the substrate, after the dopants have diffused from the mixture material source layer 31, is still considerably lower than the indicated lowest starting concentration value of 0.001 at. % in the mixture material source layer.

[0144] Still referring to FIG. 5, in an embodiment, a suitable elevated temperature of the step c), the annealing step 113, is between 800 C.-1100 C., more preferably between 850 C.-1000 C. and most preferably between 900 C.-950 C. The purpose of the elevated temperature is to provide diffusion of dopant substance or dopant substances from the mixture material source layer 31 to the substrate 10 and to the separation layer 30.

[0145] As a result of the method explained in relation to FIG. 5, the mixture material source layer 31 acts as a source of one or more dopant substances, during and after the annealing step 113 it becomes at least partially depleted and turns into a depleted mixture material source layer 35. By the same token, as the separation layer 30 receives at least part of the dopant substances of the mixture material source layer 31, it becomes a doped separation layer 36. Also the substrate 10 is now doped with the one or more dopant substances provided by the mixture material source layer 31. In other words, in the annealing step 113, the structure of layers 30-31 and substrate 10 is annealed with a temperature treatment 163, causing the dopant substance or dopant substances to diffuse to the separation layer 30. Only a small tail of the deposition can reach the area of the substrate 10, now a doped substrate 10b, as indicated with a low dopant substance density or dopant substance concentration region 37. This is indicated with graph 223, which is another schematic representation of the dopant substance concentration C(d) depth d profile shown with label 223a in the graph 223. This is in contrast to graph 221 that shows a very high concentration of dopant substances, as a step function, in the mixture material source layer 31 and essentially no dopant substance in other layers or in the substrate.

[0146] As there are two distinct layers related to the controlled diffusion release of dopant substances, the separation layer 30 and the mixture material source layer 31 are jointly called the dual-layer dopant source layer stack 41.

[0147] In FIG. 5, sequence 250a shows also the steps in a flow chart highlighting that in a method according to the invention, the steps of the method are to be carried out in the specific order of: an initial step 110, a separation layer deposition step 110, a mixture material source layer deposition step 111, and an annealing step 113. Thus, the order is from left to right in the sequence 250a, order also indicated by arrows.

[0148] Turning to FIG. 6, in an embodiment the method comprises, after the mixture material source layer deposition step 111 and before the annealing step 113, a diffusion drain layer deposition step 112, where a diffusion drain layer 32 is deposited over the mixture material source layer 31.

[0149] In an embodiment, after the mixture material source layer deposition step 111, and before the annealing step, the method comprises a diffusion drain layer deposition step 112, in which a diffusion drain layer 32 is deposited over the mixture material source layer 31. In this case, naturally, in the annealing step 113 all the deposited layers and the substrate are annealed. That is, the substrate 10, the separation layer 30, the mixture material source layer 31 and the diffusion drain layer 32 are annealed and heated to an elevated temperature to arrange diffusion of dopant substance from the mixture material source layer 31 to the substrate 10, to the diffusion drain layer 32 and to the separation layer 30 and 36.

[0150] In an embodiment, the diffusion drain layer deposition step 112 may be deposited with an atomic layer deposition method.

[0151] In another embodiment, the atomic layer deposition of the diffusion drain layer deposition step 112 is deposited with a first precursor being selected from the group of a stable oxide and an oxidising precursor, and a second precursor being the other from the group of a stable oxide and an oxidizing precursor. First precursor (precursor A) and second precursor (precursor B) are defined in conjunction with FIG. 3 above.

[0152] In yet another embodiment, the atomic layer deposition of the diffusion drain layer deposition step 112 is deposited with a first precursor being selected from the group of a silicon precursor and an oxidising precursor, and a second precursor being the other from the group of a silicon precursor and an oxidizing precursor. First precursor (precursor A) and second precursor (precursor B) are defined in conjunction with FIG. 3 above.

[0153] Related to FIG. 6, as there are three distinct layers related to the controlled diffusion release of dopant substances, separation layer 30, mixture material source layer 31 and diffusion drain layer 32 are jointly called the tri-layer dopant source layer stack 40. Further, in FIG. 6, the dopant substance concentration depth profile C is shown schematically in graphs 224-226, relative to the doping depth d. As in FIG. 5, the mixture material source layer 31 contains essentially all the dopant substances as indicated in graph 224 with a step function. The diffusion drain layer deposition step 112 moves the layer with the high concentration of dopant substance or dopant substances deeper in the structure, relative to the top layer or top surface of the structure. This is indicated with graph 225 which is another schematic representation of the dopant substance concentration depth profile after the deposition of the diffusion drain layer. In step 113, the structure of layers 30-32 and substrate 10 is annealed with a temperature treatment 163, causing the dopant substance or dopant substances to diffuse to both to the diffusion drain layer 32 and to the separation layer 30. Only a small tail of the deposition can reach the area of the substrate 10, now a doped substrate 10b. This is indicated with graph 226, which is another schematic representation of the dopant substance concentration depth profile. As can be seen from curves 226a and 226b, the diffusion drain layer creates a diffusion direction also away from the substrate 10, making less dopant substances available to diffuse towards the substrate 10. This is an additional, advantageous way to control accurately the dopant substance density in the substrate.

[0154] In other words, the diffusion drain layer 32 is advantageous as it provides a second direction for the dopant substance atoms to diffuse, enabling the tailoring of the diffusion provide in the substrate 10 even more accurately and making it easier to control very low concentrations of dopant substance reaching the substrate 10. Thus, diffusion drain layer 32 acts as a drain (or sink) for the dopant substance atoms and reduces and controls the net amount of dopant substances that can diffuse towards the substrate 10 during the annealing.

[0155] The elevated temperature of the annealing step 113 may again be between 800 C.-1100 C., more preferably between 850 C.-1000 C. and most preferably between 900 C.-950 C.

[0156] In an embodiment, the diffusion drain layer deposition step 112 may be deposited with the atomic layer deposition method. The atomic layer deposition of the diffusion drain layer deposition step 112 may be deposited with a silicon precursor as the first precursor and an oxidizing precursor as the second precursor.

[0157] In an embodiment, the atomic layer deposition of the diffusion drain layer deposition step 112 may be arranged a to deposit a diffusion drain layer of a thickness of 1 nm-10 nm, or more preferably 2 nm-8 nm; or most preferably 3 nm-5 nm.

[0158] In FIG. 6, sequence 250b shows also the steps in a flow chart highlighting that in a method according to an embodiment of the invention, the steps of the method are to be carried out in the specific order of: an initial step 110, a separation layer deposition step 110, a mixture material source layer deposition step 111, a diffusion drain layer deposition step 112, and an annealing step 113. Thus, the order is from left to right in the sequence 250b, order also indicated by arrows.

[0159] FIG. 7 shows a method according an embodiment, comprising the steps represented in FIG. 6. In addition, FIG. 7 illustrates that after the annealing step 113, in the embodiment, the method comprises an etching step 114, where the deposited layers, the separation layer 30 and the mixture material source layer 31 are etched away with an etching treatment 164 and thus removed from the doped substrate 10b, leaving just the lightly doped substrate 10b to remain. In other words, after the annealing step 113, as step d), the method comprises an etching step 114, in which the layers deposited in the previous method steps are etched away and removed from the doped substrate 10b.

[0160] As above, after the mixture material source layer deposition step 111, the dopant substance concentration profile is a step function in the depth dimension, indicated with graph 227. After the annealing step 113, the dopant substance concentration becomes is a sloping and slowly decreasing function in the depth dimension, indicated with graph 228 and profile 228a C(d) vs. depth d.

[0161] Etching step 114 may comprise a dry etching step, also called a plasma etching step, or a wet etching step.

[0162] In dry etching, electromagnetic energy, typically radio frequency energy, is applied to a gas containing a chemically reactive element, such as fluorine or chlorine. The plasma releases positively charged ions which bombard the substrate or wafer. Thereby, material is removed.

[0163] For layers comprising silicon dioxide, buffered oxide etch (BOE), also known as buffered HF (hydrofluoric acid) or BHF, is usually used in a wet etching step especially when layers comprising silicon dioxide (SiO.sub.2) or silicon nitride (Si.sub.3N.sub.4) are etched. Buffered oxide etch is a mixture of a buffering agent, such as ammonium fluoride (NH.sub.4F), and hydrofluoric acid (HF).

[0164] In FIG. 7, label 38 points to the layers that are etched away and label 37 illustrates the monotonically decreasing low dopant substance density or dopant substance concentration. As graph 229 illustrates, a very low concentration of dopant substance or substances is achieved.

[0165] Ideally, deposition steps for separation layer deposition step, mixture material source layer deposition step and diffusion drain layer deposition step are deposited in a same deposition tool during and in one deposition run with suitable process parameters and precursors for separation layer, mixture material source layer and potential diffusion drain layer. The atomic layer deposition method is especially suitable for this purpose as the precursors and process temperatures can be adjusted for the deposition of each of the layers 30-32. In particular, it is advantageous that the deposition tool like the ALD coating tool does not need to be evacuated and heated for the deposition of each of the layers 30-32 separately, but instead the same process chambers (reaction and vacuum chambers) can be used, and the deposition steps of the individual layers can follow one another directly. In other words, the separation layer deposition step, the mixture material source layer deposition step and the diffusion drain layer deposition step can follow one another directly without breaking the vacuum or venting or cooling down the coating tool, e.g. an ALD tool. In other words, the mixture material source layer deposition step can follow directly the separation layer deposition step, and the diffusion drain layer deposition step can follow directly the mixture material source layer deposition step. This saves time and effort in depositing the dual-layer dopant source layer stack 41 or tri-layer dopant source layer stack 40. In general, a dopant source layer stack may comprise a dual-layer dopant source layer stack 41 or a tri-layer dopant source layer stack 40.

[0166] In FIG. 7, sequence 250c shows also the steps in a flow chart highlighting that in a method according to an embodiment of the invention, the steps of the method are to be carried out in the specific order of: an initial step 110, a separation layer deposition step 110, a mixture material source layer deposition step 111, an annealing step 113, and an etching step 114. That is, the order is from left to right in the sequence 250c, order also indicated by arrows. Again, the elevated temperature of the annealing step 113 may be between 800 C.-1100 C., more preferably between 850 C.-1000 C. and most preferably between 900 C.-950 C.

[0167] In another method according to an embodiment of the invention, the steps of the method are to be carried out in the specific order of: an initial step 110, a separation layer deposition step 110, a mixture material source layer deposition step 111, a diffusion drain layer deposition step 112, an annealing step 113, and an etching step 114 (this sequence is not shown in FIG. 7). Again, the elevated temperature of the annealing step 113 may again be between 800 C.-1100 C., more preferably between 850 C.-1000 C., and most preferably between 900 C.-950 C.

[0168] FIG. 8a shows an intermediate semiconductor device 80 according to an aspect of the invention. The concept of intermediate means that the device is not ready in a sense of a typical semiconductor fabrication process. Device means, in the present application and in general, a semiconductor wafer or other suitable semiconductor substrate that has already gone through many typical semiconductor process steps and may have many such steps remaining and which is not yet spliced, packaged and bonded into a semiconductor product like an integrated circuit chip.

[0169] The intermediate semiconductor device 80 comprises a semiconductor substrate 10 comprising a surface 11. The intermediate semiconductor device comprises a dopant source layer stack comprising a separation layer 30 on the surface 11 of a substrate 10 and a mixture material source layer 31 on the separation layer 30, the mixture material source layer 31 comprising a mixture material comprising a dopant substance. The atomic percentage of the dopant substance in the mixture material source layer is arranged to be 0.001 at. %-10 at. %, or more preferably 0.01 at. %-1 at. %, or most preferably 0.05 at. %-0.5 at. %.

[0170] A dopant source layer stack 41 comprising two layers, a separation layer 30 on the surface 11 of a substrate 10 and a mixture material source layer 31 is specifically called a dual-layer dopant source layer stack. The intermediate semiconductor device may be realised with the method steps of the initial step 110, the separation layer deposition step 110 and the mixture material source layer deposition step 111 of FIG. 5, for example.

[0171] The concentration distribution 230 of the dopant substance in FIG. 8a forms a step-like function in graph 230a as the intermediate semiconductor device is not yet annealed in an annealing step 113 discussed e.g. in relation to FIG. 5.

[0172] In an embodiment, the dopant substance of the intermediate semiconductor device may comprise boron, phosphorous, antimony or arsenic. Boron is an advantageous substance for a p-type doping (acceptor type) and to arrange a p-type doped semiconductor or portion of a semiconductor. Similarly, phosphorous, antimony or arsenic are advantageous substances for an n-type doping (donor type) and to arrange an n-type doped semiconductor or portion of a semiconductor.

[0173] In an embodiment, the separation layer 30 of the intermediate semiconductor device may comprise silicon dioxide (SiO.sub.2), and the mixture material source layer 31 of the intermediate semiconductor device may comprise phosphorous oxide (PO.sub.x) and silicon dioxide (SiO.sub.2). Alternatively, the separation layer 30 of the intermediate semiconductor device may comprise silicon dioxide (SiO.sub.2), and the mixture material source layer 31 of the intermediate semiconductor device may comprise boron oxide (BO.sub.x) and silicon dioxide (SiO.sub.2). Alternatively, the separation layer 30 of the intermediate semiconductor device may comprise silicon dioxide (SiO.sub.2), and the mixture material source layer 31 of the intermediate semiconductor device may comprise arsenic oxide (AsO.sub.x) and silicon dioxide (SiO.sub.2). Still alternatively, the separation layer 30 of the intermediate semiconductor device may comprise silicon dioxide (SiO.sub.2), and the mixture material source layer 31 of the intermediate semiconductor device may comprise antimony oxide (SbO.sub.x) and silicon dioxide (SiO.sub.2).

[0174] In another embodiment, the separation layer 30 of the intermediate semiconductor device may comprise a stable oxide, and the mixture material source layer 31 of the intermediate semiconductor device may comprise phosphorous oxide (PO.sub.x) and a stable oxide. Alternatively, the separation layer 30 of the intermediate semiconductor device may comprise a stable oxide, and the mixture material source layer 31 of the intermediate semiconductor device may comprise boron oxide (BO.sub.x) and a stable oxide. Alternatively, the separation layer 30 of the intermediate semiconductor device may comprise a stable oxide, and the mixture material source layer 31 of the intermediate semiconductor device may comprise arsenic oxide (AsO.sub.x) and a stable oxide. Still alternatively, the separation layer 30 of the intermediate semiconductor device may comprise a stable oxide, and the mixture material source layer 31 of the intermediate semiconductor device may comprise antimony oxide (SbO.sub.x) and a stable oxide.

[0175] Turning to FIG. 8b, as shown in it, in an embodiment, the intermediate semiconductor device 81 may comprise a diffusion drain layer 32 on the mixture material source layer 31. Together, layers 30-32 can be called a tri-layer dopant source layer stack 40. The intermediate semiconductor device according to FIG. 8b may be arranged with the method steps 110 (the initial step), 110 (separation layer deposition step), 111 (a mixture material source layer deposition step, and 112 (a diffusion drain layer deposition step) of FIG. 6, for example. Again, in FIG. 8b, the concentration distribution 231 of the dopant substance forms a step-like function in graph 231a as the intermediate semiconductor device is not yet annealed in an annealing step 113 discussed e.g. in relation to FIG. 6. The peak concentration region has moved deeper to the layer structure when compared to the layer structure of FIG. 8a due to the diffusion drain layer 32.

[0176] FIG. 9 shows measurement results dopant substance concentrations achieved according to the method of the invention, compared to the dopant substance concentrations achieved with prior art methods. The measurements show dopant substance concentrations (units 1/cm.sup.3) at the surface of sample substrates after a tri-layer dopant source layer stack has been etched away and removed from the doped substrate. In the data of FIG. 9, the samples were exposed to three different annealing temperatures of 925 C., 950 C. and 1000 C.

[0177] For the annealing at a temperature of 925 C., the results are shown with a solid line in FIG. 9. At the surface of the substrate, when no separation layer is present, dopant substance density is at 210.sup.13/cm.sup.3 level. When a separation layer of thickness of 2 nm was present, the dopant substance density drops to 1.8710.sup.12/cm.sup.3.

[0178] For the annealing at a temperature of 950 C., the results are shown with a dashed line in FIG. 9. At the surface of the substrate, when no separation layer is present, dopant substance density is at 2.510.sup.13/cm.sup.3 level. When a separation layer of thickness of 2 nm was present, the dopant substance density drops to 4.0610.sup.12/cm.sup.3.

[0179] With still higher annealing temperature of 1000 C., the dopant substance density is at 310.sup.13/cm.sup.3 level when a separation layer of thickness of 2 nm was present in the annealing step that drives the dopants to the substrate due to diffusion at elevated temperatures. Higher annealing temperatures can drive the dopant substances deeper into the substrate and cause a higher but a flatter dopant substance concentration depth profile as a function of the separation layer thickness.

[0180] Clearly, with a zero-thickness separation layer (that is, in the case of no separation layer), a very high doping concentration of 210.sup.13/cm.sup.3 or higher remains. This is not a suitable concentration for example for the SJ-MOS technologies. With a 2 nm separation layer thickness almost an order of magnitude smaller concentration can be achieved at the surface. With 3 nm separation layer thickness, a slightly smaller concentration when compared to 2 nm separation layer thickness is achieved. FIG. 9 clearly demonstrates that it is possible to control the concentration of the dopant substances in the substrate with a very high degree of accuracy. Adjusting the thickness of thin films with an accuracy in a range of a fraction of one nanometre is quite feasible with vapor-phase deposition methods and especially with the ALD method. Thus, a very accurate control of the dopant substance densities or concentrations can be achieved with the present invention.

Example: Deposition of a Tri-Layer Dopant Source Layer Stack

[0181] The following example shows detailed steps of an actual deposition run of the method and device according to an embodiment of the present invention. In the example, the tri-layer dopant source layer stack comprises: [0182] 1. a SiO.sub.2 separation layer 30, [0183] 2. followed by a mixture of oxides, specifically a mixture material source layer comprising SiO.sub.2 and PO.sub.x and deposited with the atomic layer deposition method to provide a mixture material source layer structure 31, [0184] 3. finalized with a SiO.sub.2 diffusion drain layer 32.

[0185] In the example, the entire layer or film stack (separation layer 30, mixture material source layer 31 and diffusion drain layer 32) was prepared by atomic layer deposition (ALD) method, and the dopant substance, in this case elemental phosphorous, is driven into the substrate by post-deposition annealing. As already mentioned, ALD is an example of vapor phase deposition methods and based on alternate exposure of a surface or an object to at least two vapor phase chemicals (usually called precursor A, first precursor, and precursor B, the second precursor). Resulting layer is a product of said at least two precursors caused by a reaction of precursor A and precursor B. Resulting by-products that are released and which do not participate in the generation of the material layer are usually purged out of the reaction space or reaction area with an inert gas like nitrogen (N.sub.2), helium (He) or argon (Ar).

[0186] In the current example, for mixture material source layer, also precursors C, third precursor, and D, fourth precursor, are deployed to generate a mixture material source layer.

[0187] The sample deposition was performed in Beneq TFS 200 ALD tool. The tool was operated in a thermal single-wafer mode, although batch or plasma configuration could also be used. The reaction chamber was made of aluminum and was heated to a temperature of 300 C.

[0188] The sample substrates were silicon (Si) wafers with a diameter of 200 mm (millimeter) and thickness of 0.7 mm and provided with various trench structures. Wafers were processed one at a time. Prior to the ALD deposition of the various layers, the wafer was exposed to 0.5% HF (hydrofluoric acid) etch for one minute, rinsed with de-ionized water, and dried with an inert nitrogen (N.sub.2) blowing. The wafer was transferred into the tool's load lock within five minutes after etching. The load lock was pumped down to vacuum-like conditions (approximately 2 mbar). In all, the reactor chamber was maintained under a pressure of approximately 2 mbar during the entire deposition run.

[0189] The samples were coated with a sandwich-like structure comprising a bottom silicon dioxide SiO.sub.2 film (2 nm) as the separation layer, a mixture material film of both SiO.sub.2 and PO.sub.x (in total, 0.5 nm in thickness) as the mixture material source layer, and a SiO.sub.2 film (5 nm) as the diffusion drain layer. In other words, the separation layer comprises silicon dioxide (SiO.sub.2), the mixture material source layer comprises both SiO.sub.2 and PO.sub.x and is 0.5 nm thick, and the diffusion drain layer comprises SiO.sub.2 and is 5 nm thick.

[0190] All the films were deposited at a temperature of 300 C. in a continuous process flow without breaking the vacuum. This is a clear advantage for a predictable industrial process, making the process less prone for contamination and increases the process yield and reliability.

[0191] The details of the different layers in the tri-layer dopant source layer stack and their deposition are as follows:

[0192] Deposition of separation layer: First, the separation layer 30 of SiO.sub.2 was deposited by the ALD method with SAM.24 (BDEAS, bis(diethylaminosilane)) as first precursor and ozone (O.sub.3) as the second precursor. The Si precursor was delivered into the reactor from a Beneq HS300 hot source heated to 60 C. through a 600 m orifice. Thickness of the separation layer generated was approximately 2 nm with 40 ALD cycles of first and second precursors.

[0193] The growth per cycle (GPC) of SiO.sub.2 was approximately 0.05 nm/cycle and the number of cycles was adjusted accordingly to yield the desired film. 400.05 nm=2 nm Precursor pulses were followed by 4 s purges that cleaned away the excess precursors.

[0194] Deposition of mixture material source layer: Next, the mixture material source layer 31 was deposited, the mixture material comprising alternating PO.sub.x and SiO.sub.2 depositions. The phosphorous oxide PO.sub.x was deposited using TMPO (trimethylphosphate) as the first precursor and H.sub.2O as the second precursor. Cycles of PO.sub.x and SiO.sub.2 were alternated so that after one PO.sub.x cycle, one SiO.sub.2 cycle followed, leading to a mixture material. A total of 10 PO.sub.x and 10 SiO.sub.2 cycles were run, resulting in a thickness of approximately 0.5 nm for the mixture material source layer 31. TMPO was delivered by the load & release method, and water by vacuum draw through a bellows metering valve opened one turn. TMPO and water sources were kept at room temperature. The pulse length for water was 0.15 s. The TMPO pulse involved a 100 ms boost and 100 ms pulse. Precursor pulses were followed by 4 s purges. The growth per cycle of the source layer was slightly higher, and the layer was deposited by 9 or 10 cycles and with different mixed oxide ratios. For a SiO.sub.2 to PO.sub.x ratio of 1:1, the pulsing was identical in all cycles, i.e., SAM.24/purge/O.sub.3/purge/TMPO/purge/water/purge.

[0195] Deposition of the diffusion drain layer: Finally, the diffusion drain layer 32 was deposited with the same precursors as with the separation layer. Thickness of 5 nm was achieved with 100 cycles.

[0196] After preparing the tri-layer dopant source layer stack as discussed above, the sample was retracted from the reaction chamber and into the load lock. The load lock was vented, and the sample was cooled down before transferring into a wafer container in the cleanroom atmosphere. Once all the wafers were processed, the wafer container was sealed with cleanroom tape and packed in two nested bags for minimizing particle contamination. The samples were shipped to a third party where they were exposed to post-deposition annealing. The annealing temperature was varied between 925 C. and 1000 C., and the annealing time was typically 30 min.

[0197] Results: For measurements, a control sample was generated without the separation layer or the diffusion drain layer. Doping measurements were performed with SIMS (secondary ion mass spectrometry). Without the separation layer, the dopant substance concentration, that is, the elemental phosphorous concentration, for the purposes of was approximately 10 too high: Concentration of the dopant substance achieved with a method according to the invention was 1.710.sup.12/cm.sup.3, and without using the method (without the separation layer and the diffusion drain layer), the result was 210.sup.13/cm.sup.3, again validating that the invention is suitable for doping semiconductors with diffusion doping with good control of low dopant substance concentrations.

[0198] The invention has been described above with reference to the examples shown in the figures. However, the invention is in no way restricted to the above examples but may vary within the scope of the claims.