Power converter with modular stages connected by floating terminals

Abstract

An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.

Claims

1. A power converter comprising: a plurality of capacitors and a plurality of switches controllable to switch between a first switch configuration or a second switch configuration to respectively correspond to at least a first conductive path or a second conductive path to be formed within the power converter via respective flows of current through the at least the first conductive path or the second conductive path; and an inductor to be interconnected with a first capacitor or a second capacitor of the plurality of capacitors via the plurality of switches so as to alternately form the at least the first or the second conductive path via the respective flows of current, the first conductive path to be formed to couple the inductor between an input port and an output port of the power converter, and the second conductive path to be formed to couple the inductor between a common voltage reference source and the output port of the power converter, wherein the first conductive path is to be formed via the first switch configuration to at least partially effect at least a positive adiabatic change in charge on the first capacitor, and wherein, some switches of the plurality of switches to be in an open state during the first or the second switch configuration, and wherein a voltage of respective open switches of the some switches of the plurality of switches comprise either one set of similar voltages or two separate sets of similar voltages.

2. The power converter of claim 1, wherein the common voltage reference source comprises ground.

3. The power converter of claim 1, wherein a voltage of a negative terminal of an electrical load comprises the common voltage reference source.

4. The power converter of claim 1, wherein a voltage of a positive terminal of an electrical load comprises the common voltage reference source.

5. The power converter of claim 1, wherein the second conductive path is to be formed via the second switch configuration at least partially effect at least a negative adiabatic change in charge on the second capacitor.

6. The power converter of claim 1, wherein the inductor to be coupled to the common voltage reference source via no more than one switch positioned therebetween.

7. The power converter of claim 1, wherein the first conductive path is to be formed via the first switch configuration to facilitate a partial adiabatic change in charge on the first capacitor.

8. The power converter of claim 1, wherein the first conductive path is to be formed via the first switch configuration to limit a root mean square (RMS) current through at least the first capacitor.

9. The power converter of claim 1, wherein the first conductive path is to be formed via the first switch configuration to at least partially effect the respective flows of current through the inductor.

10. The power converter of claim 1, wherein the first conductive path is to be formed via the first switch configuration to at least partially effect a change in charge on the first capacitor by passing the charge through the inductor.

11. The power converter of claim 1, wherein the positive adiabatic change in charge on the first capacitor is to be at least partially effected by the inductor so as to prevent or reduce systemic loss of energy during the change in charge.

12. The power converter of claim 1, wherein, in the first switch configuration, at least one capacitor of the plurality of capacitors to be charged at a first rate or, in the second switch configuration, the at least one capacitor of the plurality of capacitors to be discharged at a second rate, at least one of the first rate or the second rate to be determined, at least in part, by the inductor.

13. The power converter of claim 12, wherein, in the first switch configuration, at least one additional capacitor of the plurality of capacitors is to discharge at a third rate or, in the second switch configuration, the at least one additional capacitor of the plurality of capacitors is to charge at a fourth rate, at least one of the third rate or the fourth rate to be determined, at least in part, by the inductor.

14. A soft switched power converter comprising: a switched capacitor arrangement to include a plurality of capacitors to be alternately connected to a first group of switches or to a second group of switches based, at least in part, on one or more control signals to respectively implement a plurality of switching patterns via one or more switching frequencies so as to transfer energy from an input port to an output port of the soft switched power converter, the plurality of capacitors capable of being coupled to implement multiple distinct voltage conversion ratios of the soft switched power converter; and a switched magnetic arrangement to include at least one inductor to be arranged in a configuration with the switched capacitor arrangement to facilitate an adiabatic charge or discharge of at least some of the plurality of capacitors at respective charge or discharge rates, wherein at least one of the charge or discharge rates is to be determined, at least in part, by the at least one inductor so as to prevent or reduce systemic loss of the energy from the input port to the output port of the soft switched power converter.

15. The soft switched power converter of claim 14, wherein at least one of the one or more switching frequencies to include a switching frequency to facilitate soft switching of the first or the second group of switches of the soft switched power converter.

16. The soft switched power converter of claim 14, wherein the at least one inductor is to limit a root mean square (RMS) current through one or more capacitors of the plurality of capacitors at respective charge or discharge rates.

17. The soft switched power converter of claim 14, wherein, with one or more switches in the first or the second group of switches in an open state during the plurality of switching patterns, voltages across the one or more switches to be at similar voltages.

18. The soft switched power converter of claim 14, wherein the multiple distinct voltage conversion ratios to correspond to multiple operative configurations of the soft switched power converter.

19. The soft switched power converter of claim 18, wherein a particular conversion voltage ratio of the multiple distinct voltage conversion ratios to be determined, at least in part, via a number of capacitors to be included in a particular operative configuration of the multiple operative configurations of the soft switched power converter.

20. The soft switched power converter of claim 14, wherein the soft switched power converter in a first distinct voltage conversion ratio of the multiple distinct voltage conversion ratios is to generate a first output voltage.

21. The soft switched power converter of claim 14, wherein the soft switched power converter in a second distinct voltage conversion ratio of the multiple distinct voltage conversion ratios is to generate a second output voltage.

22. The soft switched power converter of claim 14, wherein the soft switched power converter comprises a reconfigurable power converter to generate a plurality of output voltages based, at least in part, on the multiple distinct voltage conversion ratios.

23. The soft switched power converter of claim 14, wherein the soft switched power converter comprises a reconfigurable power converter to provide multiple output voltages to multiple electrical loads.

24. The soft switched power converter of claim 14, wherein the soft switched power converter comprises a single-stage power converter or a bidirectional multi-stage power converter.

25. The soft switched power converter of claim 14, wherein at least some of the plurality of capacitors are to be shorted together via a shared phase node during operation of the soft switched power converter.

26. The soft switched power converter of claim 14, wherein some switches in the first or the second group of switches to be in an open state during the plurality of switching patterns, and wherein a voltage of respective open switches of the some switches in the first or the second group of switches comprise either one set of similar or two separate sets of similar voltages.

27. The soft switched power converter of claim 14, wherein the soft switched power converter comprises a single-stage power converter or a bidirectional multi-stage power converter.

28. The soft switched power converter of claim 26, wherein, for the two separate sets of similar voltages, one set of similar voltages is approximately twice the other set of similar voltages.

29. The power converter of claim 1, wherein, for the two separate sets of similar voltages, one set of similar voltages is approximately twice the other set of similar voltages.

Description

DESCRIPTION OF THE FIGURES

(1) FIG. 1 shows a known DC-DC converter with separate regulating circuit and switching network;

(2) FIG. 1A shows a bidirectional version of FIG. 1;

(3) FIGS. 2-4 show DC-DC converters with alternate configurations of regulating circuits and switching networks;

(4) FIG. 5 shows a particular implementation of the power converter illustrated in FIG. 4;

(5) FIG. 6 shows an embodiment with multiple regulating circuits;

(6) FIG. 7 shows an RC circuit;

(7) FIG. 8 shows a model of a switched capacitor DC-DC converter;

(8) FIGS. 9A and 9B show a series-parallel SC converter operating in charge phase and discharge phase respectively;

(9) FIG. 10 shows a series pumped symmetric cascade multiplier with diodes;

(10) FIG. 11 shows a parallel pumped symmetric cascade multiplier with diodes;

(11) FIG. 12 shows charge pump signals;

(12) FIG. 13 shows a two-phase symmetric series pumped cascade multiplier with switches;

(13) FIG. 14 shows a two-phase symmetric parallel pumped cascade multiplier with switches;

(14) FIG. 15 shows four different cascade multipliers along with corresponding half-wave versions;

(15) FIG. 16 shows output impedance of a switched-capacitor converter as a function of frequency;

(16) FIG. 17 shows a particular implementation of the DC-DC converter illustrated in FIG. 1A with a full-wave adiabatically charged switching network;

(17) FIG. 18 shows the DC-DC converter illustrated in FIG. 17 during phase A;

(18) FIG. 19 shows the DC-DC converter illustrated in FIG. 17 during phase B;

(19) FIG. 20 shows various waveforms associated with a 4:1 adiabatically charged converter;

(20) FIG. 21 shows adiabatic charging of series connected stages;

(21) FIG. 22 shows a particular implementation of the power converter illustrated in FIG. 21;

(22) FIG. 23 shows an AC voltage rectified using a reconfigured switched-capacitor stage;

(23) FIG. 24 shows an AC-DC power converter architecture;

(24) FIG. 25 shows a particular implementation of the AC-DC converter illustrated in FIG. 24;

(25) FIG. 26 shows the AC-DC converter illustrated in FIG. 25 during the positive portion of the AC cycle;

(26) FIG. 27 shows the AC-DC converter illustrated in FIG. 25 during the negative portion of the AC cycle;

(27) FIG. 28 shows an AC-DC power converter architecture with power-factor correction;

(28) FIGS. 29 and 30 show particular implementations of the DC-DC converter illustrated in FIG. 1;

(29) FIGS. 31 and 32 show particular implementations of the DC-DC converter illustrated in FIG. 3;

(30) FIGS. 33 and 34 show particular implementations of the DC-DC converter illustrated in FIG. 2; and

(31) FIGS. 35 and 36 show particular implementations of the DC-DC converter illustrated in FIG. 4.

DETAILED DESCRIPTION

(32) Embodiments described herein rely at least in part on the recognition that in a multi-stage DC-DC converter, a switching network and a regulating circuit can be made essentially modular and can be mixed and matched in a variety of different ways. This provides a transformative integrated power solution (TIPS) for the assembly of such converters. As such, the configuration shown in FIG. 1 represents only one of multiple ways to configure one or more switching networks 12A with one or more regulating circuits 16A. FIG. 1A shows a bidirectional version of FIG. 1, where power can flow either from a voltage source 14 to a load 18A or from the load 18A to the voltage source 14 as indicated by the arrows.

(33) There are two fundamental elements described in connection with the following embodiments: switching networks and regulating circuits. Assuming series connected elements of the same type are combined, there are a total of four basic building blocks. These are shown FIGS. 1-4. The embodiments disclosed herein include at least one of the four basic building blocks shown in FIGS. 1-4.

(34) Additional embodiments further contemplate the application of object-oriented programming concepts to the design of DC-DC converters by enabling switching networks 12A and regulating circuits 16A to be instantiated in a variety of different ways, so long as their inputs and outputs continue to match in a way that facilitates modular assembly of DC-DC converters having various properties.

(35) The switching network 12A in many embodiments is instantiated as a switching capacitor network. Among the more useful switched capacitor topologies are: Ladder, Dickson, Series-Parallel, Fibonacci, and Doubler, all of which can be adiabatically charged and configured into multi-phase networks. A particularly useful switching capacitor network is an adiabatically charged version of a full-wave cascade multiplier. However, diabatically charged versions can also be used.

(36) As used herein, changing the charge on a capacitor adiabatically means causing an amount of charge stored in that capacitor to change by passing the charge through a non-capacitive element. A positive adiabatic change in charge on the capacitor is considered adiabatic charging while a negative adiabatic change in charge on the capacitor is considered adiabatic discharging. Examples of non-capacitive elements include inductors, magnetic elements, resistors, and combinations thereof.

(37) In some cases, a capacitor can be charged adiabatically for part of the time and diabatically for the rest of the time. Such capacitors are considered to be adiabatically charged. Similarly, in some cases, a capacitor can be discharged adiabatically for part of the time and diabatically for the rest of the time. Such capacitors are considered to be adiabatically discharged.

(38) Diabatic charging includes all charging that is not adiabatic and diabatic discharging includes all discharging that is not adiabatic.

(39) As used herein, an adiabatically charged switching network is a switching network having at least one capacitor that is both adiabatically charged and adiabatically discharged. A diabatically charged switching network is a switching network that is not an adiabatically charged switching network.

(40) The regulating circuit 16A can be instantiated as any converter with the ability to regulate the output voltage. A buck converter for example, is an attractive candidate due to its high efficiency and speed. Other suitable regulating circuits 16A include boost converters, buck/boost converters, fly-back converters, Cuk converters, resonant converters, and linear regulators.

(41) In one embodiment, shown in FIG. 2, a voltage source 14 provides an input to a first switching network 12A, which is instantiated as a switched capacitor network. The output of the first switching network 12A is a lower voltage than the input voltage that is provided to a regulating circuit 16A (e.g. a buck, a boost, or a buck/boost converter). This regulating circuit 16A provides a regulated input voltage to a second switching network 12B, such as another switched capacitor network. A high voltage output of this second switching network 12B is then applied to a load 18A.

(42) An embodiment such as that shown in FIG. 2 can be configured to regulate the load 18A or to regulate the source 14 depending on the direction of energy flow.

(43) In another embodiment, shown in FIG. 3, a low voltage source 14 connects to an input of a regulating circuit 16A, the output of which is provided to an input of a switching network 12A to be boosted to a higher DC value. The output of the switching network is then provided to a load 18A.

(44) An embodiment such as that shown in FIG. 3 can be used to regulate the source 14 or the load 18A depending on the direction of energy flow.

(45) Referring now to FIG. 4, another embodiment of a converter 100 includes a first regulating circuit 300A connected to an input 102 thereof and a second regulating circuit 300B connected to an output 104 thereof. Between the first and second regulating circuits 300A, 300B is a switching network 200 having an input 202 and an output 204. The switching network includes charge storage elements 210 interconnected by switches 212. These charge storage elements 210 are divided into first and second groups 206, 208.

(46) In some embodiments, the switching network 200 can be a bidirectional switching capacitor network such as that shown in FIG. 5. The switching capacitor network in FIG. 5 features a first capacitor 20 and a second capacitor 22 in parallel. A first switch 24 selectively connects one of the first and second capacitors 20, 22 to a first regulating circuit 300A, and a second switch 26 selectively connects one of the first and second capacitors 20, 22 to the second regulating circuit 300B. Both the first and second switches 24, 26 can be operated at high frequency, thus facilitating the adiabatic charging and discharging of the first and second capacitors 20, 22.

(47) The particular embodiment shown in FIG. 5 has a two-phase switching network 200. However, other types of switching networks can be used instead.

(48) In yet another embodiment, shown in FIG. 6, multiple regulating circuits 16A, 16B, 16C are provided at an output of a first switching network 12A for driving multiple loads 18A-18C. For one of the loads 18C, a second switching network 12B is provided between the load 18C and the corresponding regulating circuit 16C thus creating a pathway similar to that shown in FIG. 2. FIG. 6 thus provides an example of how the modular construction of regulating circuits and switching networks facilitates the ability to mix and match components to provide flexibility in DC-DC converter construction.

(49) A switched capacitor (SC) DC-DC power converter includes a network of switches and capacitors. By cycling the network through different topological states using these switches, one can transfer energy from an input to an output of the SC network. Some converters, known as charge pumps, can be used to produce high voltages in FLASH and other reprogrammable memories.

(50) FIG. 7 shows a capacitor C initially charged to some value V.sub.C(0). At t=0 the switch S is closed. At that instant, a brief surge of current flows as the capacitor C charges to its final value of V.sub.in. The rate of charging can be described by a time constant =RC, which indicates the time it takes the voltage to either rise or fall to within 1/e of its final value. The exact capacitor voltage v.sub.c (t) and current i.sub.c (t) are given by the following equations:

(51) $\begin{array}{cc}{v}_c\left(t\right)=v_c\left(0\right)+\left[v_{\mathrm{in}}-v_c\left(0\right)\right]\left(1-e^{-t/\mathrm{RC}}\right),& \left(1.1\right)\\ \mathrm{and}& \\ i_c\left(t\right)=C\frac{{\mathrm{dv}}_c}{\mathrm{dt}}=\frac{V_{\mathrm{in}}-v_v\left(0\right)}{R}{e}^{-t/\mathrm{RC}}.& \left(1.2\right)\end{array}$

(52) The energy loss incurred while charging the capacitor can be found by calculating the energy dissipated in resistor R, which is
E.sub.loss(t)=.sub.t=0.sup.i.sub.R(t)v.sub.R(t)dt=.sub.t=0.sup.[i.sub.c(t)].sup.2Rdt.(1.3)

(53) The equation can be further simplified by substituting the expression for i.sub.c (t) from equation (1.2) into equation (1.3). Evaluating the integral then yields
E.sub.loss(t)=[V.sub.inv.sub.c(0)].sup.2C[1e.sup.2t/RC].

(54) If the transients are allowed to settle (i.e. t.fwdarw.), the total energy loss incurred in charging the capacitor is independent of its resistance R. In that case, the amount of energy loss is equal to
E.sub.loss()=Cv.sub.c.sup.2

(55) A switched capacitor converter can be modeled as an ideal transformer, as shown in FIG. 8, with a finite output resistance R.sub.o that accounts for the power loss incurred in charging or discharging of the energy transfer capacitors, as shown in FIG. 8. This loss is typically dissipated in the ON resistance of the MOSFETs and equivalent series resistance of the capacitors.

(56) The output voltage of the switched-capacitor converter is given by

(57) $V_o=V_{\mathrm{in}}\frac{N_2}{N_1}-I_o{R}_o$

(58) There are two limiting cases where the operation of the switched capacitor converters can be simplified and R.sub.o easily found. These are referred to as the slow-switching limit and the fast-switching limit.

(59) In the fast-switching limit (>>T.sub.sw), the charging and discharging currents are approximately constant, resulting in a triangular AC ripple on the capacitors. Hence, R.sub.o is sensitive to the series resistance of the MOSFETs and capacitors, but is not a function of the operating frequency. In this case, the output resistance of the converter operating in the fast-switching limit is a function of parasitic resistance.

(60) In the slow-switching limit, the switching period T.sub.sw is much longer than the RC time constant T of the energy transfer capacitors. Under this condition, systemic energy loss irrespective of the resistance of the capacitors and switches. This systemic energy loss arises in part because the root mean square (RMS) of the charging and discharging current is a function of the RC time constant. If the effective resistance R.sub.eff of the charging path is reduced (i.e. reduced RC), the RMS current increases and it so happens that the total charging energy loss (E.sub.loss=I.sub.RMS.sup.2R.sub.eff=CV.sub.C2) is independent of R.sub.eff. One solution to minimize this energy loss is to increase the size of the pump capacitors in the switched capacitor network.

(61) It is desirable for a switching capacitor network to have a common ground, large transformation ratio, low switch stress, low DC capacitor voltage, and low output resistance. Among the more useful topologies are: Ladder, Dickson, Series-Parallel, Fibonacci, and Doubler.

(62) One useful converter is a series-parallel switched capacitor converter. FIGS. 9A and 9B show a 2:1 series-parallel switched capacitor converter operating in charge phase and in discharge phase, respectively. During the charge phase, the capacitors are in series. In the discharge phase, the capacitors are in parallel. In its charge phase, capacitor voltages v.sub.C1 and v.sub.C2 add up to V.sub.1 while in its discharge phase, v.sub.C1 and v.sub.C2 equal V.sub.2, which means that V.sub.2=V.sub.1/2.

(63) Other useful topologies are cascade multiplier topologies, as shown in FIGS. 10 and 11. In both charge pumps, the source is located at V.sub.1 and the load is located at V.sub.2. In these types of charge pumps, packets of charge are pumped along a diode chain as the coupling capacitors are successively charged and discharged. As shown in FIG. 12, clock signals v.sub.clk and v.sub.clk with amplitude v.sub.pump are 180 degrees out of phase. The coupling capacitors can either be pumped in series or parallel.

(64) It takes n clock cycles for the initial charge to reach the output. The charge on the final pump capacitor is n times larger than the charge on the initial pump capacitor and thus the output voltage V.sub.2 for the converters is V.sub.1+(n1)v.sub.pump in both pumping configurations.

(65) Although the foregoing topologies are suitable for stepping up voltage, they can also be used to step down voltage by switching the location of the source and the load. In such cases, the diodes can be replaced with controlled switches such as MOSFETs and BJTs.

(66) The foregoing cascade multipliers are half-wave multipliers in which charge is transferred during one phase of the of the clock signal. This causes a discontinuous input current. Both of these cascade multipliers can be converted into full-wave multipliers by connecting two half-wave multipliers in parallel and running the half-wave multipliers 180 degrees out of phase. FIG. 13 shows a full-wave symmetric series pumped cascade multiplier version while FIG. 14 shows a full-wave symmetric parallel pumped cascade multiplier version. Unlike the diodes in the half-multiplier, the switches in FIG. 13 and FIG. 14 are bidirectional. As a result, in both of these cascade multipliers, power can flow either from the source to the load or from the load to the source. Asymmetric multipliers can also be converted into full-wave multipliers

(67) FIG. 15 shows four different step-up versions of full-wave symmetric multipliers along with their corresponding half-wave versions. Furthermore, it is possible to combine N phases in parallel and run them 180 degrees/N out of phase to reduce output voltage ripple and increase output power handling capability.

(68) The basic building blocks in the modular architecture shown FIGS. 1-4 can either be connected as independent entities or coupled entities. In the situation where the switching networks and regulating circuits are tightly coupled, it is possible to prevent and/or reduce the systemic energy loss mechanism of the switching networks through adiabatic charging. This generally includes using a regulating circuit to control the charging and discharging of the capacitors in the switching network. Furthermore, the output voltage of the regulating circuit and thus the total converter can be regulated in response to external stimuli. One approach to regulating the output voltage is by controlling the average DC current in the magnetic storage element.

(69) A desirable feature of a regulating circuit is to limit the root mean square (RMS) current through the capacitors in the switching network. To do that, the regulating circuit uses either resistive or magnetic storage elements. Unfortunately, resistive elements would consume power so their use is less desirable. Therefore, embodiments described herein rely on a combination of switches and a magnetic storage element in the regulating circuit. The regulating circuit limits the RMS current by forcing the capacitor current through a magnetic storage element in a regulating circuit that has an average DC current. The switches in the regulating circuit are operated so as to maintain an average DC current through the magnetic storage element.

(70) The regulating circuit may limit both the RMS charging current and the RMS discharging current of at least one capacitor in the switching network. A single regulating circuit may limit the current in or out of switching network by sinking and/or sourcing current. Therefore, there are four fundamental configurations, which are shown in FIGS. 1-4. Assuming power flows from source to load then, in FIG. 1, regulating circuit 16A may sink both the charging and discharging current of switching network 12A. In FIG. 3, regulating circuit 16A may source both the charging and discharging current of switching network 12A. In FIG. 4, regulating circuit 300A may source the charging current of switching network 200 and regulating circuit 300B may sink the discharging current of the same switching network 200 and vice-versa. In FIG. 2, regulating circuit 16A may source both the charging and discharging current of switching network 12B while also sinking both the charging and discharging current of switching network 12A. Furthermore, if both the switching networks and regulating circuits allow power to flow in both directions then bidirectional power flow is possible (source to load and load to source).

(71) One embodiment relies on at least partially adiabatically charging full-wave cascade multipliers. Cascade multipliers are a preferred switching network because of their superior fast-switching limit impedance, ease of scaling up in voltage, and low switch stress.

(72) In cascade multipliers, the coupling capacitors are typically pumped with a clocked voltage source v.sub.clk & v.sub.clk. However, if the coupling capacitors are pumped with a clocked current source i.sub.clk & i.sub.clk instead, then the RMS charging and discharging current in the coupling capacitor may be limited. In this case, the capacitors are at least partially charged adiabatically thus lowering, if not eliminating, the CVc.sup.2 loss that is associated with a switched capacitor converter when operated in the slow-switching limit. This has the effect of lowering the output impedance to the fast-switching limit impedance. As shown by the black dotted line in FIG. 16, which depicts adiabatic operation under full adiabatic charging, the output impedance would no longer be a function of switching frequency.

(73) With all else being equal, an adiabatically charged switched-capacitor converter can operate at a much lower switching frequency than a conventionally charged switched capacitor converter, but at higher efficiency. Conversely, an adiabatically charged switched-capacitor converter can operate at the same frequency and with the same efficiency as a conventionally charged switched-capacitor converter, but with much smaller coupling capacitors, for example between four and ten times smaller.

(74) FIG. 17 shows a step-down converter consistent with the architecture shown in FIG. 1A. However, in this embodiment, the switching network 12A is adiabatically charged using the regulating circuit 16A. The clocked current sources i.sub.clk & i.sub.clk are emulated by four switches and regulating circuit 16A. The output capacitor C.sub.O has also been removed so as to allow V.sub.X to swing. In this example, the regulating circuit 16A is a boost converter that behaves as constant source with a small AC ripple. Any power converter that has a non-capacitive input impedance would have allowed adiabatic operation. Although switch-mode power converters are attractive candidates due to their high efficiency, linear regulators are also practical.

(75) In operation, closing switches labeled 1 charges capacitors C.sub.4, C.sub.5, and C.sub.6 while discharging capacitors C.sub.1, C.sub.2 and C.sub.3. Similarly, closing switches 2 has the complementary effect. The first topological state (phase A) is shown in FIG. 18, where all switches labeled 1 are closed and all switches labeled 2 are opened. Similarly, the second topological state (phase B) is shown in FIG. 19, where all switches labeled 2 are closed and all switches labeled 1 are opened. In this embodiment, the regulating circuit 16A limits the RMS charge and discharging current of each capacitor. For example, capacitor C.sub.3 is discharged through the filter inductor in regulating circuit 16A during phase A, while capacitor C.sub.3 is charged through the filter inductor in regulating circuit 16A during phase B, clearly demonstrating the adiabatic concept. Furthermore, all of the active components are implemented with switches so the converter can process power in both directions.

(76) A few representative node voltages and currents are shown in FIG. 20. There is a slight amount of distortion on the rising and falling edges of the two illustrated currents (I.sub.P1 and I.sub.P2), but for the most part, the currents resemble two clocks 180 degrees out of phase. In general, adiabatic charging occurs in cascade multipliers if at least one end of a switch stack is not loaded with capacitance, as is the case in this embodiment, where the V.sub.X node is loaded down by the regulating circuit 16A.

(77) The modular architecture with the basic building blocks shown in FIGS. 1-4 may be expanded to cover a wider range of applications, such as high-voltage DC, AC-DC, buck-boost, and multiple output voltages. Each of these applications includes separating the transformation and regulation functions. Extension of the architecture can also incorporate adiabatically charged switched capacitors converters.

(78) In many switched-capacitor converters, the number of capacitors and switches increases linearly with the transformation ratio. Thus, a large number of capacitors and switches are required if the transformation ratio is large. Alternatively, a large transformation ratio can be achieved by connecting numerous low gain stages in series as depicted in FIG. 21. The transformation ratio of the total switch capacitor stack (V.sub.in/V.sub.x) is as follows:

(79) $\begin{array}{cc}\frac{V_{\mathrm{in}}}{V_x}=N_1{N}_2\mathrm{.Math.}{N}_n& \left(2.1\right)\end{array}$

(80) The main disadvantage of the series stacked configuration is that the voltage stresses on the front stages are much higher than those of the rear stages. This will normally require stages with different voltage ratings and sizes.

(81) Adiabatic charging of a preceding series-connected switching network only occurs if the following switching network controls the charging and discharging current of the preceding stage. Thus, it is preferable to use full-wave switched-capacitor converters in the front stages or to use switched-capacitor stages such as the single-phase series-parallel switched-capacitor converters with magnetic based filters.

(82) FIG. 22 shows a converter with two series-connected switching networks consistent with the architecture shown in FIG. 21. Both switching networks 12A and 12D are two-phase cascade multipliers. In operation, switches labeled 1 and 2 are always in complementary states and switches labeled 7 and 8 are always in complementary states. Thus, in a first switched-state, all switches labeled 1 are open and all switches labeled 2 are closed. In a second switched-state, all switches labeled 1 are closed and all switches labeled 2 are opened. In this embodiment, closing switches 1 charges the capacitors C.sub.1, C.sub.2, C.sub.3, while discharging the capacitors C.sub.4, C.sub.5, C.sub.6 and closing switches 2 has the complementary effect. Also, closing switches 7 charges capacitors C.sub.7, C.sub.5, C.sub.9, while discharging capacitors C.sub.10, C.sub.11, C.sub.12 and closing switches 8 has the complementary effect.

(83) The power converter provides a total step-down of 32:1, assuming the regulating circuit 16A is a buck converter with a nominal step-down ratio of 2:1. Furthermore, if the input voltage is 32 V and the output voltage is 1 V, then the switches in the first switching network 12A will need to block 8 volts while the switches in the second switching network 12D will need to block 2 volts.

(84) The modular architecture with the basic building blocks shown in FIGS. 1-4 may be configured to handle an AC input voltage as well. One of the main attributes of switched capacitor converters is their ability to operate efficiency over a large input range by reconfiguring the switched-capacitor network. If the AC wall voltage (i.e. 60 Hz & 120 V.sub.RMS) can be thought of as a slow moving DC voltage, then the front-end switched-capacitor stage should be able to unfold the time-varying input voltage into a relatively stable DC voltage.

(85) A diagram of a 120 V.sub.RMS AC waveform over a single 60 Hz cycle overlaid with the unfolded DC voltage is shown in FIG. 23. The AC switching network has different configurations (1/3, 1/2, 1/1) at its disposal along with an inverting stage. It was also designed to keep the DC voltage under 60 V. Once the AC voltage is unfolded, it is the job of the regulating circuit 16A, shown in FIG. 24, to produce a final output voltage. It may also be necessary to place another switching network 16A between the AC switching network 13A and regulating circuit 16A to further condition the voltage. If this is the case, then the caveats for series-connected stages hold true since the AC switching network 13A is a special purpose switching network 12A.

(86) FIG. 25 shows the AC-DC converter corresponding to the architecture shown in FIG. 24. In this embodiment, the AC switching network 13A is a synchronous AC bridge followed by a reconfigurable two-phase step-down cascade multiplier with three distinct conversion ratios (1/3, 1/2, 1/1) while the regulating circuit 16A is a synchronous buck converter. In operation, switches labeled 7 and 8 are always in complementary states. During the positive portion of the AC cycle (0 to radians) all switches 7 are closed while all switches labeled 8 are opened as shown in FIG. 26. Similarly, during the negative portion of the AC cycle ( to 2 radians) all switches labeled 8 are closed while all switches labeled 7 are opened as shown in FIG. 27.

(87) In addition to the inverting function provided by switches 7 and 8, the switches labeled 1A-1E and switches labeled 2A-2E may be selectively opened and closed as shown in Table 1 to provide three distinct conversion ratios of: 1/3, 1/2 and 1.

(88) TABLE-US-00001 TABLE 1 V.sub.2/V.sub.1 1A 1B 1C 1D 1E 2A 2B 2C 2D 2E 1/3 CLK CLK CLK CLK CLK CLKB CLKB CLKB CLKB CLKB 1/2 CLKB CLK CLK CLK CLK CLK CLKB CLKB CLKB CLKB 1/1 ON ON ON OFF OFF ON ON ON OFF OFF

(89) The AC switching network 13A is provided with a digital clock signal CLK. A second signal CLKB is also generated, which may simply be the complement of CLK (i.e. is high when CLK is low and low when CLK is high), or which may be generated as a non-overlapping complement as is well known in the art. With a switching pattern set in accordance with the first row of Table 1, the AC switching network 13A provides a step-down ratio of one-third (1/3). With a switching pattern set in accordance with the second row of Table 1, the AC switching network 13A provides a step-down ratio of one-half (1/2). With a switching pattern set in accordance with the first row of Table 1, the AC switching network 13A provides a step-down ratio of one.

(90) Most power supplies attached to the wall meet some power factor specification. Power factor is a dimensionless number between 0 and 1 that defines a ratio of the real power flowing to apparent power. A common way to control the harmonic current and thus boost the power factor is by using an active power factor corrector, as shown in FIG. 28. The power-factor correction circuit 17A causes the input current to be in phase with the line voltage, thus causing reactive power consumption to be zero.

(91) FIGS. 29-36 show specific implementations of power converters that conform to the architectural diagrams shown in FIGS. 1-4. In each implementation a regulating circuit or multiple regulating circuits may limit both the RMS charging current and the RMS discharging current of at least one capacitor in each switching network so all of these switching networks are adiabatically charged switching networks. However, if decoupling capacitors 9A or 9B are present, then the ability of the regulating circuit to limit the RMS charging and discharging current may be diminished. Capacitors 9A and 9B are optional and to keep the output voltage fairly constant capacitor C.sub.O is used. Furthermore, for simplicity, the switching network in each implementation has a single conversion ratio. However, reconfigurable switching networks that provide power conversion at multiple distinct conversion ratios may be used instead.

(92) In operation, switches labeled 1 and 2 are always in complementary states. Thus, in a first switched-state, all switches labeled 1 are open and all switches labeled 2 are closed. In a second switched-state, all switches labeled 1 are closed and all switches labeled 2 are opened. Similarly, switches labeled 3 are 4 are in complementary states, switches labeled 5 are 6 are in complementary states, and switches labeled 7 are 8 are in complementary states. Typically, the regulating circuits operate at higher switching frequencies than the switching networks. However, there is no requirement on the switching frequencies between and amongst the switching networks and regulating circuits.

(93) FIG. 29 shows a step-up converter corresponding to the architecture shown in FIG. 1. In this embodiment, the switching network 12A is a two-phase step-up cascade multiplier with a conversion ratio of 1:3 while the regulating circuit 16A is two-phase boost converter. In operation, closing switches labeled 1 and opening switches labeled 2 charges capacitors C.sub.3 and C.sub.4 while discharging capacitors C.sub.1 and C.sub.2. Conversely, opening switches labeled 1 and closing switches labeled 2 charges capacitors C.sub.1, and C.sub.2 while discharging capacitors C.sub.3 and C.sub.4.

(94) FIG. 30 shows bidirectional step-down converter corresponding to the architecture shown in FIG. 1A. In this embodiment, the switching network 12A is a two-phase step-down cascade multiplier with a conversion ratio of 4:1 while the regulating circuit 16A is synchronous buck converter. In operation, closing switches labeled 1 and opening switches labeled 2 charges capacitors C.sub.1, C.sub.2, and C.sub.3 while discharging capacitors C.sub.4, C.sub.5, and C.sub.6. Conversely, opening switches labeled 1 and closing switches labeled 2 charges capacitors C.sub.4, C.sub.5, and C.sub.6 while discharging capacitors C.sub.1, C.sub.2, and C.sub.3. All of the active components are implemented with switches so the converter can process power in both directions.

(95) FIG. 31 shows a step-up converter consistent with the architecture shown in FIG. 3. In this embodiment, the regulating circuit 16A is boost converter while the switching network 12A is a two-phase step-up series-parallel SC converter with a conversion ratio of 2:1. In operation, closing switches 1 charges capacitor C.sub.2 while discharging capacitor C.sub.1. Closing switches 2 has the complementary effect.

(96) FIG. 32 shows a bidirectional up-down converter consistent with the architecture shown in FIG. 3. In this embodiment, the regulating circuit 16A is synchronous four switch buck-boost converter while the switching network 12A is a two-phase step-up cascade multiplier with a conversion ratio of 4:1. In operation, closing switches labeled 1 charges capacitors C.sub.4, C.sub.5, and C.sub.6 while discharging capacitors C.sub.1, C.sub.2, and C.sub.3. Closing switches 2 has the complementary effect. All of the active components are implemented with switches so the converter can process power in both directions.

(97) FIG. 33 shows an inverting up-down converter consistent with the architecture shown in FIG. 2. In this embodiment, the switching network 12A is a step-up series-parallel SC converter with a conversion ratio of 2:1, the regulating circuit 16A is a buck/boost converter and the switching network 12B is a step-up series-parallel SC converter with a conversion ratio of 2:1. In operation, closing switches 1 charges capacitor C.sub.1 while closing switches 2 discharges capacitor C.sub.1. Similarly, closing switches 7 discharges capacitor C.sub.2 while closing switches 8 charges capacitor C.sub.2.

(98) FIG. 34 shows a bidirectional inverting up-down converter consistent with the architecture shown in FIG. 2. In this embodiment, the switching network 12A is a two-phase step-up series-parallel SC converter with a conversion ratio of 2:1, the regulating circuit 16A is a synchronous buck/boost converter and the switching network 12B is a two-phase step-up series-parallel SC converter with a conversion ratio of 2:1. In operation, closing switches 1 charges capacitor C.sub.1 while discharging capacitor C.sub.2. Closing switches 2 has the complementary effect. Similarly, closing switches 7 charges capacitor C.sub.4 while discharging capacitor C.sub.3. Closing switches 2 has the complementary effect. All of the active components are implemented with switches so the converter can process power in both directions.

(99) FIG. 35 shows a step-down converter consistent with the block diagram shown in FIG. 4. In this embodiment, the regulating 300A is a boost converter, the switching network 200 is a two-phase step-up series-parallel SC converter with a conversion ratio of 2:1 and the regulating circuit 300B is a boost converter. In operation, closing switches labeled 1 charges capacitors C.sub.1 and C.sub.2 while simultaneously discharging capacitors C.sub.3 and C.sub.4. Closing switches 2 has the complementary effect.

(100) FIG. 36 shows a bidirectional up-down converter consistent with the block diagram shown in FIG. 4. In this embodiment, the regulating 300A is a synchronous boost converter, the switching network 200 is a two-phase fractional step-down series-parallel SC converter with a conversion ratio of 3:2 and the regulating circuit 300B is a synchronous buck converter. In operation, closing switches 1 charges capacitors C.sub.3 and C.sub.4 while simultaneously discharging capacitors C.sub.1 and C.sub.2. Closing switches 2 has the complementary effect. All of the active components are implemented with switches so the converter can process power in both directions.

(101) It should be understood that the topology of the regulating circuit can be any type of power converter with the ability to regulate the output voltage, including, but without limitation, synchronous buck, three-level synchronous buck, SEPIC, soft switched or resonant converters. Similarly, the switching networks can be realized with a variety of switched-capacitor topologies, depending on desired voltage transformation and permitted switch voltage.

(102) Having described one or more preferred embodiments, it will be apparent to those of ordinary skill in the art that other embodiments incorporating these circuits, techniques and concepts may be used. Accordingly, it is submitted that the scope of the patent should not be limited to the described embodiments, but rather, should be limited only by the spirit and scope of the appended claims.