Removal of high stress zones in electronic assemblies

Abstract

The invention relates to an electronic board (1) comprising: a printed circuit (2) having a connection face (3) defining a plane (X, Y) comprising at least one transfer area (4), an electronic component (5) comprising at least one contact terminal (6), each contact terminal (6) being brazed or sintered on an associated transfer area (4) by means of a brazing joint or of a sintering joint (7), the electronic board being characterised in that an orthogonal projection of the contact terminal (6) of the electronic component (5) on the connection face (3) of the printed circuit does not overlap the associated area (4).

Claims

1. An electronic board comprising: a printed circuit having a connection face defining a plane including two, the two pads being separated by a first distance when the electronic board is at ambient temperature, and an electronic component including two terminal, each terminal being soldered or sintered on an associated pad of the two pads by means of a solder or sintering joint, the two terminals being separated by a second distance when the electronic board is at ambient temperature, wherein the printed circuit having a first thermal expansion coefficient (CTE.sub.PCB) in the plane, the electronic component has a second thermal expansion coefficient (CTE.sub.SMC) in the plane and the solder joint having a third thermal expansion coefficient (CTE.sub.J) in the plane, and wherein the first distance (L.sub.PCB) is substantially equal to a quotient of a difference between the first thermal expansion coefficient (CTE.sub.SMC) and the third thermal expansion coefficient (CTE.sub.J) and of a difference between the second thermal expansion coefficient (CTE.sub.PCB) and the third thermal expansion coefficient (CTE.sub.J), all multiplied by the second distance (L.sub.CMS): $L_{PCB}=L_{CMS}\frac{CT{E}_{SMC}-CT{E}_J}{CT{E}_{PCB}-CT{E}_J},$ so that orthogonal projections of the two terminals of the electronic component on the connection face of the printed circuit do not overlap the associated pads of the two pads.

2. The electronic board according to claim 1, wherein the pad extends under the electronic component or on a side of the electronic component.

3. An electronic board according to claim 1, further comprising: an insulating layer covering at least partially the connection face, and a cavity formed in the insulating layer and exposing at least partially one of the two pads, the electronic component being in contact or at a distance from the insulating layer and the terminal of the electronic component being joined to the at one of the two pads through the cavity.

4. The electronic board according to claim 3, wherein the printed circuit further comprises: a first skin conductive layer joined to the insulating layer, a first and a second internal conductive layers comprising the two pads, and an additional cavity formed in the first skin conductive layer and in the insulating layer.

5. The electronic board according to claim 3, wherein a wall of the cavity is substantially perpendicular to the one of the two pads.

6. An electronic board according to claim 1, further comprising an adhesive point under the electronic component, between the two pads, in order to retain the electronic component in position relative to the two pads during soldering of the electronic component to the printed circuit.

7. The electronic board according to claim 1, further comprising, for each of the two terminal, a sacrificial pad extending between a corresponding pad of the two pads and a portion of the printed circuit which faces the terminal.

8. The electronic board according to claim 7, wherein the sacrificial pads have a dimension, in a direction corresponding to a direction of greater expansion of the electronic component, equal to at least 200 microns.

9. The electronic board according to claim 7, further comprising a connection strip configured to electrically connect the sacrificial pads and the corresponding pad of the two pads.

10. The electronic board according to claim 9, wherein the connection strip is centered between the sacrificial pad and the corresponding pad of the two pads, or extends between two opposite ends of the sacrificial pad and the corresponding pad of the two pads.

11. The electronic board according to claim 9, further comprising an additional connection strip, wherein the connection strip and the additional connection strip extend from opposite ends of the sacrificial pad and the corresponding pad of the two pads.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other features, aims and advantages of the present invention will appear more clearly upon reading the detailed description which follows, and with reference to the appended drawings, given by way of non-limiting examples and in which:

(2) FIG. 1 illustrates schematically an exemplary embodiment of an electronic board conforming to the prior art,

(3) FIG. 2a is a schematic view of a first exemplary embodiment of an electronic board conforming to the invention comprising a surface-mount component, in the case where the first distance is less than the second distance. The electronic board is at ambient temperature.

(4) FIG. 2b illustrates the electronic board when it is subjected to a extreme temperature.

(5) FIG. 3 is a schematic view of a second exemplary embodiment of an electronic board conforming to the invention, comprising a surface-mount component, in the case where the first distance is greater than the second distance.

(6) FIG. 4 is a schematic view of a third exemplary embodiment of an electronic board conforming to the invention, in which the cavities are formed in an insulating layer covering all or a portion of the connection face of the insulating board and the first distance is less than the second distance.

(7) FIG. 5 illustrates a fourth embodiment of an electronic board conforming to the invention, in which an adhesive point is used to retain the electronic component during its soldering to the printed circuit.

(8) FIGS. 6a and 6b illustrate two exemplary embodiments of a fifth embodiment conforming to the invention, in which the electronic component is also joined to sacrificial solder pads.

(9) FIGS. 7a and 7b are schematic top-views illustrating a variant embodiment of the fifth embodiment, in which the sacrificial solder pads are connected to the solder pads by means of one or of two connection strips.

DETAILED DESCRIPTION OF ONE EMBODIMENT

(10) An electronic board 1 comprises a printed circuit 2 including conductive layers separated by insulating layers on which are mounted surface-mount electronic components 5 (hereafter SMCs 5).

(11) Generally, a printed circuit 2 can be of the one-layer type (also called single layer) and comprise only a single conductive layer over an insulating layer, double layer (also called double face) and comprise a conductive layer on either side of an insulating layer or multi-layer and comprise at least four conductive layers (and therefore three insulating layers).

(12) The printed circuit 2 has a connection face 3 defining a plane (X, Y) and intended to receive at least one SMC 5. To this end, the connection face 3 includes at least one pad 4. What is meant here by pad 4 is a pad, of copper for example, on which the SMC 5 is soldered or sintered.

(13) The SMCs 5, for their part, comprise at least one terminal 6, each terminal being joined to an associated pad 4 of the connection face 3 of the printed circuit 2 by means of a solder joint 7.

(14) Hereafter, the invention will be described in the case where the printed circuit 2 of the electronic board 1 comprises two solder pads 4, two solder joints 7 and one SMC 5 comprising two terminals 6. This, however, is not limiting; the printed circuit can comprise a greater number of solder pads 4, or can be obtained by sintering and then include sintering pads 4 and as many associated sintering joints 7, the electronic board 1 being able to comprise a greater number of SMCs 5, and the SMCs 5 a different number of terminal (at least one terminal 6). The invention then applies mutatis mutandis to each assembly formed from (solder or sintering) pads 4 and the associated SMC 5.

(15) The invention also applies mutatis mutandis to sintering or soldering a chip to a substrate in a surface-mount component, because said chips themselves form a surface-mount component on a printed circuit.

(16) In order to improve the lifetime of the electronic board 1 and to reduce the stresses in the solder joints 7, the solder pad(s) 4 are positioned on the connection face 3 of the printed circuit 10 so that an orthogonal projection of the terminals 6 of the electronic component 5 on the connection face 3 of the printed circuit does not overlap the associated solder pad(s) 4. In other words, the solder pads 4 and the terminals 6 do not overlap, so that the solder pads 4 are located under the SMC 5 or on either side of the SMC 5.

(17) This therefore allows eliminating the zone of the solder joint 7 which is positioned between a given terminal 6 of the SMC 5 and the associated solder pad 4. As we have seen above, this very thin zone (on the order of ten microns) corresponded in fact to the location of the solder joint 7 where the shear stresses (and therefore the risks of cracking) are greatest in an SMC mounted to the printed circuit in accordance with the prior art (see FIG. 1). Yet by eliminating this zone, the shear stresses in the solder joint 7 are homogenized and the risks of cracking are limited, which further improves the lifetime of the SMC assembly.

(18) In the case where the printed circuit 10 and the SMC 5 have different thermal expansion coefficients in the plane (X, Y), the distance between the solder pads 4 can also be adjusted depending on the distance between the terminals 6 of the SMC and the value of these thermal expansion coefficients so as to optimize their relative displacement during the exposure of the electronic board 1 to extreme temperature conditions and to relieve the solder joints 7.

(19) In fact, the solder pads 4 of the printed circuit are separated by a first distance L.sub.PCB. This first distance L.sub.PCB is measured at ambient temperature T.sub.1 between the respective centers 4a of the solder pads 4.

(20) The terminals 6, for their part, are separated by a second distance L.sub.CMS. This second distance L.sub.CMS is measured at ambient temperature T.sub.1 between the respective ends 6a of the terminals 6. In the case where the SMC 5 comprises more than two terminals 6, the second distance L.sub.CMS corresponds to the distance between the ends 6a of the most distant terminals 6, typically diagonally. Moreover, for the SMCs 5 whose terminals comprise tabs, the distance L.sub.CMS extends from the free end of the tabs which faces the solder pads 4 and not from their end joined to the SMC.

(21) Finally, the solder joints 7 have a cumulative thickness L.sub.J measured at ambient temperature T.sub.1 between their free edges. In the case where the SMC 5 comprises more than two terminals 6, the thickness L.sub.J corresponds to the cumulative thickness of the solder joints 7 between the ends 6a of the most distant terminals 6, typically diagonally on the SMC 5.

(22) The expansion L.sub.PCB of the printed circuit 2, the expansion L.sub.CMS of the SMC 5 and the expansions L.sub.J as functions of temperature (these expansions L.sub.PCB, L.sub.CMS and L.sub.J being able to be positive and/or negative) can be evaluated thanks to the following relations:
L.sub.CMS=L.sub.CMSTCTE.sub.SMC
L.sub.PCB=L.sub.PCBTCTE.sub.PCB
L.sub.J=L.sub.JTCTE.sub.J
where L.sub.PCB is the first distance

(23) L.sub.CMS is the second distance

(24) L.sub.J is the cumulative thickness of the solder joints 7

(25) T=T.sub.2T.sub.1

(26) T.sub.1 is the ambient temperature at which the first and second distances L.sub.PCB, L.sub.CMS are determined. What is meant here by ambient temperature T.sub.1 is a temperature on the order of twenty degrees.

(27) T.sub.2 is a different temperature from T.sub.1, for example a utilization, storage or operating temperature of the electronic board 1,

(28) L.sub.CMS is the expansion of the SMC 5 between the ambient temperature T.sub.1 and the temperature T.sub.2,

(29) L.sub.PCB is the expansion of the printed circuit 2 between the ambient temperature T.sub.1 and the temperature T.sub.2,

(30) L.sub.J is the expansion of the solder joints 7 between the ambient temperature T.sub.1 and the temperature T.sub.2.

(31) The difference L.sub.assembly between the expansion of the SMC 5 and the expansion of the printed circuit 2, between the ambient temperature T.sub.1 and the temperature T.sub.2, can therefore be obtained thanks to the following formula (1):
L.sub.assembly=(L.sub.PCBCTE.sub.PCBL.sub.CMSCTE.sub.SMCL.sub.JCTE.sub.J)T

(32) Moreover, the distance L.sub.PCB is equal to the sum of the distance L.sub.CMS and the cumulative thickness L.sub.J of the solder joints 7. The following formula (2) is therefore obtained:
L.sub.assembly=(L.sub.PCB(CTE.sub.PCBCTE.sub.J)L.sub.CMS(CTE.sub.SMC+CTE.sub.J)T

(33) It is thus possible to simply and effectively increase the lifetime and the toughness of an electronic board 1 by adjusting the first distance L.sub.PCB depending on the second distance L.sub.CMS and the thermal expansion coefficients CTE.sub.PCB, CTE.sub.J and CTE.sub.SMC, thanks to the formula (1) reproduced above. Regardless of the operating temperature, the difference in expansion L.sub.assembly is therefore optimized so as to be as small as possible, thus strongly limiting the stresses within the solder joints 7.

(34) The second distance L.sub.CMS being fixed and intrinsic to the SMC 5, the first distance L.sub.PCB is therefore adjusted by engraving the solder pads 4 on the connection face 3 so that the first distance L.sub.PCB allows compensating the difference in the thermal expansion coefficient between the printed circuit 2, the solder joints 7 and the SMC 5.

(35) Ideally, a zero difference in expansion L.sub.assembly is sought. In order to reduce the stresses formed within the solder joints 7 during variations in temperature, the first distance L.sub.PCB (between the solder pads 4) is therefore selected so as to be equal to the quotient of, on the one hand, the difference between the thermal expansion coefficient of the SMC (CTE.sub.SMC) and the thermal expansion coefficient of the solder joints and, on the other hand, the difference between the thermal expansion coefficient of the printed circuit board (CTE.sub.PCB) and the thermal expansion coefficient of the solder joints, all multiplied by the second distance L.sub.CMS:

(36) $\begin{array}{cc}{L}_{PCB}=L_{CMS}\frac{CT{E}_{SMC}-CT{E}_J}{CT{E}_{PCB}-CT{E}_J}& \left(3\right)\end{array}$

(37) It will be noted that the invention finds application particularly when the difference between the first thermal expansion coefficient (CTE.sub.PCB) and the second thermal expansion coefficient (CTE.sub.SMC) is greater than or equal to 2. Outside this range, the differential expansion of the SMC 5 and of the printed circuit is in fact too low for the relative displacement of the SMC 5 and of the printed circuit to be noticeable.

(38) Thus, when the thermal expansion coefficient CTE.sub.SMC of the SMC 5 is less than the thermal expansion coefficient CTE.sub.PCB of the printed circuit 2, which itself is less than the thermal expansion coefficient CTE.sub.joint of the joint 7 (case of the great majority of SMCs 5), it is discovered that the first distance L.sub.PCB is strictly greater than the second distance L.sub.CMS (FIG. 3) so that the solder pads 4 are located on either side outside the terminals 6 of the SMC 5. In this manner, when the electronic board 1 undergoes a temperature T.sub.2 greater than the ambient temperature T.sub.1, the SMC 5 and the printed circuit 2 dilate. However, the thermal expansion coefficient CTE.sub.PCB of the material constituting the printed circuit 2 being greater than that of the SMC 5, the printed circuit dilates more than the SMC 5. The distance L.sub.PCB being strictly greater than the second distance L.sub.CMS, the result is that at this temperature T.sub.2, the solder pads 4 and the terminals 6 of the SMC 5 are essentially at the same relative distance as at ambient temperature T.sub.1, which relieve the stresses in the solder joints 7 relative to the case where the solder pads 4 and the terminals 6 of the SMC 5 are facing one another at ambient temperature T.sub.1 (FIG. 1) and the relative distance between them varies more substantially.

(39) Thus raising the temperature does not modify the relative displacement between the terminals 6 of the SMC 5 and the solder pads 4 of the printed circuit 2 and reduces its negative effects by compensating the difference in expansion of the SMC 5, of the joints 7 and of the printed circuit 2.

(40) In practice, the lifetime and the toughness of the electronic board 1 are already considerably improved when the first distance L.sub.PCB is equal, within 50%, to the multiplication of the quotient of the differences in thermal expansion coefficients

(41) $\frac{CT{E}_{SMC}-CT{E}_J}{CT{E}_{PCB}-CT{E}_J}$
by the second distance L.sub.CMS (formula (3) described above), as long as the orthogonal projection of the terminals 6 does not overlap the associated solder pad 4. This tolerance of 50% is justified by the following observations:

(42) The terminal of the SMC 5 (respectively, the printed circuit 2) has a variable expansion L.sub.CMS (respectively, L.sub.PCB) between its two ends (respectively between the edges of the solder pad 4). It is therefore not possible to obtain

(43) $L_{PCB}=L_{CMS}\frac{CT{E}_{SMC}-CT{E}_J}{CT{E}_{PCB}-CT{E}_J}$
everywhere in the solder joint.

(44) It is not always possible to bring the solder pads 4 sufficiently close together to satisfy the formula (3). For example, if the thermal expansion coefficient of the SMC 5 is twice higher than that of the printed circuit 2, it is not possible to bring the pads sufficiently close together to satisfy the formula (3) and produce the solder joint during manufacture of the electronic board 1.

(45) The thermal expansion coefficients of the printed circuit, of the solder joints 7 and of the SMC are generally not known with accuracy and have a dispersion.

(46) The thermal expansion coefficients of the printed circuit, of the solder joints 7 and of the SMC vary depending on the temperature.

(47) For example, for single-face printed circuits 2, the thermal expansion coefficient CTE.sub.PCB of the printed circuit 2 is generally comprised between 14 ppm/ C. and 17 ppm/ C. In the example below, the printed circuit 2 has a thermal expansion coefficient CTE.sub.PCB equal to 14 ppm/ C. The solder joint 7 is produced with a leadless alloy SAC305, the thermal expansion coefficient CTE.sub.J of which is 23.5 ppm/ C. The SMC 5 is a 2512 resistor with a length of 6.3 mm so that the second distance L.sub.CMS, which corresponds to the distance between the ends 6a of the terminals 6 of the resistor, is equal to 6.3 mm at ambient temperature. Moreover, the thermal expansion coefficient CTE.sub.SMC of the resistor is equal to 7. It is therefore attempted to separate the solder pads 4 so that the second distance L.sub.CMS, which corresponds to the distance between the centers of the solder pads 4, approaches the theoretical value that is obtained thanks to formula (3), or approximately 10.9 mm:

(48) $L_{PCB}=6.3\frac{7-23.5}{14-23.5}=10.9\mathrm{mm}$

(49) In one embodiment, the electronic board 1 can also comprise an insulating layer 8 covering at least partially the connection face 3 and two cavities 9, formed in the insulating layer and exposing at least partially the solder pads 4. In this case, the SMC 5 is in contact with or at a distance from the insulating layer 8 and its terminals 6 are joined to the corresponding soldering pads 4 through the first and second cavities 9.

(50) An embodiment of this type is described more particularly in French patent application no. 17 56700, filed on 13 Jul. 2017 in the name of the Applicant. The production of cavities 9 of this type allows simply increasing at low cost the standoff of the SMC 5 without, however, impacting the assembly efficiency of the SMC 5.

(51) In one variant of this embodiment (FIG. 4), the electronic board 1 is multi-layer and comprises at least four conductive layers separated, two by two, by insulating layers, including:

(52) a first skin conductive layer joined to the insulating layer,

(53) a first and a second internal conductive layers comprising two solder pads 4.

(54) The two cavities 9 are then formed in the first skin conductive layer and in the insulating layer.

(55) French patent application no. 17 56679 in particular can be referred to, filed on 13 Jul. 2017 in the Applicant's name. An electronic board 1 of this type can thus comprise various SMCs 5, whether fine-pitch components, large size components, with seagull tabs, etc., simply and at moderate cost without, however, impacting the assembly efficiency of the SMCs 5.

(56) Regardless of the variant embodiment, the wall 10 of the cavities 9 can be inclined relative to the connection face 3. As a variant, it can diverge. According to yet another variant the wall 10 of the cavities 9 is perpendicular to the connection face 3. In this last variant embodiment, the exposed surface of the connection face 3 is therefore larger than the surface of the solder pads 4. If applicable, the cavity 9 can be larger in the principal direction of expansion of the SMC 5 than the solder pad 4. To this end, the insulating layer can be pre-drilled before its assembly with the printed circuit 2. As a variant, the solder pad 4 can be produced so as to be larger than necessary in this direction, then the cavity 9 can be produced by surface photolithography as described in document FR 17 56700 and the superfluous zone of the solder pad 4 can be withdrawn.

(57) During automatic joining, particularly by reflow, of an SMC 5 on a printed circuit 2, it may happen that the SMC 5 is not centered and moves more toward one of the terminals 6 due to wetting forces which are generally not balanced (the SMC 5 generally not being placed exactly in the middle of the two pads of solder paste).

(58) In the event of displacement of the SMC 5, the desired effect is then not obtained: typically, this displacement can re-create a zone of strong stresses in the solder joint 7 vertically between a given terminal 6 of the SMC 5 and the associated solder pad 4, which is conducive to the initiation of cracks and therefore reduces the lifetime of the SMC. Worse still, the SMC 5 can separate from one of the terminals 6 during soldering.

(59) Two embodiments are proposed to facilitate the automatic manufacture of electronic boards 2. This problem does not occur, in fact, during manual joining of the SMC 5.

(60) In a first embodiment (FIG. 5), an adhesive point 11 is placed between the SMC 5 and the solder pads 4 of the printed circuit 2 prior to the soldering step. In fact, one adhesive point 11 of this type is sufficient to retain the SMC 5 in position and oppose the wetting forces.

(61) Typically, the adhesive 11 is selected so as to have a polymerization temperature lower than the heat treatment temperature used during soldering of the SMC 5. For example, when the SMC 5 is soldered by reflow of a solder paste, the adhesive is selected so as to have a polymerization temperature on the order of 100 C. to 150 C. (recall that soldering by reflow comprises, in a manner known per se, the successive steps of temperature rise, preheating, reflow and cooling, the temperature of the reflow step being generally higher than 180 C.). In this manner, the adhesive polymerizes during the preheating phase and is capable of retaining the SMC 5 in position during the reflow step.

(62) The adhesive can for example be an epoxy adhesive.

(63) In a second embodiment (FIGS. 6a, 6b, 7a and 7b), a sacrificial solder pad 12 is added, for each terminal 6 of the SMC 5, between the solder pad 4 and the portion of the printed circuit 2 which extends facing the associated terminal 6. The sacrificial pad 12 can be produced in the same material as the associated solder pad 4. Thus, the sacrificial pads 12 can be placed on the outside of the solder pads 4 when the solder pads 4 are located under the SMC 5, or between the solder pads 4 when the solder pads 4 are located on the outside of the SMC 5.

(64) Preferably, the sacrificial solder pads 12 are very thin (for example on the order of two hundred microns) so as to retain the advantage linked to the offset of the solder pads 4 relative to the center of the terminals 6. When the electronic board 2 undergoes an extreme thermal environment, the shear stresses will then be concentrated in the portion of the solder joint 7 which is joined to the sacrificial pads 12, and will generally crack them. However, these sacrificial pads 12 being distinct from the solder pads 4, the cracking will not affect the portion of the solder joint 7 which is joined to the solder pads 4. We will therefore find an electronic board 1 in which the orthogonal projection of the terminals 6 does not overlap the solder pads 4. In parallel, the sacrificial pads 12 are capable of retaining the SMC 5 in position and avoiding having it offset itself during its soldering to the printed circuit board 2.

(65) The Applicant observed that, in very rare cases, the SMC 5 could move anyway and then be joined at only one of its terminals 6 to one of the sacrificial pads 12. In order to further reduce reject rates, for each terminal 6, the sacrificial pad 12 and the associated solder pad 4 can be produced by a thin strip 13 produced from the same material as the solder pad 4. Untimely displacements of the SMC 5 and of the solder joint 5 during soldering of the SMC 5 to the printed circuit are then rarer. In the event of an untimely displacement of the SMC 5 and of the solder joint 5 during soldering of the SMC 5 to the printed circuit so that the solder joint 7 is no longer in contact other than with the sacrificial pad 12, the electrical connection with the solder pad 4 remains assured thanks to the thin strip 13. The thin strip 13 can be centered overall between the sacrificial pad 12 and the solder pad 4 (thus forming an HFIG. 6a), or extend along one of their edges (thus forming a U). As a variant, two strips 13 can extend between the sacrificial pad 12 and the solder pad 4, for example at each of the edges of the solder pad 4 (thus forming an OFIG. 6b).

(66) It will be noted that the shape and the dimensions of the sacrificial solder pad 12 are not limiting. In particular, the sacrificial solder pad 12 can be longer or shorter than the solder pad 7, wider or narrower, without this being limiting.