Maintaining output voltage of DC-DC converter in discontinuous conduction mode

Abstract

A DC-DC converter and a corresponding method for maintaining an output voltage of the DC-DC converter, wherein the DC-DC converter is configured to operate in a discontinuous conduction mode, within a predetermined voltage range. The method comprises adjusting a duty cycle of the DC-DC converter based on the output voltage to maintain the output voltage within a predetermined voltage range; wherein the duty cycle of the DC-DC converter is adjusted by switching between a first switching frequency to a second switching frequency, and the first switching frequency and the second switching frequency are selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band.

Claims

1. A method for maintaining an output voltage of a DC-DC converter, configured to operate in a discontinuous conduction mode, within a predetermined voltage range, the method comprising: adjusting a duty cycle of the DC-DC converter based on an output voltage to maintain the output voltage within a predetermined voltage range; wherein: the duty cycle of the DC-DC converter is adjusted by switching between a first switching frequency to a second switching frequency; the first switching frequency and the second switching frequency are selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band; and the DC-DC converter is configured for use in a device and the at least one predefined disallowed frequency band comprises switching frequencies that would give rise to interference or noise that would adversely affect operation of other components in the device.

2. The method of claim 1 wherein the second switching frequency is equal to 1/N of the first switching frequency, wherein N is a positive integer number.

3. The method of claim 1 further comprising: adjusting the duty cycle of the DC-DC converter by decreasing an on time of the DC-DC converter.

4. The method of claim 3 further comprising: responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first decreasing the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the first switching frequency is reached, and responsive to the output voltage remaining above the predetermined voltage range when using the first switching frequency, switching to the second switching frequency.

5. The method of claim 4 further comprising: responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, switching to a third switching frequency wherein the third frequency is 1/N+1 times the second frequency, wherein N is a positive integer number.

6. The method of claim 4 further comprising: responsive to the output voltage being below the predetermined voltage range when using the second switching frequency, first increasing the duty cycle by increasing an on time of the DC-DC converter until a maximum duty cycle for the second switching frequency is reached, and responsive to the output voltage remaining below the predetermined voltage range when using the second switching frequency, switching to the first switching frequency.

7. The method of claim 6 further comprising: responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, switching to a third switching frequency wherein the third frequency is greater than the first frequency.

8. The method of claim 3 further comprising: responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first switching to the second switching frequency; and responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, decreasing the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the second switching frequency is reached.

9. The method of claim 8 further comprising: responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, switching to a third switching frequency wherein the third frequency is 1/N+1 times the second frequency, wherein N is a positive integer number.

10. The method of claim 3 further comprising: responsive to the output voltage being below the predetermined voltage range when using the second switching frequency, switching to the first switching frequency; and responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, increasing the duty cycle by increasing an on time of the DC-DC converter until a maximum duty cycle for the first switching frequency is reached.

11. The method of claim 10 further comprising: responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, switching to a third switching frequency wherein the third frequency is greater than the first frequency.

12. The method of claim 1 further comprising: alternating between the first switching frequency and the second switching frequency, wherein the first switching frequency is higher than the predefined disallowed frequency band and the second switching frequency is lower than the predefined disallowed frequency band.

13. The method of claim 1 wherein the at least one predefined disallowed frequency band comprises two or more separate predefined disallowed frequency bands.

14. A DC-DC converter configured to in a discontinuous conduction mode and to maintain an output voltage within a predetermined voltage range, the DC-DC converter comprising a controller, wherein the controller comprises: an input configured to receive an indication of the output voltage; and an adjustment block configured to adjust a duty cycle of the DC-DC converter based on the output voltage to maintain the output voltage within a predetermined voltage range; wherein: the duty cycle of the DC-DC converter is adjusted by switching between a first switching frequency to a second switching frequency; the first switching frequency and the second switching frequency are selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band; and the DC-DC converter is configured for use in a device and the at least one predefined disallowed frequency band comprises switching frequencies that would give rise to interference or noise that would adversely affect operation of other components in the device.

15. The DC-DC converter of claim 14 wherein the second switching frequency is equal to 1/N of the first switching frequency, wherein N is a positive integer number.

16. The DC-DC converter of claim 14 wherein the adjustment block is further configured to adjust the duty cycle of the DC-DC converter by decreasing an on time of the DC-DC converter.

17. The DC-DC converter of claim 16 wherein the adjustment block is further configured to: responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first decrease the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the first switching frequency is reached, and responsive to the output voltage remaining above the predetermined voltage range when using the first switching frequency, switch to the second switching frequency.

18. The DC-DC converter of claim 17 wherein the adjustment block is further configured to: responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, switch to a third switching frequency wherein the third frequency is 1/N+1 times the second frequency, wherein N is a positive integer number.

19. The DC-DC converter of claim 16 wherein the adjustment block is further configured to: responsive to the output voltage being below the predetermined voltage range when using the second switching frequency, first increase the duty cycle by increasing an on time of the DC-DC converter until a maximum duty cycle for the second switching frequency is reached, and responsive to the output voltage remaining below the predetermined voltage range when using the second switching frequency, switch to the first switching frequency.

20. The DC-DC converter of claim 19 wherein the adjustment block is further configured to: responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, switch to a third switching frequency wherein the third frequency is greater than the first frequency.

21. The DC-DC converter of claim 16 wherein the adjustment block is further configured to: responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first switch to the second switching frequency; and responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, decrease the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the second switching frequency is reached.

22. The DC-DC converter of claim 21 wherein the adjustment block is further configured to: responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, switch to a third switching frequency wherein the third frequency is 1/N+1 times the second frequency, wherein N is a positive integer number.

23. The DC-DC converter of claim 16 wherein the adjustment block is further configured to: responsive to the output voltage being below the predetermined voltage range when using the second switching frequency, switch to the first switching frequency; and responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, increase the duty cycle by increasing an on time of the DC-DC converter until a maximum duty cycle for the first switching frequency is reached.

24. The DC-DC converter of claim 23 wherein the adjustment block is further configured to: responsive to the output voltage remaining below the predetermined voltage range when using the first switching frequency, switch to a third switching frequency wherein the third frequency is greater than the first frequency.

25. The DC-DC converter of claim 14 wherein the adjustment block is configured to alternate between the first switching frequency and the second switching frequency, wherein the first switching frequency is higher than the predefined disallowed frequency band and the second switching frequency is lower than the predefined disallowed frequency band.

26. The DC-DC converter of claim 14 wherein the at least one predefined disallowed frequency band comprises two or more separate predefined disallowed frequency bands.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) For a better understanding of the present invention, and to show how it may be put into effect, reference will now be made, by way of example only, to the accompanying drawings, in which:

(2) FIG. 1 is an example of a conventional audio amplifier comprising a boost converter in accordance with the prior art;

(3) FIG. 2 is an example block diagram of a DC-DC converter in accordance with the present disclosure;

(4) FIG. 3a is an example timing diagram illustrating the operation of a boost converter in a continuous conduction mode, CCM, in accordance with embodiments of the present disclosure;

(5) FIG. 3b is an example timing diagram illustrating the operation of a boost converter in a continuous conduction mode, CCM, in accordance with embodiments of the present disclosure;

(6) FIG. 4 is an example timing diagram illustrating the operation of a boost converter in discontinuous conduction mode, DCM, in accordance with embodiments of the present disclosure;

(7) FIG. 5 is an example timing diagram illustrating the operation of the DC-DC converter in DCM, in accordance with embodiments of the present disclosure;

(8) FIG. 6 is an example flow chart diagram illustrating a method for maintaining an output voltage of a DC-DC converter in a predetermined voltage range, while operating in a discontinuous conduction mode, in accordance with embodiments of the present disclosure;

(9) FIG. 7 is an example timing diagram illustrating the operation of a DC-DC converter when switching from a first switching frequency to a second switching frequency, in accordance with embodiments of the present disclosure;

(10) FIG. 8 is an example flow chart illustrating a method of reducing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range, in accordance with embodiments of the present disclosure;

(11) FIG. 9 is an example flow chart illustrating a method of increasing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range, in accordance with embodiments of the present disclosure;

(12) FIG. 10 is an example flow chart illustrating a method of reducing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range, in accordance with embodiments of the present disclosure;

(13) FIG. 11 is an example flow chart illustrating a method of increasing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range, in accordance with embodiments of the present disclosure;

(14) FIG. 12 is an example timing diagram illustrating the operation of a DC-DC converter in accordance with embodiments of the present disclosure;

(15) FIG. 13 is an example timing diagram illustrating the NFET 206 conducting and non-conducting states as the duty cycle is decreased in accordance with embodiments of the present disclosure;

(16) FIGS. 14A and 14B are example timing diagrams illustrating the energy as a function of frequency for different frequencies using the same duty cycle in accordance with embodiments of the present disclosure;

(17) FIG. 15 is an example graph illustrating the switching frequencies available to the boost converter when unconstrained by any predefined disallowed frequency band containing disallowed frequencies in accordance with embodiments of the present disclosure;

(18) FIG. 16 is a graph illustrating an example where two predefined disallowed frequency bands have been set containing disallowed frequencies in accordance with the present disclosure;

(19) FIG. 17 is a graph illustrating an example comprising a single predefined disallowed frequency band in accordance with the present disclosure;

(20) FIG. 18 is graph illustrating an example comprising three predefined disallowed frequency bands in accordance with the present disclosure;

(21) FIG. 19 is graph illustrating an example comprising four predefined disallowed frequency bands in accordance with the present disclosure;

(22) FIG. 20 is an example block diagram of a DC-DC converter 1800 in accordance with the present disclosure.

DESCRIPTION

(23) The description below sets forth example embodiments according to this disclosure. Further example embodiments and implementations will be apparent to those having ordinary skill in the art. Further, those having ordinary skill in the art will recognize that various equivalent techniques may be applied in lieu of, or in conjunction with, the embodiments discussed below, and all such equivalents should be deemed as being encompassed by the present disclosure.

(24) FIG. 2 illustrates an example DC-DC converter 200 in accordance with some embodiments of the present disclosure. The DC-DC converter 200 comprises a battery supply 202 which provides a supply voltage V.sub.P to the DC-DC converter 200. The DC-DC converter 200 comprises an inductor 204 connected to the battery supply 202. The DC-DC converter 200 further comprises two switches 206 and 208 and a capacitor 210. The switches 206 and 208 are in this example implemented as an n-channel field effect transistor (NFET) 206 and a p-channel field effect transistor (PFET) 208.

(25) In this example implementation, the inductor 204 is coupled to the drain of the PFET 208 and the drain of the NFET 206. The drain of the PFET 208 and the drain of the NFET 206 are also coupled together.

(26) The capacitor 210 is coupled between the source of the PFET 208 and ground. The source of the NFET 206 is coupled to ground. Both the gate of the PFET 208 and the gate of the NFET 206 are coupled to a level shifting and driving block 214 which controls whether the PFET and NFET are in conducting or non-conducting states. An amplifier or other signal processing circuitry may be connected to receive the boost voltage from the source of the PFET 208.

(27) For example, during a first time period, the NFET 206 may be switched on to a conducting state which couples the inductor 204 to ground, while the PFET 208 is switched off to a non-conducting state. This switching configuration causes the supply voltage V.sub.P to fall across the inductor 204 and therefore cause current to flow through the inductor 204 thereby storing energy in the inductor.

(28) During a second time period, the NFET 206 may be switched off into a non-conducting state while the PFET 208 may be switched on to a conducting state. This switching configuration causes the inductor to couple to ground through the capacitor 210. Thus, the energy stored in the inductor 204 during the first time period is transferred to the capacitor 210 during the second time period. As energy is stored in the capacitor 210, the voltage across the capacitor increases and allows the boost voltage V.sub.bst to increase beyond the supply voltage V.sub.P.

(29) A controller 222 may control the duration of the first and second time periods in order to regulate the transfer of power from the inductor to the capacitor and thus regulate the level of the boost voltage V.sub.bst.

(30) It will be appreciated that such a boost converter may operate in two distinct modes: continuous conduction mode, CCM and discontinuous conduction mode, DCM.

(31) FIG. 3a illustrates the operation of a boost converter in a continuous conduction mode, CCM. In this state, the boost converter operates with two switching states S.sub.1 and S.sub.2 per switching cycle. As previously described during state S.sub.1, NFET 206 is in a conducting state and PFET 208 is in a non-conducting state. During this period, the current is drawn across the inductor storing energy in the conductor. In switching state S.sub.2, as described previously, the PFET 208 is in a conducting state and the NFET 206 is in a non-conducting state. During this period, the energy stored in the inductor is transferred to the capacitor and the current through the inductor drops.

(32) The controller may control the length of the duty cycle in order to maintain the output voltage within a predetermined range. In other words, if V.sub.bst goes too high, the time spent in state S.sub.1 may be reduced and if V.sub.bst drops below a minimum voltage V.sub.min, then the time spent in state S.sub.1 may be increased.

(33) In some examples, the switching state is switched from state S.sub.1 to state S.sub.2 when the current across the inductor reaches a maximum value. The switching state may be switched from state S.sub.2 to state S.sub.1 at the beginning of each clock cycle as illustrated by the begin switching frequency cycle pulses in FIG. 3a.

(34) However, when the load current decreases, in other words a higher resistance is coupled to receive the boost voltage V.sub.bst, the inductor current also decreases. In this case, if the boost converter is left to operate in continuous conduction mode, then the inductor current may become negative in each switching period, as illustrated in FIG. 3b. This negative current may waste power by passing unnecessary current across the inductor.

(35) The boost converter may therefore be operated in discontinuous conduction mode (DCM). In DCM, there may be, for example, three different switching states. States S.sub.1 and S.sub.2 are the same as illustrated for CCM in FIGS. 3a and 3b, but in third state S.sub.3, both the NFET 206 and the PFET 208 are off.

(36) As the PFET 208 is switched off, this switch deactivation stops any current flowing back through the inductor in a negative direction, thereby pinning or maintaining the inductor current at 0 A as illustrated in FIG. 4. This mode thereby avoids the power wasted by the negative current through the inductor illustrated in FIG. 3b.

(37) FIG. 5 illustrates an example of the operation of the DC-DC converter in DCM.

(38) In this example, the DC-DC converter is configured to maintain the boost voltage V.sub.BST within the predetermined voltage range between a maximum voltage V.sub.Max and a minimum voltage V.sub.MIN. Therefore, when the voltage goes above the maximum voltage V.sub.MAX, the DC-DC converter may decrease the duty cycle of the DC-DC converter. In other words, the controller 222 illustrated in FIG. 2 may decrease the amount of time spent in switching state S.sub.1. This time decrease will reduce the energy stored in the inductor during the switching period, and therefore reduce the energy transferred to the capacitor, thereby reducing the boost voltage V.sub.BST.

(39) Equivalently, when the voltage drops below the minimum voltage V.sub.MIN, the DC-DC converter may increase the duty cycle of the DC-DC converter. In other words, the controller 222 illustrated in FIG. 2 may increase the amount of time spent in switching state S.sub.1. This time increase will increase the energy stored in the inductor during the switching period, and therefore increase the energy transferred to the capacitor, thereby increasing the boost voltage V.sub.BST.

(40) According to some embodiments, it may also be desirable, for low enough loads, to reduce the switching frequency in order to further reduce the power consumption of the boost converter. By reducing the switching frequency, the time spent in the state S.sub.3 can be increased, thereby saving more power by not wasting current across the inductor.

(41) Furthermore, a lower switching frequency reduces the power consumption across the capacitor.

(42) FIG. 6 illustrates a method for maintaining an output voltage of a DC-DC converter in a predetermined voltage range, while operating in a discontinuous conduction mode, for example as illustrated in FIG. 4.

(43) In step 601, the DC-DC convertor determines the value of the output voltage of the DC-DC convertor.

(44) In step 602, the DC-DC converter adjusts a duty cycle of the DC-DC converter based on the output voltage to maintain the output voltage within a predetermined voltage range. For example, the duty cycle of the DC-DC converter may be adjusted by switching between a first switching frequency and a second switching frequency. The first switching frequency and the second switching frequency may be selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band.

(45) For example, in some embodiments at least one predefined disallowed frequency band may be in place which comprises frequencies which should not be used by the DC-DC converter. For example, one or more frequencies in the at least one predefined disallowed frequency band may be used for integrated circuits with some other application within a device comprising the DC-DC converter. In some embodiments, the electromagnetic interference (EMI) with switching frequencies within the predefined disallowed frequency bands is unpredictable, and therefore it may be desirable to avoid using the frequencies within the predefined disallowed frequency bands. Therefore, the embodiments disclosed herein allow the boost converter's switching frequency and duty cycle to be manipulated in order to avoid electromagnetic interference or power supply noise injection which can be problematic for other sub-systems or ICs within the portable device.

(46) When changing switching frequencies to decrease or increase the duty cycle of the DC-DC converter, the frequencies may also be selected such that the time period of the switching frequencies are multiples of the time period of the clock frequency used by the DC-DC converter. In this way, the switching periods of the lower frequencies will comprise an integer number of clock periods.

(47) For example, consider a DC-DC converter utilizing a clock frequency of X kHz. This high frequency may be used as the highest switching frequency available to the DC-DC converter. The second switching frequency may then be X/2 kHz. A third switching frequency of X/3 kHz may also be available, and so on.

(48) The time period of the first switching frequency, which is equal to the clock frequency, will be 1/X seconds. The time period of the second frequency will be 2/X seconds, and the time period of the third switching frequency will be 3/X seconds, and so on.

(49) These switching frequencies may therefore comprise an integer number of clock cycles.

(50) Therefore, when switching from the first switching frequency to the second switching frequency, the DC-DC converter effectively skips a switching period as illustrated in FIG. 7.

(51) FIG. 7 illustrates the operation of a DC-DC converter when switching from a first switching frequency equal to the clock frequency, to a second switching frequency.

(52) In the first and second illustrated clock periods, the DC-DC converter is operating with the first switching frequency. However, mid-way through the second clock cycle, the DC-DC converter decides to lower the switching frequency, potentially due to the boost voltage V.sub.BST being above the maximum voltage threshold V.sub.MAX as illustrated in FIG. 5.

(53) The DC-DC converter may then switch to the second switching frequency for the 3.sup.rd to the 6.sup.th clock cycles. It can be seen that the second switching frequency effectively skips the 4.sup.th clock cycle and the 6.sup.th clock cycle by staying the third switching state S.sub.3 and pinning the inductor current to zero.

(54) FIG. 8 illustrates a method of reducing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range according to some embodiments.

(55) In particular, the embodiment shown in FIG. 8 performs the steps of responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first decreasing the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the first switching frequency is reached, and responsive to the output voltage remaining above the predetermined voltage range when using the first switching frequency, switching to the second switching frequency.

(56) In step 801 the DC-DC converter determines whether the boost voltage V.sub.BST is above the maximum voltage threshold V.sub.MAX. If the boost voltage V.sub.BST is below the threshold V.sub.MAX the method returns to the start.

(57) If in step 801 the DC-DC converter determines that the boost voltage V.sub.BST is above the maximum threshold V.sub.MAX, the method passes to step 802 in which the DC-DC converter determines whether an on time T.sub.S1 that the DC-DC converter in the state S.sub.1, is greater than a minimum value, T.sub.S1MIN. An on time of the DC-DC converter may be considered a period of time during which the current across the inductor of the DC-DC converter is being increased. In the example illustrated in FIG. 4, this on time may be understood as the period that the DC-DC convertor remains in the state S.sub.1, i.e. the time for which the NFET is in a conducting state.

(58) The minimum on time T.sub.S1MIN may be a minimum duty cycle for the frequency at which the DC-DC converter is operating.

(59) If in step 802 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is greater than T.sub.S1MIN, then the method passes to step 803 in which the DC-DC converter reduces the on time of the DC-DC converter. The method will then return to the start. In some embodiments, the on time of the DC-DC converter may be reduced by a predetermined increment.

(60) If in step 802 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is not greater than the minimum on time T.sub.S1MIN, the method then passes to step 804 in which the DC-DC converter determines whether the switching frequency F.sub.S is greater than a minimum switching frequency F.sub.SMIN.

(61) If in step 804 the DC-DC converter determines that the switching frequency F.sub.S is greater than the minimum switching frequency F.sub.SMIN, the method passes to step 805 in which the DC-DC converter reduces the switching frequency. In some embodiments, the switching frequency may be decreased by increasing the time period of the switching frequency by one clock period. The method may then pass back to the start. In other words, by decreasing the switching frequency the DC-DC convertor switches from the first switching frequency to the second switching frequency.

(62) If in step 804 the DC-DC converter determines that the switching frequency F.sub.s is not greater than the minimum switching frequency, the method may end in step 806.

(63) It will be appreciated that the steps 801 to 805 may be performed iteratively until either the voltage has dropped below the maximum threshold V.sub.MAX or both the minimum on time T.sub.S1MIN and the minimum switching frequency F.sub.SMIN have been reached.

(64) In some embodiments the switching frequency may be decreased from a starting frequency F.sub.START by increasing N by one in the following equation:
F.sub.N=(F.sub.START)/(N+1)

(65) FIG. 9 illustrates a method of increasing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range according to some embodiments.

(66) The embodiment illustrated in FIG. 9 performs the steps of, responsive to the output voltage being below the predetermined voltage range when using the second switching frequency, first increasing the duty cycle by increasing an on time of the DC-DC converter until a maximum duty cycle for the second switching frequency is reached, and responsive to the output voltage remaining below the predetermined voltage range when using the second switching frequency, switching to the first switching frequency.

(67) In step 901, the DC-DC converter determines whether the boost voltage V.sub.BST is below the minimum voltage threshold V.sub.MIN. If the boost voltage V.sub.BST is above the minimum threshold V.sub.MIN the method returns to the start.

(68) If in step 901, the DC-DC converter determines that the boost voltage V.sub.BST is below the minimum threshold V.sub.MIN, the method passes to step 902 in which the DC-DC converter determines whether an on time of the DC-DC converter, T.sub.S1, is less than a maximum value, T.sub.S1MAX. An on time of the DC-DC converter may be defined as a period of time during which the current across the inductor of the DC-DC converter is being increased. In the example illustrated in FIG. 4, this on time may be understood as the period during which the DC-DC converter is in state S.sub.1, i.e. the time for which the NFET is in a conducting state.

(69) The maximum on time T.sub.S1MAX may be a maximum duty cycle for the frequency at which the DC-DC converter is operating.

(70) If in step 902 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is less than T.sub.S1MAX, then the method passes to step 903 in which the DC-DC converter increases the on time T.sub.S1 of the DC-DC converter. The method will then return to the start. In some embodiments, the on time T.sub.S1 of the DC-DC converter may be increased by a predetermined increment.

(71) If in step 902 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is not less than the maximum on time T.sub.S1MAX, the method then passes to step 904 in which the DC-DC converter determines whether the switching frequency F.sub.S is less than a maximum switching frequency F.sub.SMAX.

(72) If in step 904 the DC-DC converter determines that the switching frequency F.sub.S is less than the maximum switching frequency F.sub.SMAX, the method passes to step 805 in which the DC-DC converter increases the switching frequency. In some embodiments, the switching frequency may be increased by decreasing the time period of the switching frequency by one clock period. The method may then pass back to the start. In other words, by increasing the switching frequency, the DC-DC convertor switches from the second switching frequency to the first switching frequency.

(73) If in step 904 the DC-DC converter determines that the switching frequency F.sub.s is not less than the maximum switching frequency F.sub.SMAX, the method may end in step 806.

(74) It will be appreciated that the steps 901 to 905 may be performed iteratively until either the voltage has risen above the minimum threshold V.sub.MIN or both the maximum on time T.sub.S1MAX and the maximum switching frequency F.sub.SMAX have been reached.

(75) In some embodiments the switching frequency may be increased from a starting frequency F.sub.START by decreasing N by one in the following equation:
F.sub.N=(F.sub.START)/(N+1)

(76) FIG. 10 illustrates a method of reducing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range according to some embodiments.

(77) In particular, the embodiment shown in FIG. 10 performs the steps of responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first switching to the second switching frequency; and responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, decreasing the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the second switching frequency is reached.

(78) In step 1001 the DC-DC converter determines whether the boost voltage V.sub.BST is above the maximum voltage threshold V.sub.MAX. If the boost voltage V.sub.BST is below the threshold V.sub.MAX, the method returns to the start.

(79) If in step 1001 the DC-DC converter determines that the boost voltage V.sub.BST is above the maximum threshold V.sub.MAX, the method passes to step 1002 in which the DC-DC converter determines whether the switching frequency F.sub.S is greater than a minimum switching frequency F.sub.SMIN.

(80) If in step 1002 the DC-DC converter determines that the switching frequency F.sub.S is greater than the minimum switching frequency F.sub.SMIN, the method passes to step 1003 in which the DC-DC converter reduces the switching frequency. In some embodiments, the switching frequency may be decreased by increasing the time period of the switching frequency by one clock period. In other words, by reducing the switching frequency the DC-DC convertor switches from using the first switching frequency to using a second switching frequency. The method may then pass back to the start.

(81) If in step 1002 the DC-DC converter determines that the switching frequency F.sub.s is not greater than the minimum switching frequency, the method pass to step 1004 in which the DC-DC converter the DC-DC converter determines whether an on time T.sub.S1 during which the DC-DC converter is in state S.sub.1, is greater than a minimum value, T.sub.S1MIN. An on time T.sub.S1 of the DC-DC converter may be considered a period of time during which the current across the inductor of the DC-DC converter is being increased. In the example illustrated in FIG. 4, this on time T.sub.S1 may be understood as the period during which the DC-DC converter is in state S.sub.1, i.e. the time for which the NFET is in a conducting state.

(82) The minimum on time T.sub.S1MIN may be a minimum duty cycle for the frequency at which the DC-DC converter is operating.

(83) If in step 1004 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is greater than T.sub.S1MIN, then the method passes to step 1005 in which the DC-DC converter reduces the on time of the DC-DC converter. The method will then return to the start. In some embodiments, the on time of the DC-DC converter may be reduced by a predetermined increment.

(84) If in step 1004 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is not greater than the T.sub.S1MIN, the method may end in step 1006.

(85) It will be appreciated that the steps 1001 to 1005 may be performed iteratively until either the voltage has dropped below the maximum threshold V.sub.MAX or both the minimum on time T.sub.S1MIN and the minimum switching frequency F.sub.SMIN have been reached.

(86) In some embodiments the switching frequency may be decreased from a starting frequency F.sub.START by increasing N by one in the following equation:
F.sub.N=(F.sub.START)/(N+1).

(87) FIG. 11 illustrates a method of increasing the duty cycle of a DC-DC converter to maintain the boost voltage within a predetermined voltage range according to some embodiments.

(88) In particular, the embodiment shown in FIG. 11 performs the steps of responsive to the output voltage being above the predetermined voltage range when using the first switching frequency, first switching to the second switching frequency; and responsive to the output voltage remaining above the predetermined voltage range when using the second switching frequency, decreasing the duty cycle by decreasing the on time of the DC-DC converter until a minimum duty cycle for the second switching frequency is reached.

(89) In step 1101 the DC-DC converter determines whether the boost voltage V.sub.BST is below the minimum voltage threshold V.sub.MIN. If the boost voltage V.sub.BST is above the minimum threshold V.sub.MIN, the method returns to the start.

(90) If in step 1101 the DC-DC converter determines that the boost voltage V.sub.BST is below the minimum threshold V.sub.MIN, the method passes to step 1102 in which the DC-DC converter determines whether the switching frequency F.sub.S is less than a maximum switching frequency F.sub.SMAX.

(91) If in step 1102 the DC-DC converter determines that the switching frequency F.sub.S is less than the maximum switching frequency F.sub.SMAX, the method passes to step 1103 in which the DC-DC converter increases the switching frequency. In some embodiments, the switching frequency may be increased by decreasing the time period of the switching frequency by one clock period. In other words, by increasing the switching frequency the DC-DC converter switches from using the first switching frequency to the second switching frequency. The method may then passes back to the start.

(92) If in step 1102 the DC-DC converter determines that the switching frequency F.sub.s is not less than the maximum switching frequency F.sub.SMAX, the method passes to step 1104 in which the DC-DC converter the DC-DC converter determines whether an on time T.sub.S1 during which the DC-DC converter is in state S.sub.1, is less than a maximum value, T.sub.S1MAX. An on time T.sub.S1 of the DC-DC converter may be defined as a period of time during which the current across the inductor of the DC-DC converter is being increased. In the example illustrated in FIG. 4, this may be understood as the period during which the DC-DC converter is in state S.sub.1, i.e. the time for which the NFET is in a conducting state.

(93) The maximum on time T.sub.S1MAX may be a maximum duty cycle for the frequency at which the DC-DC converter is operating.

(94) If in step 1104 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is less than T.sub.S1MAX, then the method passes to step 1105 in which the DC-DC converter increases the on time T.sub.S1 of the DC-DC converter. The method will then return to the start. In some embodiments, the on time T.sub.S1 of the DC-DC converter may be increased by a predetermined increment.

(95) If in step 1104 the DC-DC converter determines that the on time T.sub.S1 of the DC-DC converter is not less than the maximum on time T.sub.S1MAX, the method may end in step 1106.

(96) It will be appreciated that the steps 1101 to 1105 may be performed iteratively until either the voltage has risen above the minimum threshold V.sub.MIN or both the maximum on time T.sub.S1MAX and the maximum switching frequency F.sub.SMAX have been reached.

(97) In some embodiments the switching frequency may be increased from a starting frequency F.sub.START by decreasing N by one in the following equation:
F.sub.N=(F.sub.START)/(N+1).

(98) FIG. 12 illustrates an example of the operation of a DC-DC converter according to some embodiments.

(99) The DC-DC converter monitors the output voltage V.sub.BST, for example, as illustrated in FIG. 2, the controller 222 may receive an indication of the output voltage V.sub.BST via an analog-to-digital converter 220. The controller 222 may then adjust the duty cycle of the DC-DC converter accordingly.

(100) For example, as illustrated in FIG. 12, if at a time t.sub.1 the boost voltage V.sub.BST goes above a maximum threshold voltage V.sub.MAX, the controller 222 be configured to determine whether to decrease the duty cycle.

(101) In some embodiments, the DC-DC converter is configured to decrease the duty cycle responsive to the boost voltage V.sub.BST remaining above the maximum voltage V.sub.MAX for a predetermined time. For example, the controller 222 may comprise a filter counter configured to count clock cycles from when the voltage first passes above the maximum threshold V.sub.MAX at a time t.sub.1, until the amplitude passes back below the maximum threshold at a time t.sub.2. In this example, at the time t.sub.2 the filter counter has not yet counted a predetermined number X of clock cycles. The DC-DC converter may therefore not decrease the duty cycle. This manner of control avoids unnecessary decreasing of the duty cycle due to transient peaks in the boost voltage V.sub.BST.

(102) However, at time t.sub.3 the boost voltage V.sub.BST passes back above the maximum threshold V.sub.MAX, this time for long enough for the filter counter to count X clock cycles twice. In this example, a wait counter is also implemented where the filter counter waits a predetermined time between counting each set of X clock cycles. The controller therefore decreases the duty cycle twice after each time the filter counter counts X clock cycles. The boost voltage passes below the maximum threshold at time t.sub.4 before the filter counter can count X clock cycles for a third time, and therefore the duty cycle is not decreased a third time.

(103) It will be appreciated that the duty cycle may be decreased as described with respect to FIG. 8 or 10 by decreasing the on time of the DC-DC converter and/or the switching frequency.

(104) It will be appreciated that the DC-DC converter may be equivalently configured to increase the duty cycle responsive to the boost voltage remaining below the minimum voltage V.sub.MIN for a predetermined time. For example, the controller 222 may comprise a filter counter configured to count clock cycles from when the voltage first passes below the minimum threshold V.sub.MIN to when the voltage passes back above the threshold V.sub.MIN. Again, if the filter counter does not reach a predetermined number of clock cycles Y (where Y may or may not be equal to X) in this time, the controller may be configured not to increase the duty cycle. This manner of control avoids unnecessary increasing of the duty cycle due to transient troughs in the boost voltage V.sub.BST.

(105) Again, it will be appreciated that the duty cycle may be increased as described with respect to FIG. 9 or 11 by increasing the on time of the DC-DC converter and/or the switching frequency.

(106) FIG. 13 illustrates the NFET 206 conducting and non-conducting states as the duty cycle is decreased. In this example, the duty cycle is decreased according to the method described in FIG. 8, but it will be appreciated that the duty cycle may be increased or decreased according to any of the methods described above.

(107) At first, in this example, the duty cycle is 3x/T.sub.1. The duty cycle is then decreased to 2x/T.sub.1 by decreasing the on time of the DC-DC converter from 3x to 2x. The duty cycle is then decreased to x/T.sub.1 by decreasing the on time of the DC-DC converter from 2x to x.

(108) As x is the minimum on time for the DC-DC converter, the duty cycle is then decreased to x/(2T.sub.1) by decreasing the switching frequency from 1/T.sub.1 to 1/(2T.sub.1). Again, the duty cycle may be further decreased from x/(2T.sub.1) to x/(3T.sub.1) by decreasing the switching frequency from 1/(2T.sub.1) to 1/(3T.sub.1).

(109) FIGS. 14A and 14B illustrate the energy as a function of frequency for different frequencies using the same duty cycle.

(110) Another possible reason to alter the switching frequency of the DC-DC converter may be to change the concentration of the energy within the frequency band as illustrated in FIGS. 14A and 14B.

(111) In FIG. 14A, the NFET on and off times are illustrated. The duty cycle is x/T.sub.1 and the switching frequency is 1/T.sub.1. The graph 1300 illustrates how the energy is therefore concentrated around the frequency 1/T.sub.1.

(112) In FIG. 14B, the duty cycle is 2x/2T.sub.1 which is equivalent to x/T.sub.1, in other words, the same as in FIG. 14A. However, the switching frequency is 1/(2T.sub.1). The graph 1401 therefore illustrates how the energy is now concentrated around the lower frequency of 1/(2T.sub.1).

(113) As the energy in the frequency band may be altered by changing the switching frequency, as illustrated in FIG. 14. If, for example, a concentration of energy is desired that is concentrated around a frequency 1/T.sub.1 but in this example 1/T.sub.1 is not an allowed switching frequency, in other words the frequency 1/T.sub.1 falls within the predefined disallowed frequency band, then two or more allowable switching frequencies which do not fall within the predefined disallowed frequency band, falling either side of the desired switching frequency, may be utilized to create the same energy distribution around the switching frequency 1/T.sub.1.

(114) FIG. 15 illustrates the switching frequencies available to the boost converter when unconstrained by any predefined disallowed frequency band containing disallowed frequencies. As illustrated, the boost converter has a minimum and maximum possible switching frequency. In this example, f.sub.MIN0 is the minimum switching frequency of the boost converter when allowed to operate without any predefined disallowed frequency bands containing disallowed frequencies. In this example, f.sub.MAX0 is the maximum switching frequency of the boost converter when allowed to operate without any predefined disallowed frequency bands containing disallowed frequencies.

(115) FIG. 16 illustrates an example where two predefined disallowed frequency bands have been set containing disallowed frequencies. In this example, a first predefined disallowed frequency band between f.sub.MIN0 and a frequency f.sub.MIN1 is introduced and a second predefined disallowed frequency band between f.sub.MAX1 and f.sub.MAX0 is introduced. The values f.sub.MIN1 and f.sub.MAX1 are then set as maximum and minimum switching frequencies for the boost converter in order to ensure that the boost converter does not use switching frequencies in either of the predefined disallowed frequency bands. In this example, the predefined disallowed frequency bands sit at either end of the allowed switching frequencies.

(116) FIG. 17 illustrates an example comprising a single predefined disallowed frequency band has been set containing disallowed frequencies. In this example, the predefined disallowed frequency band falls between the frequencies f.sub.MAX1 and f.sub.MIN1. The frequencies between f.sub.MAX1 and f.sub.MIN1 may therefore be considered as disallowed. Two frequency bands are provided that the boost converter may use between f.sub.MIN0 and f.sub.MAX1 and f.sub.MIN2 and f.sub.MAX0. In this example therefore, the boost converter may select a frequency between f.sub.MIN0 and f.sub.MAX1 and f.sub.MIN2 and f.sub.MAX0. In circumstances where the desired energy concentration is between f.sub.MAX1 and f.sub.MIN2, the boost converter may select a frequency between f.sub.MIN0 and f.sub.MAX1 and a different frequency between f.sub.MIN2 and f.sub.MAX0 and may then alternate between the two switching frequencies in such a way that the energy may be concentrated between the frequencies f.sub.MAX1 and f.sub.MIN2.

(117) In some embodiments therefore, the DC-DC converter may be configured to alternate between a first switching frequency and a second switching frequency wherein the first switching frequency is higher than the predefined disallowed frequency band and the second switching frequency is lower than the predefined disallowed frequency band.

(118) FIG. 18 illustrates an example comprising three predefined disallowed frequency bands. In this example, a first predefined disallowed frequency band falls between f.sub.MIN0 and a frequency f.sub.MIN1 and a second frequency band falls between f.sub.MAX2 and f.sub.MAX0. These disallowed frequency bands are equivalent to those illustrated in FIG. 16 in that they are at the ends of the possible frequencies that the boost converter is capable of using. However, in this example, the predefined disallowed frequency band between f.sub.MAX1 and f.sub.MIN2 is also disallowed. In this example, therefore only the frequencies between f.sub.MIN1 and f.sub.MAX1 and the frequencies between f.sub.MIN2 and f.sub.MAX2 may be used by the boost converter. Similarly to as described with regards to FIG. 17, the boost converter may alternate between a switching frequency between f.sub.MIN1 and f.sub.MAX1 and a switching frequency between f.sub.MIN2 and f.sub.MAX2 in order to concentrate the energy between the frequencies f.sub.MAX1 and f.sub.MIN2.

(119) FIG. 19 illustrates an example comprises four predefined disallowed frequency bands. In this example, the frequencies between f.sub.MIN0 and f.sub.MIN1 between f.sub.MAX1 and f.sub.MIN2, between f.sub.MAX2 and f.sub.MIN3 and between f.sub.MAX3 and f.sub.MIN4 are disallowed.

(120) As previously, the boost convertor may alternate between frequencies outside of these predefined disallowed frequency bands containing disallowed frequencies to concentrate the energy within the predefined disallowed frequency bands without actually using the frequencies within those predefined disallowed frequency bands.

(121) FIG. 20 illustrates a DC-DC converter 2000 according to some embodiments. The DC-DC converter 2000 comprises a controller 2001. The controller 2001 comprises an input 2002 configured to receive an indication of the output voltage.

(122) The controller 2001 further comprises an adjustment block 2003 configured to adjust a duty cycle of the DC-DC converter based on the output voltage to maintain the output voltage within a predetermined voltage range. The duty cycle of the DC-DC converter is adjusted by switching between a first switching frequency to a second switching frequency. The first switching frequency and the second switching frequency are selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band. As described previously, the at least one predefined disallowed frequency band may comprise disallowed frequencies.

(123) There is therefore provided methods and apparatus for maintaining an output voltage of a DC-DC converter, configured to operate in a discontinuous conduction mode, within a predetermined voltage range.

(124) It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word comprising does not exclude the presence of elements or steps other than those listed in the claim, a or an does not exclude a plurality, and a single feature or other unit may fulfil the functions of several units recited in the claims. Any reference numerals or labels in the claims shall not be construed so as to limit their scope. Terms such as amplify or gain include possible applying a scaling factor or less than unity to a signal.