ELECTRICAL CONTACTS FOR LOW DIMENSIONAL MATERIALS

Abstract

The present invention relates to a method for connecting an electrical contact to a nanomaterial carried by a substrate. At least one layer of soluble lithography resist is provided on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. At least a portion of the exposed surface portion of the nanomaterial is removed to thereby expose the underlying substrate and an edge of the nanomaterial. A metal is deposited on at least the edge of the nanomaterial and the exposed substrate such that the metal forms an electrical contact with the nanomaterial. Removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the two-dimensional material is exposed.

Claims

1. A method for connecting an electrical contact to a nanomaterial of at least one dimension supported by a substrate, the method comprising: providing a substrate supporting a nanomaterial of at least one dimension and at least one layer of soluble lithography resist applied on the nanomaterial, wherein an opening in the at least one layer of resist exposes a portion of the nanomaterial, wherein, in the opening, an upper portion of the at least one layer of resist extends beyond a lower portion of the at least one layer of resist, thereby forming an overhang portion, removing at least a portion of the exposed portion of the nanomaterial, thereby exposing the underlying substrate and an edge of the nanomaterial, depositing a metal on at least the edge of the nanomaterial and the exposed substrate, the metal forming an electrical contact with the nanomaterial, removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the nanomaterial is exposed.

2. The method according to claim 1, wherein the nanomaterial is a two-dimensional material, a nanotube, a nanoribbon, or a nanowire.

3. The method according to claim 2, wherein the two-dimensional material is graphene.

4. The method according to claim 1, wherein the at least one layer comprises three layers of soluble lithography resist, wherein the intermediate layer of resists is faster soluble in a developer configured to dissolve the three layers of soluble lithography resist compared to the other two layers, wherein a portion of the upper layer of the three layers forms the overhang portion over at least the bottom layer.

5. The method according to claim 1, wherein the at least one layer comprises three layers of soluble lithography resist, wherein the top layer of resist is soluble in a first developer, and the intermediate layer and bottom layer are soluble in a second developer that the top layer of resist is not soluble in, the intermediate layer and the bottom layer are not soluble in the first developer, wherein a portion of the upper layer of the three layers forms the overhang portion over at least the bottom layer.

6. The method according to claim 4, wherein the bottom layer of resist extends beyond the intermediate layer into the opening.

7. The method according to claim 1, wherein the metal is deposited by physical vapor deposition such as sputtering, e-beam evaporation, thermal evaporation, or laser ablation.

8. The method according to claim 1, wherein the substrate is comprised of silicon-carbide or silicon.

9. The method according to claim 1, wherein the removing at least a portion of the exposed portion of the nanomaterial comprises etching of the nanomaterial with reactive ion etching, such as oxygen plasma, or ion milling.

10. The method according to claim 2, wherein the nanomaterial is a single layer or multilayer two-dimensional material.

11. An electrical connection structure for an electronic device, the electrical connection structure comprising: a nanomaterial of at least one dimension carried by a substrate, the nanomaterial comprising an edge portion adjacent to a substrate surface portion, a metal contact anchored to the substrate surface portion and connected to the edge portion of the nanomaterial, such that the metal contact makes electrical connection with the nanomaterial through contacting the edge portion.

12. The electrical connection structure according to claim 11, wherein the nanomaterial is a layer of two-dimensional material or a nanotube.

13. The electrical connection structure according to claim 12, wherein the two-dimensional material is graphene.

14. The electrical connection structure according to claim 11, wherein organic or inorganic molecules are deposited on the nanomaterial.

15. The electrical connection structure according to claim 12, wherein the two-dimensional material is a single layer or multilayer two-dimensional material.

16. The electrical connection structure according to claim 11, wherein the electrical connection is produced by: providing the substrate supporting a nanomaterial of at least one dimension and at least one layer of soluble lithography resist applied on the nanomaterial, wherein an opening in the at least one layer of resist exposes a portion of the nanomaterial, wherein, in the opening, an upper portion of the at least one layer of resist extends beyond a lower portion of the at least one layer of resist, thereby forming an overhang portion, removing at least a portion of the exposed portion of the nanomaterial, thereby exposing the underlying substrate and an edge of the nanomaterial, depositing a metal on at least the edge of the nanomaterial and the exposed substrate, the metal forming an electrical contact with the nanomaterial, removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the nanomaterial is exposed.

17. An electronic device comprising the electrical connection structure according to claim 11, wherein the electrical connection structure is configured to provide an electrical connection for the electronic device to additional electrical circuitry.

18. The electronic device according to claim 17, wherein the electronic device is a quantum resistance standard device.

19. The electronic device according to claim 17, wherein the electronic device is a Hall effect sensor.

20. The electronic device according to claim 17, wherein the electronic device is a gas sensor or a chemiresistor.

21. (canceled)

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] These and other aspects of the present invention will now be described in more detail, with reference to the appended drawings showing an example embodiment of the invention, wherein:

[0034] FIG. 1a-d schematically illustrates a manufacturing flow for producing an electrical connection for electrically contacting a nanomaterial;

[0035] FIG. 2 is a flow-chart of method steps according to embodiments of the invention;

[0036] FIG. 3a-d schematically illustrates a manufacturing flow for producing an electrical connection for electrically contacting a nanomaterial.

[0037] FIG. 4a is a conceptual perspective view of an electrical connection structure for an electronic device;

[0038] FIG. 4b is a cross-section of the electrical connection structure shown in FIG. 4a;

[0039] FIG. 4c illustrates a plurality of electrical connection structure for an electronic device;

[0040] FIG. 5 conceptually illustrates an example electronic device according to embodiments of the invention, and FIG. 6a-f conceptually illustrates one possible manufacturing flow for obtaining a substrate with layers of resist on a nanomaterial.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0041] In the present detailed description, various embodiments of the inventive concept are mainly described with reference to a nanomaterial in the form of a two-dimensional material comprised of graphene. However, it should be noted that this by no means limits the scope of the present invention, which is equally well applicable to any two dimensional material produced from its parent material or grown on a substrate. Accordingly, the inventive concept is applicable to two-dimensional materials in the form of a single atomic layer or a few atomic layers (i.e. multi-layer) of one or more atomic species. The nanomaterial may in some possible implementations be a narrow ribbon of a single or a few atomic layers of one or more atomic species (a so-called nanoribbon). Furthermore, the inventive concept is equally well applicable to one-dimensional materials such as nanotubes, e.g. carbon nanotubes.

[0042] FIG. 1a-d schematically illustrates a manufacturing flow for producing an electrical connection for electrically contacting a nanomaterial.

[0043] FIG. 1a, illustrates a substrate 100 having thereon a layer of a nanomaterial in the form of a two-dimensional material 102. The two-dimensional material 102 may be any two dimensional material produced from its parent material. In one possible implementation, the two-dimensional material 102 is epitaxial graphene produced by thermal decomposition of a silicon-carbide substrate 100. Other possibilities are to produce the epitaxial graphene on the substrate by chemical vapor deposition. The epitaxial graphene may be wafer scale graphene grown on the silicon-carbide substrate 100.

[0044] There is schematically illustrated a layered structure of soluble lithography resist 104 on the two-dimensional material 102. The layered structure of soluble lithography resist 104 may comprise at least one layer of lithography resist.

[0045] An opening 106 in the resist layer 104 exposes a surface portion 108 of the two-dimensional material 102. The surface portion 108 is clear of lithography resist in the opening 106. When the opening 106 was formed, a so-called under-cut was obtained. Thus, an upper portion 110 extends beyond a lower portion 112 of resist such that an overhang portion 110 is formed. Thus, the width of the opening 106 is smaller at the upper portion 110 than at the lower portion 112.

[0046] It should be noted that the nanomaterial 102 may equally well be a nanotube, (e.g. carbon nanotube), or a nanowire, or a nanoribbon.

[0047] FIG. 1b conceptually illustrates removing at least a portion of the exposed surface portion 108 of two-dimensional material 102 to thereby expose the underlying substrate portion 114. Further, removing the exposed surface portion 108 of the two-dimensional material 102 causes an edge 116 to be formed in the two-dimensional material. The edge 116 is the step (i.e. comprising a side wall) formed between the two-dimensional material 102 and the exposed substrate portion 114. The edge 116 connects the substrate surface 118 in the exposed substrate portion 114 to the upper surface 120 of the two-dimensional material 102.

[0048] Removing the exposed surface portion 108 may be performed by application of oxygen-plasma on the exposed surface portion 108. The oxygen plasma may be applied for about one minute at 50 W and 250 mT, at 10 sccm oxygen flow. However, the parameters for the etching with oxygen plasma may vary depending on e.g. lithography resist thickness and the above serves merely as an example. Other etching techniques may be used in place of oxygen plasma etching, such as reactive using other species than oxygen, or ion milling. Oxygen plasma etching is advantageous because it is gentle to the lithography resist 104. The application of the plasma or ions are indicated by the arrows 119.

[0049] As conceptually illustrate in FIG. 1c, a metal 122 is deposited at least on the edge 116 of the two-dimensional material 102 and on the exposed substrate portion 114. Thus, metal 122 is deposited through the opening 106 and onto the edge 116 of the two-dimensional material 102 and onto the exposed substrate portion 114. The metal 122 deposited on the exposed substrate portion 114 is deposited directly on the substrate 100 which thus enables a strong anchoring for the metal contact 124 (comprising metal 122) formed in the opening 106. The physical contact between the two-dimensional material 102 and the metal contact 124 at the edge 116 provides an electrical connection between the two-dimensional material 102 and the metal contact 124. One possible example metal contact configuration comprises about 5 nm of titanium under an about 80 nm layer of gold deposited by physical vapor deposition. Another example is sputtering of a ca 20 nm layer of niobium nitride (which is superconducting below its critical temperature).

[0050] Now turning to FIG. 1d. The soluble lithography resist 104 is removed by a so-called lift-off process to remove at least a portion of the soluble lithography resist 104 and the metal 122 deposited on the soluble lithography resist 104. As a result, the metal contact 124 is left anchored to the substrate 102 at the surface portion 114, and electrically connected to the edge 116 of the two-dimensional material 102.

[0051] The metal may be deposited by e.g. physical vapor deposition (e.g. e-beam, thermal evaporation, or sputtering).

[0052] The two-dimensional material 102 may be graphene grown on a substrate 100 comprised of silicon carbide or produced transferring graphene onto a silicon substrate.

[0053] FIG. 2 is a flow chart of method steps according to embodiments of the invention. In step S102 is a substrate provided which supports a nanomaterial and at least one layer of soluble lithography resist applied on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. An upper portion of the at least one layer of resist extends beyond a lower portion of the at least one layer of resist in the opening. In this way, an overhang portion is formed. Subsequently, in step S104 is at least a portion of the exposed surface portion of the nanomaterial removed from the substrate, which thereby exposes the underlying substrate and an edge of the nanomaterial. In step S106 is a metal deposited on at least the edge of the nanomaterial and the exposed substrate. The metal forms an electrical contact with the nanomaterial. Moreover, at least a portion of the soluble lithography resist is removed from the nanomaterial in step S108 such that at least a portion of the nanomaterial is exposed. The nanomaterial is of at least one dimension and may be e.g. a two-dimensional material or a nanotube, or a set of nanotubes.

[0054] FIG. 3a illustrates that the substrate 100 may be provided with three layers of soluble lithography resist 301, 302, and 303. This layered structure of resist provides for a reliable way of forming the overhang portion 110, i.e. the under-cut. Similar to FIG. 1b, in FIG. 3b the exposed surface portion 108 of two-dimensional material 102 (or nanotube 102 according to possible implementations) is removed from the substrate 100 using e.g. oxygen plasma. Thus exposing the substrate portion 114 under the removed the exposed portion 108 of two-dimensional material 102. Further, edge portions 116 of the two-dimensional material are exposed. As shown in FIG. 3c, a metal 122 is deposited on the edge 116 of the two-dimensional material 102 and on the exposed substrate portion 114. Removing the three layers of soluble lithography resist 301, 302, 303 and the metal 122 on the uppermost resist layer 301 leaves the metal contact 124 anchored to the exposed substrate portion 114 and connected to the edge 116 as shown in FIG. 3d.

[0055] The intermediate layer of resist 302 is faster soluble in a developer configured to dissolve the three layers of soluble lithography resist compared to the other two layers 301 and 303. Thus, when producing the layered structure of resist the intermediate layer will form a groove under the upper layer 301 in the layered structure. Thus a portion 110 of the upper layer of the three layers forms the overhang portion over at least the bottom layer 303.

[0056] In one possible implementation, the top layer of resist 301 is soluble in a first developer. Further, the intermediate layer 302 and the bottom layer of resist are soluble in a second developer that the top layer 301 is not soluble in, or at least substantially slower dissolved in. Thus, first the opening is defined in the top layer 301 using the first developer. Next, the intermediate layer 302 and the bottom layer are partly dissolved using the second developer. The intermediate layer is faster dissolved by the second developer, thereby forming a groove or sideways cavity 210 between the bottom 303 and upper layer 301 such that an under-cut is formed by developing for suitable time duration.

[0057] The layer 301 may be the lithography resist AR-P 6200.13 (developed in o-xylene), the intermediate layer 302 may be P(MMA-MAA), and the bottom layer 303 may be PMMA, both developed in a mixture of isopropanol and water (or methyl isobutyl ketone dissolved in isopropanol).

[0058] The layers of lithography resist may however comprise other possible lithography resists, and their respective developer solutions, and the above merely serves as an example. For instance the AR-P 6200.13 may be replaced by S1813 and the PMMA by LOR3A. One could also employ negative resists such as UVN2300 and ma-NA2401.

[0059] The metal 122 may comprise gold, aluminum, titanium, palladium, chromium niobium, niobium nitride, etc., with a typical thickness of about 3 to 2000 .

[0060] Applying a resist layer may be performed by spin-coating known per se to the skilled person, as well as chemical vapor deposition and physical vapor deposition.

[0061] FIG. 4a is a conceptual perspective view of an electrical connection structure 400 for an electronic device and FIG. 4b is a cross-section of the electrical connection structure 400 shown in FIG. 4a. The electrical connection structure 400 may be used for electrically connecting an electronic device (not shown) on the substrate 100 to external electrical circuitry (not shown). The electrical connection structure 400 comprises a layer of two-dimensional material 102 carried by substrate 100. In one possible implementation is the two-dimensional material 102 graphene carried by a silicon-carbide substrate 100. The graphene may for instance be produced by thermal decomposition of silicon carbide. Moreover, a metal contact 124 is anchored to a substrate surface portion 114 adjacent to an edge portion 116 of the two-dimensional material 102. The size of the metal contact 124 in a plane parallel to the substrate 100 surface may be e.g. 300 m by 300 m, 100 m by 100 m, 10 m by 10 m, 1 m by 1 m, but the size and shape may be arbitrary and the geometry of the metal contact is limited only by the substrate size (for example, the metal contact may be square as indicated by the above measures, rectangular, polygonal, circular, oval, etc.) and within the scope of the invention, but here the above size serves as an example. The metal contact 124 makes electrical connection with the two-dimensional material 102 through contacting the edge portion 116. Further, as illustrated in FIG. 4c, plurality metal contacts 124 may be formed and connected to respective edge portions of the two dimensional material 102.

[0062] FIG. 5 is a schematic top view of an example conceptual electronic device 500. The electronic device is here illustrated as a Hall bar 501 which may be used as an embodiment or realization of a quantum resistance standard by using the quantum Hall effect in the device, or as a Hall Effect sensor for measuring a magnetic field strength.

[0063] The electronic device 500 may be fabricated using conventional lithography using e.g. electron beam lithography and/or photolithography, which are per se known to the skilled person.

[0064] The electronic device 500 comprises at least four metal contacts connected to the two-dimensional material 102. Two metal contacts 502, 504 are arranged for enabling a current (I) to be passed through the two dimensional material in the x-direction, a longitudinal direction of the Hall bar 500. The two connection pads 506, 508 are arranged as output ports for measuring transverse voltage (V.sub.xy) when the current (I) is passed through the two-dimensional material in the device 500 in the longitudinal direction (x). The two connection pads 506, 508 are spatially separated in the transverse direction (y). Furthermore, a longitudinal voltage (V.sub.xx) may be measured between connection pad 506 and an additional connection pad 510 spatially separated from the connection pad 506 in the longitudinal (x) direction. The size of a hall bar 501 may for example be: w=5 mmL=3 mm, w=30 mL=100 m, W=2 mL=10 m. Each of the metal contacts 502, 504, 506, 508, and 510 are manufactured and connected to an edge of the two-dimensional material 102 as described with reference to previous drawings. Other possible electronic device may be e.g. gas sensors and chemiresistors.

[0065] The layered resist structure shown in FIG. 1a and FIG. 3a may be achieved in various ways for providing the substrate with the nanomaterial and the soluble lithography resist. One possible way will briefly be described here. FIG. 6a shows a substrate having thereon a nanomaterial. Next, in FIG. 6b, has a layer of a first lithography resist been applied to the nanomaterial by e.g. spin coating and baking at an elevated temperature. The resist 303 may be P(MMA) (e.g. about 100 nm thick). In FIG. 6c has a second layer 302 of resist been added, here in the form of P(MMA-MAA) (e.g. about 280 nm thick) by spin-coating and baking at an elevated temperature. A top layer 301 of resist is finally added by spin coating and baking at an elevated temperature. The top layer 301 may be AR-P6200 (e.g. about 180 nm thick, AR-P6200 is a positive e-beam resist and serves as an example e-beam resist herein, other resists may be equally well applicable). In this particular example, the lithography resists are electron beam sensitive resists, however, other alternatives exist. Thus, the layers 301-303 of resist are exposed by an electron beam (e), as conceptually illustrated in FIG. 6e.

[0066] After development in a suitable combination of developers, here, first the top layer 301 may be developed in o-xylene (about 30 seconds), and the other two layers 302 and 303 may be developed in a mixture of isopropanol (e.g. about 93%) and water (e.g. about 7%) (for about 40 s), is the desired opening 106 in the layers of resist obtained with the overhang portions 110.

[0067] It is noted that the scheme for providing the layered resist structure conceptually shown in FIG. 6f, (and FIG. 1a, and FIG. 3a) only serves as an example and that multiple other possible schemes may provide the same result. The invention is applicable regardless of how the layered resist structure conceptually shown in FIG. 6f, (and FIG. 1a, and FIG. 3a) is obtained.

[0068] The person skilled in the art realizes that the present invention by no means is limited to the preferred embodiments described above. On the contrary, many modifications and variations are possible within the scope of the appended claims.

[0069] In the claims, the word comprising does not exclude other elements or steps, and the indefinite article a or an does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope.