Spin orbit materials for efficient spin current generation
10923651 ยท 2021-02-16
Assignee
Inventors
- Rajagopalan Ramaswamy (Singapore, SG)
- Yi WANG (Singapore, SG)
- Shuyuan Shi (Singapore, SG)
- Hyunsoo YANG (Singapore, SG)
Cpc classification
H10B61/00
ELECTRICITY
H03K19/18
ELECTRICITY
G11C11/161
PHYSICS
International classification
G11C11/16
PHYSICS
Abstract
In one embodiment, a SOT device is provided that replaces a traditional NM layer adjacent to a magnetic layer with a NM layer that is compatible with CMOS technology. The NM layer may include a CMOS-compatible composite (e.g., CuPt) alloy, a TI (e.g., Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, Bi.sub.1-xSb.sub.x, etc.) or a TI/non-magnetic metal (e.g., Bi.sub.2Se.sub.3/Ag, Bi.sub.xSe.sub.1-x/Ag, Bi.sub.1-xSb.sub.x/Ag, etc.) interface, that provides efficient spin current generation. Spin current may be generated in various manners, including extrinsic SHE, TSS or Rashba effect.
Claims
1. A spin-orbit torque (SOT) device, the SOT device comprising: a magnetic layer; and a non-magnetic layer (NM) layer adjacent to the magnetic layer that is configured to generate spin current that diffuses into the magnetic layer, the NM layer including a complementary metal oxide semiconductor (CMOS)-compatible composite alloy that includes nonmagnetic impurities added to a CMOS-compatible metal host and is configured to generate the spin current via an extrinsic spin Hall effect (SHE) involving electron scattering on centers of the nonmagnetic impurities, a topological insulator (TI) configured to generate the spin current via topological protected spin-momentum-locked surface states (TSS), or a TT/non-magnetic metal interface configured to generate the spin current via Rashba effect.
2. The SOT device of claim 1, wherein the NM layer includes the CMOS-compatible alloy.
3. The SOT device of claim 1, wherein the nonmagnetic impurities are Pt and the CMOS-compatible metal host is Cu, and the CMOS-compatible alloy is CuPt alloy.
4. The SOT device of claim 1, wherein the NM layer includes the TI.
5. The SOT device of claim 4, wherein the TI is Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, or Bi.sub.1-xSb.sub.x.
6. The SOT device of claim 1, wherein the NM layer includes the TT/non-magnetic metal interface.
7. The SOT device of claim 6, wherein the TT/non-magnetic metal interface is a Bi.sub.2Se.sub.3/Ag, Bi.sub.xSe.sub.1-x/Ag, or Bi.sub.1-xSb.sub.x/Ag interface.
8. The SOT device of claim 1, wherein the SOT device is a magnetic random access memory (MRAM), magnetic logic device or racetrack memory.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The description below refers to the accompanying drawings of example embodiments, of which:
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DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS
I. A SOT Device Stack
(19)
(20) Similarly, the other layers of the SOT device 200 may be made from various materials. The magnetic layer 210 may be a FM layer made from ferromagnetic materials such as iron (Fe), cobalt (Co), nickel (Ni) and their alloys (e.g., nickel iron (NiFe) alloy, cobalt iron boron (CoFeB) alloy, etc.); ferrimagnetic materials such as cobalt palladium (CoPd) alloy, cobalt terbium (CoTb), and cobalt gadolinium (CoGd) alloy, or multilayers such as [Co/Tb].sub.n, [Co/Pd].sub.n and [Co/Gd].sub.n; or ferromagnetic or ferromagnetic insulators, such as yttrium iron garnet (YIG). A barrier layer (not shown) may be made from materials such as magnesium oxide (MgO), hafnium oxide (HfO) or other insulating materials or nonmagnetic metals. Likewise, the capping layer may be made from silicon oxide (SiO.sub.2), aluminum oxide (Al.sub.2O.sub.3), etc.
II. A CMOS Compatible Composite Alloy NM Layer
(21) A. Overview
(22) In a first embodiment, a SOT device replaces a traditional NM layer with a CMOS-compatible composite alloy (e.g., a Cu-based alloy such as CuPt alloy) NM layer that provides an extrinsic SHE mechanism. For example, in this embodiment, a SOT device may be structured as a stack that includes a substrate made of silicon (Si), a FM layer of permalloy (Py) (Ni.sub.8iFe.sub.19) (e.g., having a thickness of 5 nanometers (nm)), a CMOS compatible composite alloy NM layer made of Cu.sub.1-xPt.sub.x (e.g., having a thickness of 6 nm) where x (0-100%) is the atomic ratio of Pt in Cu.sub.1-xPt.sub.x alloy, a barrier layer of MgO (e.g., having a thickness of 1 nm), and a capping layer of SiO.sub.2 (e.g., having a thickness of 3 nm). The entire film stack may be deposited onto a thermally oxidized Si substrate at room temperature using magnetron sputtering. The composite alloy of Cu.sub.1-xPt.sub.x may be deposited by co-sputtering Cu and Pt targets. In order to tune the Pt concentration (x) in the Cu.sub.1-xPt.sub.x alloy, the sputtering power of Cu may be fixed and the sputtering power of Pt may be varied for x less than a threshold amount and the sputtering power of Pt may be fixed and the sputtering power of Cu may be varied for x greater than the threshold amount. The deposited films may be patterned using optical photolithography and argon (Ar) ion milling, among other processes.
(23) B. An Example Test Device
(24) In a specific test device for which experimental results are presented herein, the stack is deposited at room temperature using magnetron sputtering with a base pressure of <210.sup.9 Torr. To tune the Pt concentration (x) in the Cu.sub.1-xPt.sub.x alloy, the sputtering power of Cu is fixed at 120 W and the sputtering power of Pt is varied from 0 to 150 W for x less than 75%, and the sputtering power of Pt is fixed at 60 W and the sputtering power of Cu is varied between 0 and 60 W for x greater than 75%. The deposited films are patterned into rectangular microstrips having a length of 130 m and a width of 20 m using optical photolithography and Ar ion milling. A coplanar waveguide (CPW) is fabricated using optical photolithography and sputter deposition to make electrical contacts with the microstrips. A gap (G) between ground and signal electrodes of the CPW is varied in the range 35-90 m among the different devices in order to tune the device impedance close to 50.
(25)
(26) For the ST-FMR measurements, a microwave current of a fixed frequency (f=7, 8, or 9 GHz) is applied to Py/Cu.sub.1-xPt.sub.x bilayer. Simultaneously, an external magnetic field H.sub.ext is applied at an angle .sub.H=35 with respect to the current channel, as shown in
(27)
(28) C. Extraction of Spin Hall Angle and Damping
(29) The ST-FMR spectra of
V.sub.mix=V.sub.SF.sub.S(H.sub.ext)+V.sub.AF.sub.A(H.sub.ext),
where F.sub.S (H.sub.ext) is a symmetric Lorentzian function of amplitude V.sub.S and F.sub.A(H.sub.ext) is an antisymmetric Lorentzian function of amplitude V.sub.A. The Oersted field induced torque from the charge current in Cu.sub.1-xPt.sub.x layer is in out-of-phase with the magnetization precession and thus generates an antisymmetric Lorentzian spectrum about the resonance field, while the spin Hall torque from the generated spin current is in-phase with the magnetization precession and hence produces a symmetric Lorentzian spectrum about the resonance field.
(30) .sub.SH is the ratio of spin current density generated in the NM for a given charge current density. Therefore, .sub.SH can be expressed to be proportional to the ratio V.sub.S/V.sub.A according to the equation:
.sub.SH(V.sub.S/V.sub.A)(e.sub.0M.sub.Std/h)[1+(4M.sub.eff/H.sub.ext)].sup.1/2,
where M.sub.S and M.sub.eff are the saturation and effective magnetization of the Py layer, respectively, and t and d are the thicknesses of the Py layer and the Cu.sub.1-xPt.sub.x alloy layer, respectively.
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(32) The V.sub.S/V.sub.A ratio method utilized to determine .sub.SH values assumes that the interfacial effects such as the Rashba effect at a FM/NM interface (here the Py/Cu.sub.1-xPt.sub.x interface) is not significant. However, if the Rashba effect is significant, it can generate an effective field-like torque term of the same symmetry as Oersted field induced torque and thus can contribute to V.sub.A. As a result, the value of .sub.SH may not be accurately estimated from ST-FMR spectra. In order to eliminate such an issue, .sub.SH can be determined by considering only the symmetric component V.sub.S of the ST-FMR spectrum using the equation
(33)
where is the linewidth of the Lorentzian ST-FMR spectrum, E and I.sub.rf are the microwave electric field and current through the device, respectively, dR/d.sub.H is angular dependent magnetoresistance of the device at .sub.H=35, and .sub.SHE and are the spin Hall and longitudinal charge conductivities of the Cu.sub.1-xPt.sub.x alloy, respectively.
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(35) Apart from large .sub.SH and smaller damping enhancement, the Cu.sub.1-xPt.sub.x alloy exists as a single-phase solid solution for temperatures up to approximately 1000 C. due to high solubility of Pt in Cu. Therefore, the Cu.sub.1-xPt.sub.x alloy can sustain high CMOS backend processing temperatures (e.g., 400 C.).
(36) D. Contributions of Skew Scattering and Side-Jump
(37) In order to identify the contributions from skew scattering and side-jump to the extrinsic SHE, spin Hall resistivity induced by the Pt (.sub.SH.sup.imp) is compared with the longitudinal resistivity induced by Pt (.sub.imp) for different Pt concentrations. Here, .sub.imp is determined using the equation .sub.imp=.sub.CuPt.sub.Cu, where .sub.CuPt and .sub.Cu are values of the longitudinal resistivity for Cu.sub.1-xPt.sub.x alloy and pure Cu, respectively, of thicknesses 6 nm. The longitudinal resistivity for 6 nm thick pure Cu and pure Pt are measured as 20.5 cm and 32 cm, respectively.
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(39) To determine .sub.SH.sup.imp for different x, the following equation may be used:
.sub.SH=.sub.SH.sup.int.sub.CuPt.sup.2.sub.SH.sup.imp,
where .sub.SH is the spin Hall resistivity of Cu.sub.1-xPt.sub.x alloy determined from relation .sub.SH=(.sub.SH/.sub.CuPt) and .sub.SH.sup.int is the intrinsic contributions of Cu to the spin Hall resistivity. In the equation the contributions of phonons for the spin Hall resistivity are not considered as they are negligible. However, contributions of .sub.SH.sup.int is considered due to a non-zero .sub.SH in Cu, even though it is one order of magnitude smaller than that in Cu.sub.1-xPt.sub.x alloy. To determine .sub.SH.sup.int, consider the case x=0%, for which .sub.SH.sup.imp=0 and .sub.CuPt=.sub.Cu, since .sub.imp=0. Hence, .sub.SH.sup.int can be written as .sub.SH.sup.int=.sub.SH/.sub.Cu.sup.2=.sub.Sh,Cu/.sub.Cu, where .sub.SH,Cu is the .sub.SH of Cu (x=0%). Substituting the expressions for .sub.SH.sup.int and .sub.SH into the above equation one obtains the equation:
.sub.SH.sup.imp=.sub.CuPt.sub.SH(.sub.SH,Cu/.sub.Cu).sub.CuPt.sup.2.
(40)
(41) E. Thickness Dependence and Spin Diffusion Length
(42)
(43) F. Summary of CMOS Compatible Composite Alloy Techniques
(44) To summarize, a SOT device may be constructed that replaces a traditional NM layer with a CMOS-compatible composite alloy (e.g., a Cu-based alloy such as CuPt alloy) NM layer. The CMOS-compatible alloy (e.g., CuPt alloy) may be highly efficient (e.g., as efficient as pure Pt) in terms of spin current generation efficiency, but with a smaller damping enhancement. The CMOS-compatible composite alloy may manipulate magnetization using SOTs. Further, the CMOS-compatible composite alloy may have properties that allow it to be readily integrated into CMOS processes. For example, in the case of a CuPt alloy, the alloy may withstand high annealing temperatures, and since Cu is a widely used metallization element in CMOS technology it may be readily integrated into CMOS processes.
III. A Topological Insulator NM Layer
(45) A. Overview
(46) In a second embodiment, a SOT device stack replaces a traditional NM layer with a topological insulator (TI) (e.g., Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, Bi.sub.1-xSb.sub.x, etc.) NM layer. A large SOT may be generated using a TI (e.g., Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, Bi.sub.1-xSb.sub.x, etc.) that may efficiently switch the magnetization of an adjacent FM layer with an extremely low J.sub.C. For example, in this embodiment, a SOT device may be structured as a stack that includes, a substrate (e.g., Al.sub.2O.sub.3), a TI NM layer (e.g., having a thickness of 5-20 QL, where 1 QL is approximately equal to 1 nm), a FM layer (e.g., CoFeB or NiFe, having a thickness of 7 nm), a barrier layer of MgO (e.g., having a thickness of 2 nm), and a capping layer of Al.sub.2O.sub.3 (e.g., having a thickness of 3 nm). The TI layer may be grown on the substrate using molecular beam epitaxy (MBE) or sputtering. The CoFeB layer and insulating capping layer may be sputtered onto the TI layer. The deposited films may be patterned using optical photolithography and Ar ion milling, among other processes.
(47) B. An Example Test Device
(48) In a specific test device for which experimental results are presented herein, after the TI layer are grown on the substrate the CoFeB layer and insulating capping layer are sputtered onto the TI layer at room temperature, the stack is subsequently patterned into rectangular microstrips having a length of 130 m and a width of 20 m using optical photolithography and Ar ion milling. A CPW is fabricated using optical photolithography and sputter deposition to make electrical contacts with the microstrips. A gap (G) between ground and signal electrodes of the CPW is varied in the range 10-20 m in order to tune the device impedance close to 50. ST-FMR measurement are conducted as discussed above in relation to the CMOS compatible composite alloy.
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(50) C. Extraction of Spin-Orbit Torque Efficiency and the Contribution from Interfaces
(51) As shown in
(52)
where I.sub.RF is the RF current flowing through the device, is the gyromagnetic ratio, dR/d.sub.H is the angular dependent magnetoresistance at .sub.H=35, is the linewidth of ST-FMR signal, F.sub.S (H) is a symmetric Lorentzian, H is in-plane external magnetic field, .sub.DL is the damping-like spin-orbit torque on unit CoFeB moment at .sub.H=0, M.sub.S is the saturation magnetization of CoFeB, t is the thickness of CoFeB, J.sub.S is the measured spin current density with in-plane spin polarizations at the Bi.sub.2Se.sub.3/CoFeB interface, which is correlated with the measured symmetric component V.sub.S as shown in
(53)
(54) Since the thickness of a TSS (t.sub.TSS) and two dimensional electron gas (2DEG) (t.sub.2DEG) in Bi.sub.2Se.sub.3 are reported to be approximately 1 nm and approximately 4 nm, respectively, negligible bulk states (BS) are expected when the Bi.sub.2Se.sub.3 thickness is less than 8 QL. In region I (t.sub.BiSe>10 QL), there are considerable BS and 2DEG contributions to the transport, which could dilute the TSS, resulting in a small .sub.TI. In region II (10 QL), BS start to shrink, leading to a slight increase of .sub.TI. In region III (t.sub.BiSe8 QL), the BS disappear and the contribution from the 2DEG decreases. On the other hand, due to the lack of inversion symmetry, Rashba splitting states in the 2DEG subbands can give rise to S.sub.. However, the accumulated spins due to the Rashba states are expected to have an opposite helicity (i.e. negative .sub.TI) compared to the TSS. Since .sub.TI always shows positive values, it may be concluded that the TSS dominated SOT is the main contribution to the large enhancement of .sub.TI in region III.
(55) The .sub.TI versus t.sub.BiSe from ST-FMR measurements is obtained by using a uniform charge current density J.sub.C (A cm.sup.2) in the entire Bi.sub.2Se.sub.3 layer as
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where J.sub.S is the spin currents. The interface SOT efficiency from only TSS, .sub.TSS (nm.sup.1), can be obtained by the interface charge current density J.sub.C-TSS (A cm.sup.1) in the TSS as
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Therefore, one may evaluate .sub.TSS by
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where n.sub.2D and n.sub.TSS are the sheet carrier concentration in the entire Bi.sub.2Se.sub.3 film and TSS, respectively.
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where J.sub.S-TSS/J.sub.C-TSS is the intrinsic interface SOT efficiency from TSS (.sub.intTss) which is inversely proportional to V.sub.F and almost remain constant at different t.sub.BiSe, and J.sub.S-2DEG is the spin current density from Rashba splitting in 2DEG. This yields the equation:
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where .sub.2DEG is the interface SOT efficiency from Rashba splitting in the 2DEG, J.sub.C-2DEG=n.sub.2DEG eE and J.sub.C-TSS=n.sub.TSS eE. One may assume that the difference of surface band bending between 7 and 8-QL Bi.sub.2Se.sub.3 films is small, which results in an almost constant .sub.2DEG By using the difference of .sub.TSS between 7 and 8 QL film, the .sub.2DEG is determined and it shows negative value and is 0.4 nm.sup.1. Moreover, the values for .sub.intriTSS are also estimated for t.sub.BiSe10 QL with negligible BS. Interestingly, such that .sub.intriTSS shows a constant value of 0.8 nm.sup.1 for 7, 8 and 10 QL Bi.sub.2Se.sub.3 films. This amended interface SOT efficiency is in the similar range of the value of .sub.TSS (0.82 nm.sup.1) at t.sub.BiSe=5 QL. This further indicates that TSS dominates SOT in thinner films and that there is high SOT efficiency from TSS.
(62) D. SOT Driven Magnetization Switching in Bi.sub.2Se.sub.3/NiFe at Room Temperature
(63) The SOT device also may be structured as a film stack that includes, for example, a TI NM layer (e.g., having a thickness of 8 QL where 1 QL is approximately equal to 1 nm) a FM layer of Nickel Iron (NiFe) Py (e.g., having a thickness of 6 nm), a barrier layer of MgO (e.g., having a thickness of 1 nm), and a capping layer of SiO.sub.2 (e.g., having a thickness of 4 nm). The Py/MgO/SiO.sub.2 layers may be sputtered onto the Bi.sub.2Se.sub.3 layer with an in-situ magnetic field along the y-axis (i.e. perpendicular to current channel). For testing purpose five 2-m wide grooves may be etched on the Py layer and backfilled with nonmagnetic metal Cu, which divide the continuous Py layer into five rectangles and make them magnetically isolated. The magnetic easy axis of Py rectangles is along the y directions due to the shape anisotropy. This allows one to capture the magnetization switching after pulsed DC current is off, where there is no current induced spurious effects. The magnetization direction of Py is collinear with the incoming spin directions and thus the spins can directly switch the magnetization direction of Py without any external assisted magnetic field.
(64) MOKE imaging measurements may be carried out on such an example device to observe SOT induced magnetization switching.
(65) More specifically, the initially Py magnetization is saturated along the +y-axis by applying an in-plane external magnetic field (H). Then in the testing H is removed and I is applied along the +x-axis to the device. When the current density in Bi.sub.2Se.sub.3 is zero, the MOKE image as shown in
(66) Moreover, based on the antidamping spin torque driven magnetization switching model with consideration of thermal fluctuation and reverse domain nucleation, the SOT efficiency of Bi.sub.2Se.sub.3 from SOT induced magnetization switching is determined. For antidamping spin torque driven magnetization switching, the critical switching current density f.sub.C0 for the switching scheme of our Bi.sub.2Se.sub.3/Py device can be described by:
(67)
where J.sub.C0 is the critical switching current density without thermal fluctuation, M.sub.s, t, , H.sub.c and M.sub.eff are the saturated magnetization, thickness, damping constant, coercive field and effective magnetization of Py layer, respectively, and .sub.TI is the SOT efficiency. This equation is based on the macrospin model in the absence of thermal fluctuation. The magnetization switching process can be described by the localized nucleation of reverse domains with an activation volume V.sub.N first, followed by domain wall propagation. Magnetization exhibits coherent reversal inside the activation volume V.sub.N. Therefore, the equation can be applied by introducing V.sub.N instead of the whole volume of Py layer. In testing, the switching current density J.sub.C for the magnetization switching is 6.210.sup.5 A m.sup.2 at room temperature. Then the J.sub.C0 can be obtained by
(68)
with thermal fluctuation considerations, where t.sub.p is the current pulse width of approximately 500 s, t.sub.0 is the attempt time of approximately 1 ns, the anisotropy energy density K.sub.Py is estimated by H.sub.cM.sub.s/2 with measured H.sub.c approximately 6.9 Oe and M.sub.s=6.840.0310.sup.5 A m.sup.1. The domain wall width .sub.m of Py layer is assumed to be approximately 220 nm, and t is 6 nm, then we can estimate V.sub.N.sub.m.sup.2t. Consequently, J.sub.C0 may be approximately 5.26J.sub.C. The M.sub.eff and may be 0.57 T and 0.01543, respectively based on experimental measurements. Further, based on experimental testing SOT efficiency .sub.TI for Bi.sub.2Se.sub.3/Py may be approximately 1.71. This value is consistent with the value obtained from ST-FMR measurements (.sub.TI1). This agreement further indicates the excellent efficiency of TIs in spin generation and SOT driven magnetization switching.
(69) F. Summary of Topological Insulator Techniques
(70) To summarize, a SOT device may be constructed that replaces a traditional NM layer with a TI (e.g., Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, Bi.sub.1-xSb.sub.x, etc.) NM layer. Such TI NM layer may be a highly efficient spin current generator. In the case of a device that uses a Bi.sub.2Se.sub.3 TI NM layer (as discussed above), the Bi.sub.2Se.sub.3 layer may, for example, exhibit a SOT efficiency up to approximately 1.75 at room temperature, which corresponds to an interface SOT efficiency of .sub.TSS=0.8 nm.sup.1. The SOT induced magnetization switching may be successfully achieved at room temperature without any external magnetic field. The current density required for the magnetization switching in a SOT device employing a TI NM layer may be extremely low. For example, in the case of an example device that uses a Bi.sub.2Se.sub.3 TI NM layer (as discussed above), current density may be approximate 610.sup.5 A/cm.sup.2 which is almost two orders of magnitude smaller than that in heavy metals. Utilizing a TI NM layer, a device may achieve very low power consumption, addressing scalability issues in modern magnetic devices. Furthermore, as an assistive magnetic field may not be required, a TI NM layer may be readily integrated into existing technologies for magnetic devices.
VI. A TI/Non-Magnetic Metal Interface NM Layer
(71) A. Overview
(72) In a third embodiment, a SOT device stack replaces a traditional NM layer with a TI/non-magnetic metal interface (e.g., a Bi.sub.2Se.sub.3/Ag, Bi.sub.xSe.sub.1-x/Ag, Bi.sub.1-xSb.sub.x/Ag, etc. interface) layer adjacent to the FM layer. A TI/non-magnetic metal interface (e.g., Bi.sub.2Se.sub.3/Ag interface) Rashba effect can induce efficient charge-spin conversion. This Rashba interface may serve as a spin current source to achieve TI-based room temperature spin devices with high scalability and efficiency. For example, in one embodiment, a SOT device may be structured as a film stack that includes a substrate made of Al.sub.2O.sub.3, a Bi.sub.2Se.sub.3/Ag interface layer (e.g., having a Bi.sub.2Se.sub.3 thickness of 10 QL where 1 QL is approximately equal to 1 nm, and an Ag thickness (t.sub.Ag) up to 5 nm), a FM layer of Co.sub.40Fe.sub.40B.sub.20 (e.g., having a thickness of 7 nm), a barrier layer of MgO (e.g., having a thickness of 2 nm), and a capping layer of SiO.sub.2 (e.g., having a thickness of 4 nm).
(73) B. An Example Test Device and In-Plane Torque/Out-of-Plane Torque Ratio
(74) In a specific test device for which experimental results are presented herein, samples are prepared as discussed above with t.sub.Ag=0, 1, 2, 3, 5 nm.
(75) C. Extraction of the Charge-Spin Conversion Efficiency
(76) Using techniques as discussed above in reference to the second embodiment, one may extract the charge-to-spin conversion efficiency in both Bi.sub.2Se.sub.3/Ag/CoFeB devices and Ag/CoFeB devices. To evaluate the spin orbit torque ratio (.sub.), one may assume that the charge conductivity of the Bi.sub.2Se.sub.3/Ag is no more than the conductivity for the Bi.sub.2Se.sub.3 single layer capped with 2 nm of MgO and 4 nm of SiO.sub.2, which is 6.9910.sup.4 .sup.1m.sup.1 from probe measurements. This value is comparable with the value obtained in Bi.sub.2Se.sub.3 with a Al.sub.2O.sub.3 cap. With this assumption, one may obtain a lower bound of .sub. in Bi.sub.2Se.sub.3/Ag/CoFeB.
(77)
(78) D. Rashba Effect Driven Magnetization Switching in Bi.sub.2Se.sub.3/Ag/NiFe at Room Temperature
(79) The interfacial Rashba effect driven magnetization switching at room temperature in an example Bi.sub.2Se.sub.3 (10 QL)/Ag (2 nm)/NiFe (6 nm) sample is demonstrated by MOKE microscopy.
(80) E. Summary of TI/Non-Magnetic Metal Interface Techniques
(81) To summarize, a SOT device may be constructed that replaces a traditional NM with a TI/non-magnetic metal interface (e.g., a Bi.sub.2Se.sub.3/Ag, Bi.sub.xSe.sub.1-x/Ag, Bi.sub.1-xSb.sub.x/Ag, etc. interface) layer adjacent to the FM layer. This interface may exhibit efficient charge-to-spin current conversion process originating from the interface Rashba effect. Such a process may be dependent on the thickness of the non-magnetic metal. In the case of a Bi.sub.2Se.sub.3/Ag interface the Rashba induced charge-to-spin conversion may be Ag-thickness dependence, in a specific example (as discussed above) saturating at t.sub.Ag approximately equals 2 nm. High charge-spin conversion efficiency may be achieved. In the case of an example Bi.sub.2Se.sub.3/Ag/CoFeB device (as discussed above) a value of spin orbit torque ratio of approximately 0.5 may be achieved at room temperature. This charge-spin conversion efficiency may be further increased by improving the interface quality. The Rashba effect induced magnetization switching may be successfully achieved at room temperature without any external magnetic field. The current density required for the magnetization switching in a SOT device employing a TI/nonmagnetic metal interface (e.g., Bi.sub.2Se.sub.3/Ag) may be extremely low.
V. Further Alternatives
(82) It should be understood that various adaptations and modifications may be made to the above-discussed techniques. For example, while it is discussed above that the various metal and oxide layers (such as the CMOS-compatible composite alloy layer) may be deposited using magnetron sputtering, it should be understood that a variety of other metal and oxide growth techniques may be utilized. Likewise, while it is discussed above that MBE may be used to grow a TI layer, it should be understood that a variety of other TI growth techniques may be utilized. In addition, while a number of example layers of device stack are discussed, it should be understood that additional or different layers, interfaces or junctions may be employed. For instance, in embodiments utilizing a TI or TI/non-magnetic metal interface, a magnetic functional part on top of the TI or TI/non-magnetic metal interface can also be magnetic tunnel junctions (MTJ) composed of any of a variety of materials. The MTJ may have a traditional sandwiched structure. The MTJ can also have a synthetic antiferromagnetic (SAF) or single antiferromagnetic exchange biased free magnetic layer and a SAF or single antiferromagnetic pinned reference magnetic layer.
(83) In general, it should be appreciated that details included in the various example embodiments are merely provided for purposes of illustration, and are not intended to limit the scope, applicability, or configuration of the invention. For example, it should be understood that the various elements described above may be made from differing materials, implemented in different combinations or otherwise formed or used differently without departing from the intended scope of the invention. What is claimed is: