Superconducting interconnects with ultra-low thermal conductivity
10938128 ยท 2021-03-02
Assignee
Inventors
Cpc classification
International classification
H05K9/00
ELECTRICITY
Abstract
Superconducting interconnects with ultra-low thermal conductivity capable of providing a direct connection between a millikelvin temperature environment and a 70 K temperature environment.
Claims
1. Superconducting interconnects with ultra-low thermal conductivity, comprising: a first ultra-low thermal conductivity substrate; a plurality of discreet high temperature superconducting lines bonded to said first substrate with an adhesive; a high temperature superconducting layer having first and second sides, said first side of said high temperature superconducting layer positioned to face said superconducting lines; a second ultra-low thermal conductivity substrate bonded to said second side of said high temperature superconducting layer; and a dielectric positioned between and separating said discreet high temperature superconducting lines from said high temperature superconducting layer.
2. The superconducting interconnects according to claim 1, wherein said first and second substrates are formed of a dielectric material.
3. The superconducting interconnects according to claim 2, wherein said dielectric material is a liquid crystal polymer laminate or a polyimide film or a glass epoxy laminate.
4. The superconducting interconnects according to claim 2, wherein said first and second substrates are formed of a polymeric material.
5. The superconducting interconnects according to claim 1, wherein said high temperature superconducting layer is formed of a bi-axially aligned yttrium barium copper oxide film.
6. The superconducting interconnects according to claim 1, further comprising a cryogenic epoxy for bonding said high temperature superconducting lawyer to said substrate.
7. The superconducting interconnects according to claim 1, wherein said discreet high temperature superconducting lines are spaced-apart from each other whereby each of said discreet high temperature superconducting lines defines a discreet electrical pathway.
8. The superconducting interconnects according to claim 7, wherein said discreet high temperature superconducting lines are spaced from about 20 m to about 3,000 m apart from each other.
9. The superconducting interconnects according to claim 8, wherein said substrates have a width of from about 10 mm to about 50 mm, and wherein from about 50 to about 100 high temperature superconducting lines are bonded to said first substrate.
10. The superconducting interconnects according to claim 7, wherein said dielectric is a dielectric coating covering said superconducting lines.
11. The superconducting interconnects according to claim 10, wherein said dielectric coating extends between said superconducting lines.
12. The superconducting interconnects according to claim 11, wherein said dielectric coating encapsulates said high temperature superconducting lines.
13. The superconducting interconnects according to claim 1, wherein each of said lines defines opposing first and second surfaces, each of said first surfaces being bonded to said first substrate.
14. The superconducting interconnects according to claim 13, wherein said dielectric has a predetermined thickness such that each of the top surfaces of said plurality of high temperature superconducting lines is spaced a preselected distance from said second surface of said second superconducting layer to define a predetermined characteristic impedance.
15. The superconducting interconnects according to claim 14, wherein said dielectric has a thickness of from about 10 m to about 500 m as measured between said top surfaces of said plurality of high temperature superconducting lines and said second surface of said second superconducting layer.
16. The superconducting interconnects according to claim 1, further comprising a silver contact layer deposited on said superconducting layer.
17. A method of manufacturing superconducting interconnects with ultra-low thermal conductivity, comprising: providing a first ultra-low thermal conductivity substrate; bonding a first high temperature superconducting layer to said first substrate; etching a plurality of discreet transmission lines within said first high temperature superconducting layer along the length thereof; applying a dielectric coating to cover said discrete transmission lines; providing a second ultra-low thermal conductivity substrate having a second high temperature superconducting layer bonded thereto; and joining said first and second substrates such that said second high temperature superconducting layer is positioned adjacent said dielectric coating.
18. The method according to claim 17, wherein said plurality of discreet lines includes a pair of outermost lines, said outermost lines defining a width W; and further comprising the step of trimming said first substrate to substantially correspond to said width W.
19. The method according to claim 17, further comprising the steps of i) bonding a third high temperature superconducting layer to said dielectric coating; ii) etching a plurality of discreet lines within said third high temperature superconducting layer along the length thereof; and iii) applying a second dielectric coating to cover said plurality of discreet lines formed within said third high temperature superconducting layer.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE INVENTION
(21) This invention relates to superconducting interconnects having a plurality of discreet superconducting transmission lines positioned on a substrate with ultra-low thermal conductivity. The transmission lines combine the electrical conductivity of the superconductor with low (<1 dB/m) insertion loss in the 5-10 GHz range and ultra-low thermal conductivity when operating between 70 K temperature environments and mK environments, e.g., <20 mK.
(22) In one preferred embodiment, the invention uses a high temperature superconducting (HTS) material such as yttrium barium copper oxide (YBCO), which is epitaxially grown on a metal substrate, and then exfoliated from such metal substrate and transferred to a substrate with ultra-low thermal conductivity, e.g., low-loss dielectric substrates such as liquid crystal polymer (LCP) laminates, polyimide films or glass epoxy laminates. The thermal loss is thus reduced by a factor of 10, to 3 W for a 10 mm wide, 100 conductor transmission line when operating in the 70 K to mK temperature range. For DC bias applications, the proposed interconnect will reduce the DC current load by at least 100, down to 10 W/A. For RF signal applications, the 10 GHz insertion loss is expected to remain below 1 dB/m for a 50 100-300 m wide interconnect, which is 20 lower than copper.
(23) As illustrated in
(24) Epitaxial growth requires both high (>700 C.) temperature, and a suitable epitaxial substrate. Today, large area, high quality YBCO films are routinely manufactured in the production of second generation (2G) tape. The films are grown on metal substrates, such as Ni or Hastelloy. A protective silver layer is then applied over the superconducting film, and, in turn, a copper stabilizing film is placed over the superconducting layer to sandwich the superconducting layer between the substrate and stabilizing layer to create the mentioned 2G tape. Even though these tapes demonstrate good microwave properties, the supporting metal substrate and metal stabilizing layer introduce high heat conduction and thermal losses. Moreover, the silver coating commonly applied to the exposed surface of the superconducting layer would also increase heat conduction and thermal losses.
(25) It has been discovered herein that the 1 m YBCO layer of a tape structure without the silver layer and without the stabilizing layer can be exfoliated from the tape structure and adhered to a substrate with ultra-low thermal conductivity. In this regard, the exfoliated YBCO layer is a highly flexible superconducting ceramic material with ultra-low thermal conductivity. Once adhered to the ultra-low thermal conductivity substrate, and processed as described herein, the present invention provides superconducting interconnects having transmission lines with ultra-low thermal conductivity over the entire temperature range from 70 K to the mK temperature range.
(26) In one preferred embodiment, a high quality epitaxial YBCO layer is transferred onto a substrate with ultra-low thermal conductivity, such as a thin layer of Kapton film (manufactured by DuPont) or a laminated crystal polymer (LCP, manufactured by Rogers Corrporation) film or a glass epoxy laminate.
(27) In one embodiment, the transmission lines of the interconnect are manufactured by using the process shown in
(28) Preparation of the first substrate assembly begins with providing a HTS tape 10 having the structure defined hereinbelow. Tape 10 includes a metal substrate 12 and an oxide buffer 14 on which a YBCO layer 16 is epitaxially grown (see
(29) In the next step, an adhesive 18 (such as a cryogenic epoxy, e.g., Stycast 1266) is used to bond tape 10 (YBCO layer facing down) to the first ultra-low thermal conductivity polymeric substrate 20 (see
(30) Next, the metal substrate 12 and oxide buffer 14 are removed from the YBCO layer 16 in an exfoliation step.
(31) The process of exfoliation is based on release of mechanical strain energy stored in mechanically bonded layers of materials with dissimilar coefficient of thermal expansion (CTE). Upon cooling the two-layer material compressive strain builds up in a layer with higher CTE. If the energy released by relaxation of the compressive strain in the transfer lamina is higher than bonding energy of the film, the delamination occurs.
(32) It is also well known that mechanical energy U stored in the mechanically strained per unit area layer is:
U=E.sup.2(1)
(33) Where t is the layer thickness, E is Young's (elastic) modulus and s is strain. Young's modulus of Kapton is relatively low, 2.5 GPa, which implies that elastic energy in a thin Kapton substrate may not be sufficiently high to cause delamination of YBCO layer. In contrast, Young modulus of the Hastelloy metal substrate is 220 GPa, that is approximately 100 times higher than Kapton. Eq. 1 implies that the elastic energy is proportional to the transfer lamina thickness. It is expected that is a straight transfer of YBCO layer on a polymeric substrate would stop working once a critical lamina thickness is reached.
(34) Table 1 compares room temperature CTE and relative elongation values for YBCO, various metals and Kapton. Traditionally, the metal substrate is chosen so that CTE of the metal closely matches that one of YBCO. For example, SuperPower Inc. formulation of the 2G tape uses Hastelloy 276 and AMSC Corp. is using Nickel. Both these metals have CTE that closely matches that of YBCO. Clearly CTE of Kapton is approximately twice as high as that of YBCO, thus potentially enabling the compressive delamination of YBCO layer from the metal substrate.
(35) TABLE-US-00001 TABLE 1 CTE 10.sup.6/K dL(%) at 4.2 K dL(%) at77 K Hastelloy 276 11.2 0.3 0.26 Aluminum 22 0.42 0.4 Copper 16.5 0.32 0.31 Stainless 304 17 0.3 0.29 Iron 11 0.22 0.21 Nickel 13.6 0.2 0.195 Kapton 20 0.48 0.46 YBCO 9 0.2 0.21
(36) If the delamination process cannot be accomplished with the polymeric substrate alone, the transfer lamina can be temporarily attached to a thick sheet of metal (temporary support) with CTE lower than the metal substrate using an adhesive media, as shown in
(37) Next, parallel lines are patterned and etched into the YBCO layer 75 using, for example, contact photolithography, to produce a plurality of discreet signal lines 81 in the YBCO layer (see
(38) This step is followed by application of a thin dielectric coating 24 using a spin coating procedure (see
(39) Following the spin coating procedure, the first substrate 71 is trimmed to substantially conform to the overall dimensions of the etched, superconducting layer. A second assembly including a second ultra-low thermal conductivity substrate 83 and a second YBCO layer 82 (ground plane) is prepared by bonding the YBCO layer to the second substrate. The YBCO layer 82 bonded to the second substrate 83 is not etchedrather, it is left unetched and functions as a ground plane when the second assembly is attached to the first assembly (see
(40) Other variants of the transmission lines are shown in
(41) In application utilizing YBCO materials, it is desirable/necessary to have a reliable electrical contact to the YBCO layer. A silver layer is commonly used as an interface between the YBCO layer and common metal conductors such as copper. The silver layer is traditionally deposited by a physical deposition method, such as magnetron sputtering or thermal evaporation. The freshly-deposited silver layer has poor adhesion to the YBCO, requiring an annealing step, which is performed in an atmosphere of oxygen at 400-500 C. It would be obviously impossible to perform this step once the YBCO layer is transferred to the Kapton layer, because Kapton starts to decompose at 300 C. The process shown in
(42) High carrier density is important to minimize the kinetic inductance contribution, a phenomenon related to the high carrier mobility in superconductors. A high portion of kinetic inductance will result in the total impedance depending on the local carrier density and, more importantly, on the local temperature. The YBCO film, which is 1 m thick, is much thicker than the penetration depth of YBCO, 0.16 m. The published data on kinetic inductance contribution in YBCO suggest that the effect is <1% for lines wider than 10 m. Accordingly, the impedance of the transmission line is defined primarily by the geometry.
Example 1
(43) To demonstrate that a high temperature superconducting layer of YBCO grown on a metal substrate can be bonded to a dielectric and then thermally stressed to facilitate the exfoliation of the buffer and metal substrate, a 12 mm wide coupon of HTS tape according to the structure of
(44) The critical temperature of the superconducting YBCO layer after transition of the YBCO layer to the G10 substrate was measured by the mutual inductance technique (see
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Example 2
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Example 3
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