Chip package structure
10910336 ยท 2021-02-02
Inventors
Cpc classification
H01L2224/73204
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/13291
ELECTRICITY
H01L2224/0405
ELECTRICITY
H01L24/97
ELECTRICITY
H01L2225/06517
ELECTRICITY
H01L24/50
ELECTRICITY
H01L23/5384
ELECTRICITY
H01L2224/94
ELECTRICITY
H05K1/182
ELECTRICITY
H01L2224/13291
ELECTRICITY
H01L2225/0651
ELECTRICITY
H01L24/94
ELECTRICITY
H01L2224/10152
ELECTRICITY
H01L2224/10152
ELECTRICITY
H01L2224/16227
ELECTRICITY
H01L2224/4099
ELECTRICITY
H01L23/49833
ELECTRICITY
H01L23/49827
ELECTRICITY
H01L2225/06548
ELECTRICITY
H01L2924/00014
ELECTRICITY
H05K1/0271
ELECTRICITY
H05K3/323
ELECTRICITY
H01L2224/40229
ELECTRICITY
H01L2224/4099
ELECTRICITY
H01L2224/81191
ELECTRICITY
H01L2225/06555
ELECTRICITY
H01L2224/97
ELECTRICITY
H01L2225/06568
ELECTRICITY
H05K2203/0285
ELECTRICITY
H01L2224/95001
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2924/15153
ELECTRICITY
H01L2225/06572
ELECTRICITY
H01L2224/04034
ELECTRICITY
H01L2224/16235
ELECTRICITY
H01L23/49811
ELECTRICITY
H01L2224/97
ELECTRICITY
H05K1/0296
ELECTRICITY
H01L2224/94
ELECTRICITY
H01L2224/84007
ELECTRICITY
H01L2224/81192
ELECTRICITY
H01L24/73
ELECTRICITY
International classification
Abstract
A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.
Claims
1. A chip package structure, comprising: a first chip (10) having a plurality of first chip joints (11) at a lower side thereof; a circuit board (20) below the first chip; an upper side of the circuit board (20) being arranged with a plurality of circuit board joints (21) at positions corresponding to those of the first chip joints of the first chip; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF (anisotropic conductive film) combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to pads at another end so that the first chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip; and wherein the first chip joints (11) are convex pads (112) protruded from a bottom surface of the first chip (10), the bottom surface is turned upside down so that the convex pads (112) are at an upper side: the circuit board joints (21) are convex pads (212); in packaging, the convex pads (112) of the first chip (10) are combined to the circuit board joints (21) through conductive wire (150); when there are plurality of first chip joints (11) and circuit board joints (21), the conductive wires (150) are arranged on a conductor wire arranged substrate (152), and then the conductor wire arranged substrate (152) runs across the circuit board joints (21) and the first chip joints (11).
2. The chip package structure as claimed in claim 1, wherein when material of the convex pad is metal, the combination is performed by supersonic combination and when material of the convex pad is tin, welding is used in combination.
3. The chip package structure as claimed in claim 1, wherein a periphery of the circuit board joints is formed with a third recess which is a cambered recess or a U shape recess and is near an edge of the circuit board; therefore, when heating and expansion, the joint is provided with a margin for expansion to avoid that the circuit board is separated from the first chip.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE INVENTION
(24) In order that those skilled in the art can further understand the present invention, a description will be provided in the following in details. However, these descriptions and the appended drawings are only used to cause those skilled in the art to understand the objects, features, and characteristics of the present invention, but not to be used to confine the scope and spirit of the present invention defined in the appended claims.
(25) With reference to
(26) A first chip 10 has a plurality of first chip joints 11 at a lower side thereof.
(27) A circuit board 20 is below the first chip 10. An upper side of the circuit board 20 is arranged with a plurality of circuit board joints 21 at positions corresponding to those of the first chip joints 11 of the first chip 10.
(28) In packaging, the ,first chip joints 11 are combined with the circuit board joints 21 of the circuit board 20, as illustrated in
(29) The first application of this embodiment relates to the ACF (anisotropic conductive film) combination, in that, the ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board.
(30) With reference to
(31) Other circuit elements 500 may be installed to a lower side of the circuit board 20. The elements 500 are connected to the ACF 211 through the conductive wire 25.
(32) The second application of this embodiment is a convex pad combination, in that a convex pad is combined with a flat pad by chemically methods or physical methods. These pads are arranged on the circuit board 20 and the first chip 10.
(33) In the convex pad combination, the first chip joints 11 are convex pads (such as metal pads or tin balls) protruded from the first chip 10. The circuit board joints 21 are flat pads 212. Material of the flat pad 212 is the same as that of the convex pad 112 is identical to that of the convex pad 112. In packaging, the convex pads 112 of the first chip 10 are combined with the flat pads 212 of the circuit board 20, as illustrated in
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(35) With reference to
(36) As shown in
(37) The upper surface of the circuit board 20 has a first recess 23. A bottom side of the first recess 23 has recess joints 231 which are located corresponding to the second chip joints 31 of the second chip 30
(38) In packaging, the second chip 30 is positioned at an inner side of the first recess 23. The recess joints 231 are combined to the second chip joints 31 of the second chip 30, as shown in
(39) The fourth application of the present invention is illustrated in
(40) A lower side of the circuit board 20 has a second recess 27. A bottom of the second recess 27 is installed with a third chip 40.
(41) The combination of the first chip 10 and the circuit board 20 are identical to those disclosed in the first application, that is, ACF combination and convex pad combination, as illustrated in
(42) With reference to
(43) In working, the expansion coefficient of the circuit board 20 is greater than those of the first chip 10 and the second chip 30, see
(44) The second embodiment of the present invention will be described herein. In this embodiment, those elements identical to those in the first embodiment are illustrated by the same numerals and they have the same functions and effects. Therefore, the details will not be further described herein. Only the difference therebetween are described herein.
(45) A firs wafer 10 includes a plurality of first chips 10 (in the drawing, two chips are used for description of the present invention). A lower side of each of the first chips 10 has at least one first chip joint 11.
(46) A circuit board set 20 is located at a lower side of the first wafer 10. The circuit board set 20 includes the plurality of circuit board joints 21 the number of which is corresponding to that of the first chip joints 11 of the first wafer 10.
(47) In packaging, the first chip joints 11 are combined to the circuit board joints 21 of the circuit board set 20 as illustrated in
(48) The first application of this embodiment is ACF combination, where the ACF is used to combine with pads so that the chip may be combined to the circuit board set.
(49) With reference to
(50) Other circuit elements 500 may be installed at a lower side of the circuit board set 20 and are connected to the ACFs 211 through the conductive wires 25 passing through the circuit board set 20.
(51) The second application of this embodiment is the combination of convex pads, wherein convex pads and flat pads having the same material are installed to the circuit board set and the chip. The convex pads and flat pads are combined by chemically way or physically way so that the circuit board set is combined to the chip.
(52) In the convex pad combination, the first chip joints 11 are convex pads 112 (such as metal joints or tin balls) protruded from a lower surface of the first wafer 10. The circuit board joints 21 are flat pads 212. Material of the flat pads 212 is identical to that of the convex pads 112. In packaging, the convex pads 112 of the first wafer 10 are combined to corresponding flat pads 212 as illustrated in
(53) Referring to
(54) The upper surface of each circuit board 20 is formed with a first recess 23, respectively. A bottom of each first recess 23 has at least one recess joints 231 which are positioned corresponding to those of the second chip joints 31 of the second chip 30.
(55) In packaging, the second chip 30 is positioned within the first recess 23 of the circuit board 20. The recess joints 231 are combined to the second chip joints 31 of the second chip 30, as illustrated in
(56) In above embodiment, in manufacturing, the circuit board set 20 has an expansion coefficient greater than those of the first chip 10 and the second chip 30, but the process needs to be performed in high temperature, as a result, the circuit board set 20 will separate from the first chip 10 and the second chip 30 so that the combination fails.
(57) To resolve this problem, as illustrated in
(58) Another way for absorption of expansion is that the circuit board set 20 is cut firstly and then the lower side of the circuit board set 20 is adhered with an adhesive film 70 for packaging (referring to
(59) With reference to
(60) Advantage of the present invention are that the joints and conductive wires are hidden within the circuit board and chips and are not exposed out so that the whole packaging structure can be reduced. Therefore, the costs in manufacturing and packaging are also reduced.
(61) The present invention is thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the present invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.