QUANTUM DOT LASERS AND METHODS FOR MAKING THE SAME

Abstract

A quantum dot (QD) laser comprises a semiconductor substrate and an active region epitaxially deposited on the semi-conductor substrate. The active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers. A net compressive strain associated with the plurality of QD layers is maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region of the QD laser.

Claims

1. A quantum dot (QD) laser comprising: a silicon substrate; and an active region epitaxially deposited on the silicon substrate, wherein the active region is comprised of III-V type semiconductor material that results in one or more misfit dislocations located at a boundary between the silicon substrate and the III-V type semiconductor material, wherein the active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers, wherein a net compressive strain associated with the plurality of QD layers is maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region of the QD laser.

2. The QD laser of claim 1, wherein the active region contains a plurality of threading dislocations originating from the misfit dislocation located at the boundary between the silicon substrate and the III-V type semiconductor material, and wherein the threading dislocations do not terminate at misfit locations within the active layer.

3. The QD laser of claim 1, wherein each barrier layer provides a net tensile strain that offsets the net compressive strain associated with the plurality of QD layers to maintain the net strain below the maximum allowable strain to prevent formation of misfit dislocations within the active region of the QD laser.

4. The QD laser of claim 3, wherein the barrier layer comprises Indium-Gallium-Phosphide (InGaP).

5. The QD laser of claim 4, wherein the InGaP barrier layer is comprised of approximately 90% Gallium.

6. The QD laser of claim 3, wherein the barrier layer is comprised of Indium-Arsenide-Phosphide (InAsP).

7. A quantum dot (QD) laser comprising: a semiconductor substrate; and an active region epitaxially deposited on the semiconductor substrate, wherein the active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers, wherein each barrier layer provides a strain that at least partially offsets a strain introduced by each QD layer.

8. The QD laser of claim 7, wherein each of the plurality of barrier layers provides a net tensile strain and each of the QD layers provides a net compressive strain.

9. The QD laser of claim 7, each of the plurality of barrier layers provides a net compressive strain and each of the QD layers provides a net tensile strain.

10. The QD laser of claim 7, wherein the semiconductor substrate is comprised of silicon and the active region is comprised of one or more III-V semiconductors.

11. The QD laser of claim 7, wherein a net strain within the active region is maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region.

13. The QD laser of claim 7, wherein the barrier layer comprises Indium-Gallium-Phosphide (InGaP) and wherein the QD layer comprises of Indium-Arsenide (InAs).

13. The QD laser of claim 7, wherein the barrier layer comprises Gallium-Arsenide-Phosphide (GaAsP) and wherein the QD layer comprises of Indium-Arsenide (InAs).

14. A quantum dot (QD) laser comprising: a semiconductor substrate; and an active region epitaxially deposited on the semiconductor substrate, wherein the active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers, wherein the active region includes a plurality of threading dislocations extending from one or more misfit dislocations formed between the semiconductor substrate and the active region, wherein the threading dislocations do not terminate at misfit dislocations within the active region.

15. The QD laser of claim 14, wherein the semiconductor substrate is comprised of silicon and the active region is comprised of one or more III-V semiconductors.

16. The QD laser of claim 14, wherein a net strain within the active region is maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. 1 is an orthographic view of a photonic integrated circuit in which a III-V active layer is epitaxially grown on a silicon (Si) substrate as known in the prior art.

[0010] FIG. 2 is an hybrid image including a top portion that is a planar view of a III-V active layer and the lower portion is a cross-sectional view of the photonic integrated circuit as known in the prior art.

[0011] FIGS. 3a and 3b are cross-sectional views of active layers according to some embodiments of the present disclosure; and FIG. 3c is a cross-sectional view of the semiconductor substrate, cladding, contact and buffer layers in more detail according to some embodiments.

[0012] FIG. 4 is a planar view of an active layer grown according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

[0013] A quantum dot (QD) laser comprises a semiconductor substrate and an active region epitaxially deposited on the semiconductor substrate. The active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers. A net compressive strain associated with the plurality of QD layers should be maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region of the QD laser.

[0014] FIG. 1 is an orthographic view of a photonic integrated circuit 100 in which a III V active layer is epitaxially grown on a silicon (Si) substrate as known in the prior art. In particular, PIC 100 includes a silicon (Si) substrate 102 and a III-V active layer 104 epitaxially deposited on a planar surface of Si substrate 102. Typicallyalthough not alwaysa buffer layer (not shown) is formed between the Si substrate 102 and the active layer 104. The silicon substrate is defined by a lattice constant, as is the III-V active layer 104 and the buffer layer. Difference between the respective lattice constants results ire misfit dislocation 106a between Si substrate 102 and the buffer layer (e.g., Gallium Arsenide (GaAs) (or active layers 104). For each misfit dislocation 106a formed at the boundary between the Si substrate 102 and the buffer layer (or III-V active layer 104), one or more threading locations 108a and 108b are formed that extend away from the misfit dislocations 106a toward a surface. The threading dislocations serve as a heterogeneous source for new misfit dislocations, which may be formed within one of the III-V active layers 104. In addition to the misfit dislocation 106a formed at the boundary of the silicon substrate 102 and buffer layer, another misfit dislocation 106b is formed in the III-V active layer 104. Misfit dislocation 106b is formed, at least in part, as a result of the presence of the one or more threading dislocations 108a, 108b and the accumulating compressive strain energy resulting from differences in lattice constants between the III-V quantum dot material and the III-V barrier material. By stacking a plurality of layers of quantum dots the net strain is increased until a maximum allowable strain is reached wherein a misfit dislocation 106b is formed perpendicular to threading dislocations 108a and/or 108b to plastically relax the net strain. It should be noted that in embodiments in which the III-V active layer is epitaxially grown on a III-V substrate, no misfit dislocations are formed between the respective substrate and active layers, and therefore no threading dislocations are formed. Although stacking a plurality of layers of quantum dots increases net strain, because no threading dislocations are present it does not present the same risk of misfit dislocations being formed within the III-V active layer.

[0015] FIG. 2 is a hybrid image including a top portion 120 that is a planar view of active layer and the lower portion 122 is a cross-sectional view of the photonic integrated circuit as known in the prior art. The planar view shown in the top portion of FIG. 2 illustrates the formation of a plurality of misfit dislocations 106a-106f formed within the active layer 120 as a result of accumulating compressive strain energy. The lower portion 122 is a cross-sectional view that illustrates that each of the misfit dislocations 106a-106f shown in the top portion occurs at the topmost layer within the active region 104. For example, in the embodiment shown in FIG. 2 the misfit dislocation occurs within the fourth layer of quantum dots.

[0016] FIGS. 3a and 3b are cross-sectional views of an active region 300 according to some embodiments of the present disclosure. The embodiment shown in FIG. 3a, the active region 300 is comprised of a plurality of barrier layers 302 separated by a plurality of quantum dot (QD) layers 304, which are epitaxially deposited in the direction indicated (vertical) on a semiconductor substrate (e.g., silicon). In some embodiments, the active region 300 is epitaxially deposited on a semiconductor substrate 310for example a silicon substrate. In some embodiments, one or more additional layers 311 (e.g., cladding layers, contact layers, and/or buffer layers) are located between the semiconductor substrate 310 and the active layer 300. In some embodiments, the one or more additional layers 311 are comprised, at least in part, of III-V type semiconductor material and therefore misfit dislocations may form between the semiconductor substrate 310 (e.g., silicon). In some embodiments, III-V semiconductor material (e.g., one or more additional layers 311 and/or active region 300) is epitaxially deposited on silicon (Si) substrate 310, resulting in one or more misfit dislocations at the interface between the Si substrate and the III-V layers, and as a a result one or more threading dislocations extending to the surface from the one or more misfit dislocations (as described with respect to FIG. 1). The threading dislocations (not shown in this view) propagate into the active region 300, which in this embodiments includes a plurality of quantum dot (QD) layers 304 separated by lattice-matched barrier layers 302. As described above, the threading dislocations serve as a heterogenous source for misfit dislocations within the active region 300 in response to a critical net strain energy being surpassed. Cumulative or net compressive strain associated with the plurality of QD layers is shown on the right side of FIG. 3a (line 306). In some embodiments, the composition of the QD layers causes a net tensile strain rather than compressive strain, but the effect is the same when the critical energy is reached. In this embodiment, compressive strain refers to a strain associated with the change in lattice constant (e.g., decrease in length). The compressive strain acts in a direction parallel with the planar surface of the QD layer (e.g., out of the page, into the page). In particular, the embodiment shown in FIG. 3a utilizes a Gallium-Arsenide (GaAs) barrier layers 302 and a plurality of Indium-Arsenide (InAs) QD layers 304. Each successive QD layer 304 causes an increase in the net strain energy until a maximum allowable strain (indicated by line 308) is reached causing a misfit dislocation. For example, in the embodiment shown in FIG. 3a the misfit dislocations would form in the fourth (top) InAs QD layer 304. In effect, the misfit dislocation relieves the net strain energy, but the resulting dislocation within the active region significantly degrades the lifetime of the laser. Although the embodiment shown in FIG. 3a utilizes InAs for the QD composition and GaAs for the barrier layer composition, in other embodiments both the QD layer and the barrier layer may be comprised of other combinations of semiconductor materials.

[0017] In some embodiments, knowledge of the maximum allowable strain and net strain resulting from each QD layer 304 is utilized to determine the maximum number of layers 304 to be included in the QD active region 300. For example, in the embodiment shown in FIG. 3a, a maximum of three QD layers 304 may be included within the active region without resulting in a misfit dislocation within the active region 300.

[0018] The reduced number of QD layers 304 (e.g., three layers) reduces the overall gain of the QD laser so that the net strain energy remains below the critical strain energy. In some embodiments, the reduction in gain is offset by increasing the cavity length of the laser in order to increase the overall power output by the laser. In addition, the reduction in misfit locations within the active region of the QD laser dramatically increases the reliability/longevity of the QD laser. Experimental results indicate that reduction in the number of QD layers from five to three only has a nominal effect on the gain associated with the QD laser.

[0019] For example, FIG. 4 is a planar view of an active layer grown according to the embodiment described with respect to FIG. 3a. The planar view is taken within the active region 400 of the QD laser and illustrates formation of a plurality of threading dislocations 402. Despite the presence of a plurality of threading dislocations 402, no misfit dislocations are evident within the active region 400, as a result of the selected number of QD layers (e.g., three in the example shown).

[0020] In the embodiment shown in 3b, the QD laser includes a semiconductor substrate 330 (e.g. silicon), one or more additional layers 331 (e.g., cladding, contact, and/or buffer layers), and an active region 320 comprised of a plurality of barrier layers 322 separated by a plurality of QD layers 324. In some embodiments, the active region 320 and one or more additional layers 331 are comprised of III-V type semiconductor material, and the semiconductor substrate 330 is comprised of silicon. This difference in material between the substrate layer and the one or more additional layers 331 and active region 320 results in the formation of one or more misfit dislocations at the boundary between the semiconductor substrate layer 330 and the layers. As discussed above, the one or more threading dislocations propagate into the active region and due to increasing net strain energy eventually result in the creation of one or more additional misfit dislocations within the active region 320. In this embodiment, each of the plurality of barrier layers 322 provides a tensile force that opposes the compressive force provided by each of the plurality of QD layers 324. For example, in one embodiment each of the plurality of barrier layers 322 is comprised of Indium-Gallium-Phosphide (InGaP) or Gallium-Arsenide-Phosphide (GaAsP), which are tensile strained materials relative to GaAs. In some embodiments, the composition of the barrier layer is selected to provide the desired tensile force attributes. For example, in one embodiment utilizing GaAsP, the composition is approximately 90% As. In other embodiments, the composition may be varied according to the application. As shown in the chart to the right of FIG. 3b, the compressive strain generated by each of the plurality of QD layers 324 is offset by a tensile strain generated by each of the plurality of barrier layers 322, such that the net strain (line 326) is reduced overall. In some embodiments, the compressive strain associated with each QD layer 324 is identically offset by the tensile strain associated with each barrier layer 322. However, even if the compressive strain and tensile strains associated with each layer are not offset entirely, the offsetting strains may allow additional QD layers 324 to be epitaxially deposited without exceeding the maximum allowable strain (indicated, by line 328) such that a misfit dislocation is formed in the active layer. In some embodiments the compressive strain associated with each QD layer 324 is slightly greater than the tensile strain associated with each barrier layer 322. In other embodiments, the compressive strain associated with each QD layer 324 is slightly less than the tensile strain associated with each barrier layer 322.

[0021] In some of the embodiments, the composition of QD layer 324 is selected to provide a tensile force (rather than a compressive force). In this embodiment, the composition of the barrier layer 322 is selected to provide a compressive force that offsets the tensile force of the QD layer. As described above, in some embodiments the tensile force associated with each QD layer 324 is greater than the compressive force associated with each barrier layer 322, resulting in a net increase in tensile force as the number of layers is increased. In some embodiments, the number of layers of QD layer 324 and barrier layers 322 are selected to ensure the total tensile force remains below a threshold level to prevent the formation of misfit dislocations within the active layer. In other embodiments, the tensile force associated with each QD layer 324 is less than the compressive force associated with each barrier layer 322, resulting in a net increase in compressive force as the number of layers is increased. In some embodiments, the number of layers of QD layer 324 and barrier layers 322 are selected to ensure the total compressive force remains below a threshold level to prevent the formation of misfit dislocations within the active layer.

[0022] Referring now to FIG. 3c, a cross-sectional view is provided of the various layers utilized according to some embodiments. The embodiment shown in FIG. 3c utilizes a silicon (Si) substrate 348, wherein a buffer layer 352, cladding layer 350 and additional layers are fabricated on top of the silicon substrate 348. In some embodiments, the buffer layer 352 comprises a GaAs layer 356, an In..sub.1Ga..sub.9As layer 358, a GaAs layer 360 and a In.sub.1Ga.sub.9As/GaAs layer 362, and GaAs layer 364. The cladding layer 350 includes a n-doped Ga-As buffer 366, n-doped AlGaAs grading layer 368, n-doped Al.sub.0.4Ga.sub.0.6As cladding layer 370, n-doped AlGaAs grading layer 380, and a UID-Ga-As waveguide layer 382. In the embodiment shown in FIG. 3c, an InAs quantum dot (QD) layer in an InGaAS quantum well (QW) and barrier layer 386 are included on top of the cladding layer 350. These layers will be utilized in the active region as well. The one or more layers further include an UID-GaAs waveguide 388, a p-doped AlGaAs grading layer 390, p-doped Al.sub.0.4Ga.sub.0.5As cladding layer 392, a p-doped AlGaAs grading layer 394 and a p-doped GaAs contact layer 396. The active region (not shown in this view) would be epitaxially deposited on top of the layers as shown in FIGS. 3a and 3b.

[0023] While the invention has been described with reference to an exemplary embodiment(s), it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment(s) disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.