Component carrier comprising a photo-imageable dielectric and method of manufacturing the same

Abstract

A method of manufacturing a component carrier is disclosed. The method includes forming a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure; patterning a front side of the stack using a first photo-imageable dielectric; and patterning a back side of the stack. A component carrier is also disclosed.

Claims

1. A method of manufacturing a component carrier, comprising: forming a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; patterning a front side of the stack using a first photo-imageable dielectric; patterning a back side of the stack; providing a metal or metallized core; attaching a temporary carrier on a backside of the metal or metallized core; forming a first cavity into the metal or metallized core; embedding a semiconductor chip and/or a passive component into the first cavity; applying the first photo-imageable dielectric on a front side of the metal or metallized core; patterning the first photo-imageable dielectric at the first cavity for contacting the embedded semiconductor chip and/or the passive component, thereby forming holes on the front side; removing the temporary carrier from the backside of the metal or metallized core; applying a dielectric on a backside of the metal or metallized core; patterning the dielectric on the backside at the first cavity, thereby forming holes on the back side; and plating or filling the holes by a metal.

2. The method according to claim 1, wherein patterning the front side of the stack using a first photo-imageable dielectric comprises illumination with electromagnetic radiation through a mask, followed by developing of the illuminated first photo-imageable dielectric, followed in turn by a selective removal of either the illuminated portion or the non-illuminated portion of the developed first photo-imageable dielectric.

3. The method according to claim 1, wherein the first photo-imageable dielectric is patterned for contacting embedded components having different distances between the front side and an upper main surface of the respective component.

4. The method according to claim 1, further comprising: patterning the back side of the stack by laser drilling.

5. The method according to claim 1, wherein a through-hole composed of a first hole portion with straight sidewalls on the front side connected to a second hole portion with tapering sidewalls on the backside is formed.

6. The method according to claim 1, wherein patterning the front side of the stack using the first photo-imageable dielectric comprises forming multiple holes on the front side with different vertical depths.

7. The method according to claim 1, wherein patterning the back side of the stack comprises forming multiple holes on the back side with substantially the same vertical depth.

8. The method according to claim 1, wherein patterning the front side of the stack using the first photo-imageable dielectric comprises forming multiple holes on the front side with different horizontal widths.

9. The method according to claim 1, further comprising: forming a wire and/or a coax cable in a hole or a via or of the component carrier.

10. The method according to claim 1, wherein a metal or metallized core is provided, to which the first photo-imageable dielectric is applied.

11. The method according to claim 1, wherein forming the stack comprises forming a dielectric core with metallized sidewalls.

12. The method according to claim 1, wherein forming the stack comprises forming a through-hole formed by the first photo-imageable dielectric on the front side, by a dielectric on the backside, and by laser processing from the backside.

13. The method according to claim 12, wherein the dielectric on the backside is a thermal curing material or a second photo-imageable dielectric.

14. The method according to claim 1, wherein before patterning the dielectric on the backside at the first cavity, at least one metal layer is applied onto the backside of the metal or metallized core, the metal layer is patterned, and the dielectric is applied on the at least one patterned metal layer.

15. The method according to claim 1, further comprising: forming a second cavity into the metal or metallized core; patterning the first photo-imageable dielectric at the second cavity, thereby forming holes on the front side; patterning the dielectric on the backside at the second cavity, thereby forming holes on the back side; and plating or filling the holes by a metal.

16. A component carrier, comprising: a stack comprising at least one electrically conductive layer structure and/or at least one electrically insulating layer structure; at least one hole with straight sidewalls on a front side of the stack; at least one hole with tapering sidewalls on a back side of the stack; a cured patterned first photo-imageable dielectric on the front side of the stack; at least one cone-shaped hole on the back side of the stack; a metal or metallized core having a first cavity, in which a semiconductor chip and/or a passive component is accommodated; and a through-hole passing through the metal or metallized core of the component carrier; wherein the through-hole extending from the front side has sidewalls being at least partially covered with the cured first photo-imageable dielectric; wherein an inner surface of the through-hole is plated or filled by a metal; wherein the semiconductor chip or the passive component are mounted on a second photo-imageable dielectric on the back side of the stack or embedded in first photo-imageable dielectric.

17. The component carrier according to claim 16, further comprising at least one of the following features: the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten; the at least one electrically insulating layer structure comprises at least one of the group consisting of resin, reinforced or non-reinforced resin, epoxy resin or Bismaleimide-Triazine resin, FR-4, FR-5, cyanate ester, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based Build-Up Film, polytetrafluoroethylene, a ceramic, and a metal oxide; the component carrier is shaped as a plate; the component carrier is configured as one of the group consisting of a printed circuit board, and a substrate; the component carrier is configured as a laminate-type component carrier.

18. The component carrier of claim 16, further comprising: at least one cone-shaped hole on the front side of the stack; wherein an inner surface of the at one cone-shaped hole on the front side of the stack is plated or filled with a metal.

19. The component carrier of claim 18, wherein the plated or filled cone-shaped hole on the front side of the stack contacts at least one of the passive component or the metal or metallized core.

20. A component carrier, comprising: a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; a cured patterned first photo-imageable dielectric on a front side of the stack; at least one cone-shaped hole on a back side of the stack; a metal or metallized core having a first cavity, in which a semiconductor chip or a passive component is accommodated; a through-hole passing through the metal or metallized core of the component carrier; wherein the through-hole extends from the front side of the stack and has sidewalls being at least partially covered with the cured first photo-imageable dielectric; wherein an inner surface of the through-hole is plated or filled by a metal; wherein the semiconductor chip or the passive component is embedded in the at least one electrically insulating layer structure.

21. The component carrier according to claim 20, further comprising: a cured patterned dielectric on the back side of the stack.

22. The component carrier according to claim 21, wherein the cured patterned dielectric on the backside is a thermal curing material or a second photo-imageable dielectric.

23. The component carrier according to claim 20, wherein the component is selected from a group consisting of an electronic component, an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier and a logic chip.

24. The component carrier according to claim 20, wherein the component is selected from a group consisting of an electronic component, an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier and a logic chip.

25. The component carrier according to claim 20, further comprising at least one of the following features: the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten; the at least one electrically insulating layer structure comprises at least one of the group consisting of resin, reinforced or non-reinforced resin, epoxy resin or Bismaleimide-Triazine resin, FR-4, FR-5, cyanate ester, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based Build-Up Film, polytetrafluoroethylene, a ceramic, and a metal oxide; the component carrier is shaped as a plate; the component carrier is configured as one of the group consisting of a printed circuit board, and a substrate; the component carrier is configured as a laminate-type component carrier.

26. The component carrier of claim 20, further comprising: at least one cone-shaped hole on the front side of the stack; wherein an inner surface of the at least one cone-shaped hole on the front side of stack is plated or filled with a metal.

27. The component carrier of claim 26, wherein the plated or filled cone-shaped hole on the front-side of the stack contacts at least one of the passive component or the metal or metallized core.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 illustrates a cross-sectional view of a preform of a component carrier being presently under manufacture according to an exemplary embodiment of the invention.

(2) FIG. 2 illustrates a cross-sectional view of a preform of a component carrier being presently under manufacture according to the exemplary embodiment of the invention.

(3) FIG. 3 illustrates a perspective view of a preform of a component carrier being presently under manufacture according to another exemplary embodiment of the invention.

(4) FIG. 4 illustrates a flow diagram of a method of manufacturing a component carrier according to another exemplary embodiment of the invention.

(5) FIG. 5 illustrates a flow diagram of a method of manufacturing a component carrier according to another exemplary embodiment of the invention.

DETAILED DESCRIPTION OF ILLUSTRATED EMBODIMENTS

(6) The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

(7) The illustrations in the drawings are schematically presented. In different drawings, similar or identical elements are provided with the same reference signs.

(8) Before, referring to the drawings, exemplary embodiments will be described in further detail, some basic considerations will be summarized based on which exemplary embodiments of the invention have been developed.

(9) According to an exemplary embodiment, a nano-coated structure may be used for component carrier technology, in particular as a dry-adhesive structure. An adhesive layer implementing such a surface configuration may also be denoted as gecko film. The adhesive effect of such a surface may be based on van der Waals forces. Descriptively speaking, a plurality of low dimensioned suction cups may be formed by such a concept. According to an exemplary embodiment of the invention, a reliable substrate and/or structured material is provided for embedding and/or surface mounting applications having specific adhesion properties due to a corresponding configuration of nano- and/or microstructures on this surface. Exemplary embodiments have the advantage that the mentioned adjustability of the surface adhesion properties may be obtained with low material consumption, low production costs, small contamination risk, and high process reliability.

(10) In an embodiment, the mentioned materials may be used as support for component placement in embedding technologies. Compared to a traditional adhesive tape system that is dependent on temperature and time, an exemplary embodiment uses the surface of a support (which may be rigid or flexible) or PCB elements (such as cores, prepregs, copper foils, etc.), that exhibit, thanks to the nano- and/or microstructures, van der Waals attraction forces, a gecko effect, a high grip, and that are dry and thus can be cleaned and reused. A sheet with nano- and/or microstructures can also be included in the final product. When used for an embedding concept, components may be placed on the dry surface and can be held in position by weak bonds (like van der Waals forces, gecko effect, high grip values) prior to the component lamination.

(11) Such an architecture allows to obtain a dry interaction between the component and the holding substrate. No additional liquid adhesive is required. This has the advantages of a dry interaction, and a reduction of risk of contamination from the substrate.

(12) FIG. 1 illustrates a cross-sectional view of a preform of a component carrier 1 being presently under manufacture according to an exemplary embodiment of the invention.

(13) The component carrier 1 comprises a stack comprising an electrically conductive layer structure 2 and an electrically insulating layer structure 3, holes 8 with straight sidewalls on a front side of the stack, and holes 9 with tapering or cone-shaped sidewalls on a back side of the stack. The component carrier 1 further comprises a through-hole 7 passing the component carrier 1.

(14) The component carrier 1 further comprises a cured, patterned first photo-imageable dielectric 12 on the front side of the stack, in which the holes 8 at the front side of the stack are formed.

(15) The through-hole 7 and the holes 8 extending from the front side have sidewalls being at least partially covered with the cured first photo-imageable dielectric 12 so that the same are insulated against a metal core 11. The first photo-imageable dielectric 12 also forms the electrically insulating layer structure 3.

(16) An inner surface of the holes 8, 9 and the through-hole 7 is plated or filled by a metal, which can be copper. The metal also forms the electrically conductive layer structure 2.

(17) The component carrier 1 further comprises the metal core 11 having cavities, in which semiconductor chips 4 and passive components 5 are accommodated.

(18) FIG. 2 illustrates a cross-sectional view of a preform of the component carrier 1 being presently under manufacture according to another exemplary embodiment of the invention. This embodiment is similar to the embodiment of FIG. 1; however, the embodiment of FIG. 2 is further manufactured in that additional electrically conductive and an electrically insulating layer structures 17, 18, 19, 20 are added. The dotted lines in FIG. 2 indicate heat dissipation areas 21, which are formed by the metal structures within the holes 8, 9 and the through-hole 7. At the same time, the holes 8, 9 and the through-hole 7 in the areas 21 have different depths which are readily controlled in the manufacturing process by a combination of illumination with electromagnetic radiation at the front side (photo via) and laser drilling at the back side (laser via) as described later. Further, the first photo-imageable dielectric 12 provides the electric insulation between the metal structures within the holes 7, 8, 9 on the one hand and the metal core 11 and the components 4, 5 on the other hand.

(19) FIG. 3 illustrates a perspective view of a preform of the component carrier 1 being presently under manufacture according to the exemplary embodiment of the invention.

(20) The semiconductor chips 4 are embedded in the metal core 11. Heat, which is produced by the semiconductor chips 4, is dissipated by the metal core 11. FIG. 3 clearly shows the electrical insulation between the metal structures within the holes 7, 8, 9 on the one side and the metal core 11 and the semiconductor chip 4 on the other side. The heat dissipation from the heating source (semiconductor chips) 4 is improved by embedding the semiconductor chip 4 right into the center metal core 11 compared with conventional techniques where semiconductor chips are just arranged onto a metal support.

(21) FIG. 4 illustrates a flow diagram of a method of manufacturing the component carrier 1 according to another exemplary embodiment of the invention.

(22) In a step S1, a metal core 11 is provided, and in a step S2, a temporary carrier 14 is attached on a backside of the metal core 11. Further, a first cavity 15 and a second cavity 16 are formed into the metal core 11, for example by cutting or drilling or any other conventional technique.

(23) In a step S3, semiconductor chips 4 and passive components 5 such as capacitors or resistors are embedded into the first cavity 15. The temporary carrier 14 holds the semiconductor chips 4 and the passive components 5 on their correct positions so that the same are not moved in the subsequent steps. The temporary carrier 14 can be an adhesive tape.

(24) In a step S4, a first photo-imageable dielectric 12 is applied on a front side of the metal core 11, and the first photo-imageable dielectric 12 is patterned at the first cavity 15 for contacting the embedded semiconductor chip 4 and the passive component 5, and at the second cavity 16, thereby forming the holes 8 and the through hole 7 at the front side. The patterning of the first photo-imageable dielectric 12 can be made by illuminating the first photo-imageable dielectric 12 with electromagnetic radiation through a mask, followed by developing of the illuminated first photo-imageable dielectric 12, followed in turn by a selective removal of either the illuminated portion or the non-illuminated portion of the developed photo-imageable dielectric 12. The holes 7, 8 on the front side thus have straight sidewalls and are so called photo vias.

(25) The first photo-imageable dielectric 12 forms the electrically insulating layer structure 3.

(26) As shown in FIGS. 1 and 4, the multiple holes 8 on the front side are formed to have different vertical depths. The first photo-imageable dielectric 12 is patterned for contacting the embedded components 4, 5 having different distances between the front side of the stack and an upper main surface 6 of the respective components 4, 5. In detail, the upper main surface 6 of the passive component 5 located at the left-hand side in FIGS. 1 and 4 is lower than upper main surfaces 6 of the semiconductor chips 4 and the passive component 5 located at the right-hand side.

(27) The multiple holes 8 on the front side can be formed to have different horizontal widths.

(28) In a step S5, the temporary carrier 14 is removed or detaped from the backside of the metal core 11. Now, the first photo-imageable dielectric 12 holds the semiconductor chips 4 and the passive components 5 on their correct positions so that the same are not moved in the subsequent steps. Then, a second photo-imageable dielectric 13 is applied on the backside of the stack, i.e. on the backside of the metal core 11.

(29) In a step S6, the second photo-imageable dielectric 13 is patterned on the backside at the first cavity 15 and the second cavity 16, thereby forming holes 9 and the through-hole 7 at the back side. The patterning of the back side of the stack can be made by laser drilling or laser processing so that the holes 7, 9 on the back side have tapering sidewalls. The holes 7, 9 on the back side are so called laser vias. The multiple holes 9 on the back side are formed to have substantially the same vertical depth.

(30) In a step S7, the holes 7, 8, 9 are plated by a metal such as copper. The metal forms the electrically conductive layer structure 2.

(31) In subsequent steps S8 through S11, the component carrier 1 is further built-up by additional layer structures similar to the additional layer structures 17, 18, 19, 20 in FIG. 2.

(32) In an embodiment, the through-hole 7 can be composed of a first hole portion with straight sidewalls on the front side connected to a second hole portion with tapering sidewalls on the backside is formed. The first hole portion can be a photo via, while the second hole portion can be a laser via.

(33) In an embodiment, a wire and/or a coax cable can be formed in a hole 7, 8, 9 or a via of the component carrier 1.

(34) FIG. 5 illustrates a flow diagram of a method of manufacturing the component carrier 1 according to another exemplary embodiment of the invention.

(35) In a step S1, a metal core 11 is provided and coated at the front side and at the back side by copper layers. The metal core 11 includes a through-hole 7, which is filled by the copper.

(36) In a step S2, a temporary carrier 14 is attached on a backside of the metal core 11. The temporary carrier 14 is an adhesive tape which is laminated onto the metal core 11. Further, a cavity 21 is formed into the metal core 11.

(37) In a step S3, two components 4, i.e. two semiconductor chips 4 are embedded into the cavity 21. The temporary carrier 14 holds the semiconductor chips 4 on their correct positions so that the same are not moved in the subsequent steps. Thereafter, the components 4, 4 are embedded into an encapsulant 22, for example by molding a resin having a high thermal conductivity.

(38) In a step S4, the first photo-imageable dielectric 12 is applied to the front side of the stack and cured, and the temporary carrier 14 is removed or detaped. The first photo-imageable dielectric 12 holds the semiconductor chips 4, 4 on their correct positions so that the same are not moved in the subsequent steps.

(39) In a step S5, a second photo-imageable dielectric 13 is applied to the back side of the stack and cured, so that the components 4, 4 are sandwiched between the first and second photo-imageable dielectrics 12, 13.

(40) Thereafter, the first and second photo-imageable dielectrics 12, 13 are patterned, for example in a lithography process or in imaging and etching processes. The patterning of the first and second photo-imageable dielectrics 12, 13 may comprise illumination with electromagnetic radiation through a mask, followed by developing of the illuminated first and second photo-imageable dielectrics 12, 13, followed in turn by a selective removal of either the illuminated portion or the non-illuminated portion of the developed first and second photo-imageable dielectrics 12, 13. By the patterning process, vias 7, 8, 9 are formed, which consist of a through-hole 7, holes 8 at the front side and holes 9 at the back side of the stack.

(41) Alternatively, the through-hole 7, the holes 8 at the front side and/or the holes 9 at the back side can be formed by laser drilling.

(42) The multiple holes 8 on the front side may have different vertical depths. The first photo-imageable dielectrics 12 may be patterned for contacting the embedded components 4, 4 having different distances between the front side of the stack and an upper main surface of the respective components 4, 4.

(43) The multiple holes 8 on the front side can be formed to have different horizontal widths.

(44) The multiple holes 9 on the back side may be formed to have substantially the same vertical depth.

(45) In a step S6, the vias 7, 8, 9, which are formed in the patterning process of the first and second photo-imageable dielectrics 12, 13, are plated or filled by a metal such as copper, thereby forming the electrically conductive layer structure 2.

(46) In subsequent steps S7 to S9, additional electrically conductive and electrically insulating layer structures are added to the stack.

(47) In an embodiment, the through-hole 7 can be composed of a first hole portion with straight sidewalls on the front side connected to a second hole portion with tapering sidewalls on the backside is formed. The first hole portion can be a photo via, while the second hole portion can be a laser via.

(48) In an embodiment, a wire and/or a coax cable can be formed in the vias 7, 8, 9 of the component carrier 1.

(49) The present invention offers the following advantages: heat dissipating is achieved by the metal core 11 with the holes 7, 8, 9, wherein the through-hole 7 can be a so called plated-through-hole (PTH); the holes 7, 8, 9 or vias can be formed with different depths to connect the passive and active components, for example as photo vias and laser vias; and there is no need of a step of pre-baking to prevent the components 4, 5 from moving during lamination by photo reaction of the first photo-imageable dielectric 12.

(50) The present invention is applicable for ECP-manufactured mobile phones and related electronic devices. The present invention provides a functional ECP with improved heat dissipation and bio compatibility.

(51) It should be noted that the term comprising does not exclude other elements or steps and the article a or an does not exclude a plurality. Also, elements described in association with different embodiments may be combined.

(52) Implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. Instead, a multiplicity of variants are possible which use the solutions shown and the principle according to the invention even in the case of fundamentally different embodiments.