PULSED HIGH POWER RF PROTECTION USING TRANSIENT VOLTAGE SUPPRESSION (TVS) DIODE

Abstract

A system for front end protection of an RF receiver against interfering pulsed high power RF signals includes a dual-diode device comprising a first Transient Voltage Suppressor (TVS) diode; and a second TVS diode; wherein the first TVS diode and the second TVS diode are located between an RF input/output and an RF receiver front end.

Claims

1. A device for front end protection for an RF receiver against transient and pulsed high power RF signals comprising: a dual-diode device comprising: a first Transient Voltage Suppressor (TVS) diode; and a second TVS diode in parallel to the first TVS diode; wherein said first TVS diode and said second TVS diode are located between an RF input/output (I/O) and said RF receiver front end; and wherein the transient and pulsed high power RF signals are suppressed by the dual-diode device; whereby said RF receiver front end is protected from damage by the transient and pulsed high power RF signals.

2. The device of claim 1, wherein said first TVS diode and said second TVS diode are spaced apart by a TVS diode separation distance.

3. The device of claim 1, wherein said first TVS diode and said second TVS diode are spaced apart by a TVS diode separation distance of /4 between an RF input/output and said RF receiver front end.

4. The device of claim 1, wherein each of said first TVS diode and said second TVS diode has one end coupled to a center conductor and a second end coupled to ground.

5. The device of claim 1, wherein said dual-diode device is in line with electrical connections between said RF input/output and said RF receiver front end.

6. The device of claim 1, wherein said suppression is a reflection of said transient and pulsed high power RF signals, with no leakage.

7. The device of claim 1, wherein each of said first TVS diode and said second TVS diode has one end coupled to a center conductor and a second end coupled to a shield of a coaxial cable between said RF input/output and said RF receiver front end.

8. The device of claim 2, wherein an insertion loss of said dual diode device is 0.35 dB at 1 GHz.

9. The device of claim 3, wherein an insertion loss of said dual diode device is 0.25 dB at 1 GHz.

10. The device of claim 1, wherein said dual diode device is located on an Input Output (TO) PCB board.

11. The device of claim 2, wherein a return loss of said dual diode device is 18 dB at 1 GHz.

12. The device of claim 1, wherein a return loss of said dual diode device of claim 3 is 24 dB at 1 GHz.

13. The device of claim 1, wherein each of said first TVS diode and said second TVS diode is a Semtech RClamp4041ZA TVS diode.

14. The device of claim 1, wherein said RF receiver is an Identification Friend or Foe (IFF) receiver.

15. A method for front end protection for an RF receiver against interfering pulsed high power signals using a Transient Voltage Suppressor (TVS) diode component comprising: providing said front end protection TVS diode component, wherein said TVS diode component comprises two TVS diodes; receiving an RF signal at an I/O stage; receiving said RF signal, output from said I/O stage, at said TVS diode component; and diverting said pulsed high power signal by said TVS diode component.

16. The method of claim 15, wherein said two TVS diodes are separated by a diode separation distance equal to /4.

17. The method of claim 15, wherein said diverting is a reflection of said interfering pulsed high power signals.

18. The method of claim 15, wherein said TVS diode component is provided in line with electrical connections between said I/O stage and said RF receiver.

19. The method of claim 16, wherein said TVS diode component limits said interfering pulsed high power signal by 43 dB at 1 GHz.

20. A system for front end protection for an RF receiver against a pulsed high power RF signal comprising: a dual-diode device comprising: a first Transient Voltage Suppressor (TVS) diode; and a second TVS diode electrically parallel to the first TVS device; wherein said first TVS diode and said second TVS diode are spaced at /4 between each other, and said dual-diode device is electrically connected between an RF input/output an Identification Friend to or Foe (IFF) RF receiver; and whereby said RF receiver is protected from damage by said pulsed high power RF signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIG. 1 illustrates an application environment in accordance with an embodiment.

[0009] FIG. 2 illustrates a pulse modulated high-power RF signal waveform in accordance with an embodiment.

[0010] FIG. 3 is a device block diagram in accordance with an embodiment.

[0011] FIG. 4 is a device detail in accordance with an embodiment.

[0012] FIG. 5 is a flow chart depicting method steps in accordance with an embodiment.

[0013] FIG. 6 is a power plot for a 66 dBm, 3.3 S incident pulse limited by the RCLamp4041ZAs configured with minimal spacing in accordance with an embodiment.

[0014] FIG. 7 presents power plots, increasing at 1 dB increments, depicting the power limiting threshold of two RCLamp4041ZAs configured with minimal spacing in accordance with an embodiment.

[0015] FIG. 8 is a Vector Network Analyzer (VNA) plot showing return loss for two RCLamp4041ZAs configured with minimal spacing in accordance with an embodiment.

[0016] FIG. 9 is a VNA plot showing insertion loss for two RCLamp4041ZAs configured with minimal spacing in accordance with an embodiment.

[0017] FIG. 10 is a VNA Smith Chart showing input match for two RCLamp4041ZAs configured with minimal spacing in accordance with an embodiment.

[0018] FIG. 11 is graph providing a comparison of rejection performance in accordance with an embodiment.

[0019] FIG. 12 is a VNA plot showing insertion loss for two diodes in parallel with /4 spacing in accordance with an embodiment.

[0020] FIG. 13 is a VNA Smith Chart showing input match for dual-diodes with minimal spacing in accordance with an embodiment.

[0021] FIG. 14 is a VNA Smith Chart showing input match for dual-diodes with /4 spacing in accordance with an embodiment.

[0022] FIG. 15 is a graph of compression curves providing a comparison of rejection performance in accordance with an embodiment.

[0023] These and other features of the present embodiments will be understood better by reading the following detailed description, taken together with the figures herein described. The accompanying drawings are not intended to be drawn to scale. For purposes of clarity, not every component may be labeled in every drawing.

DETAILED DESCRIPTION

[0024] The features and advantages described herein are not all-inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been selected principally for readability and instructional purposes, and not to limit in any way the scope of the inventive subject matter. The invention is capable of many embodiments. What follows is illustrative, but not exhaustive, of the scope of the invention.

[0025] Pulsed high power RF signals differ from ElectroStatic Discharge (ESD). An ESD event is typically a very fast transient discharge from surface to surface. The ESD event typically lasts for less than 100 nanoseconds (based on standard ESD waveform definitions) such as in the 300-500 picosecond duration. In contrast, the interfering pulsed RF signal can last for a much longer pulse duration in the microsecond to millisecond range. The power is also different and as used herein, the pulsed high power RF signals can be from 27 dBm to sixty-plus dBm.

[0026] A TVS diode component provides sufficient power limiting capabilities with minimal leakage in a small package size to protect RF receivers from interfering high power pulsed RF signals. By comparison, a traditional high power PIN diode, such as the Skyworks CLA4609-086LF has a large turn on delay, resulting in leakage power passing through before protection initiates, and this leakage power is enough to damage components. In contrast, TVS diodes such as the ESD103-B1-02 and the RClamp4041ZA exhibit no leakage power, sufficient power limiting capability, and acceptable package sizing to meet protection requirements.

[0027] The ESD103-B1-02 and RClamp4041ZA are designed to be used as an ESD protection device. They are not designed to be used to protect against long pulse durations. However, we can use them as an example that serves to baseline the TVS performance for power limiting in an RF application.

[0028] The use of TVS diodes as protection from high powered pulsed RF signals is not a typical application as they are designed for the much more common transient risk, rather than a repeated, high power, risk as found in a severe jamming combat environment. Placement of a pair of TVS devices either adjacent to each other, or at /4 (receiver wavelength) separation provides surprisingly good protection. In one example, the size of the component is a 0201 package size, which is very small in comparison to other solutions. The 0201 Surface Mounted Component (SMC) package measures 0.6 mm by 0.3 mm (0.024 by 0.012). The clamping levels are used for the required protection range and the TVS diode system detailed herein is fast enough that no leakage power gets through from turn on delay.

[0029] Other applications use a TVS diode as a protection device for typical ESD and lightning strike events meeting IEC6100-4-2ESD (International Electrotechnical Commission immunity standard), different from the protection provided here. Further, other applications require multiple associated components rather than the two TVS diodes of these embodiments. They utilize various supporting components as well as voltage rails to be functional. An example other configurations employs two Schottky diodes that allow high power RF signals to pass through, undistorted, to their RF circuit. This is different from described embodiments using TVS diodes to limit/reflect high power RF pulses, instead of allowing them to pass through.

[0030] Using a TVS diode with a smaller package size lowers the intrinsic capacitance so that it is usable in the RF frequency range. While the dissipative power handling capability is low due to package size constraints, the reflective power handling capability of the TVS diode removes a large portion (or all) turn on delays, resulting in no leakage power. The TVS diode also provides a better short to ground to maximize reflected power and it does not necessarily need to be capable of high power dissipation since most of the power is reflected. In this application, the TVS diode can be used for longer pulse durations, while addressing the leakage power concerns that have previously been an issue. Embodiments solve the leakage concern through faster response/turn on delay times, and smaller package size.

[0031] One embodiment for RF applications includes Identification Friend or Foe (IFF) receiver front end protection against pulsed, high power, signals. Certain RF interference details are illustrated in MIL-STD-464A (tables 1A, 1B, and 1F) MIL-STD-464C (tables 1, 2, and 6). For example, around 1 GHz the maximum acceptable external ElectroMagnetic Environment (EME) ranges from 300 V/m to 2,000 V/m for fixed-wing aircraft.

[0032] FIG. 1 illustrates an application environment 100. The environment depicts a severe combat jamming scenario. For example, repeated high-power pulses interfere with Identification Friend or Foe (IFF) communications between platforms. Specifically, pulse-modulated high-power RF signal 105 is radiated from a single source, intercepting multiple targets 110-140. Example targets comprise a fighter jet with an Identification Friend or Foe (IFF) system 110; an AWACS' surveillance system 115; vehicle communications systems 120; ground communications 125; naval communication systems 130; aircraft communication systems 135; and drone communication and control systems 140. As mentioned, the targets may be communicating information between each other (such as IFF) that is important to be received properly. Pulsed RF signals could also be natural occurrences such as solar flares, in addition to intentional RF signals such as jamming and spoofing. The present system is designed to prevent overload of the RF receiver and RF front end system that is receiving and processing RF signals between targets.

[0033] FIG. 2 illustrates a pulse-modulated high-power RF signal waveform 200. The RF pulse 200 is defined by its pulse width 205, peak 210, and pulse repetition rate 215. Terminology includes: Peak is the maximum RF field power; Pulse Width is the length of time an RF pulse is ON; Pulse Repetition Frequency (PRF) is the number of pulses per second (both ON and OFF time); Pulse Repetition Rate (PRR) is the time period between the pulses which is the inverse of the frequency (PRR=1/PRF); Modulation Depth is the amplitude of the pulse modulation signal; and Duty Cycle is the ratio of the ON to OFF time of a pulse-modulated signal. High power pulse field levels can be defined by the DO-160 standard and Radiated Susceptibility (RS) test standards. Here, the pulse-modulated high-power RF signal waveform 200 may be, for example, a 1 GHz, 3.3 pulse with a power of 28 dBm or more with a repetition rate (PRF) of 500 (250 Hz).

[0034] The RF pulse 200 is distinguished from an ESD pulse, and the present system involves the RF environment and not electrostatic discharges. For example, the ESD pulse typically has a pulse width that is measured in the picosecond range (0.05 S to 0.5 S), and is tested in nanoseconds. The ESD pulse is also typically a higher power level and can be 0.5 kV to 100 kV. Furthermore, the ESD tends to be a one time or non-cyclical event. In contrast, each RF pulse is a much longer duration and the pulse width lasts greater than 100 milliseconds. Finally, the RF pulse 200 is generally a cyclical or repeating signal with a pulse repetition rate 215 such as 250 Hz.

[0035] FIG. 3 is a device block diagram configuration 300. Components comprise antenna 305; I/O 310; receiver 315; and TVS diode component 320. The antenna 305 receives the RF signals that are then processed in an I/O connection 310 that in one example is a mating connector and a cable from the antenna. A TVS diode assembly 315 is coupled to the signal coming from the antenna 305 and designed to suppress large power signals that might damage the receiver 320 but would otherwise allow for the signals of interest to pass to the receiver 320. The receiver 320 may have an RF front end such as amplifiers, filters, analog-to-digital converters (ADC) to provide for a digital signal that is then digitally processed by a processor such as an ASIC or FPGA. TVS diode assembly 315 is connected in line with the interconnecting conductors/coaxial cable of I/O 305 and before receiver 320.

[0036] FIG. 4 is a device detail 400. Components comprise antenna 405; I/O connection 410; and receiver 415. I/O connection 410 and receiver 415 are electrically connected by shielded coaxial cable 425. Pulsed high power protection is provided by first TVS diode 430 and second TVS diode 435 formed as a dual-diode device in which one end of the first and second TVS diodes are in electrical contact with the shielded center conductor of the cable 425, and the other end of the first and second TVS diode is coupled to ground. The ground connection can be the shield of the cable if the TVS diodes are inserted along the cable. In one example, the TVS diodes are coupled proximate to the I/O connection. This protection ensures the receiver does not get swamped by large RF pulses. In one example the first bidirectional TVS diode 430 and second bidirectional TVS diode 435 are separated by distance 440. In embodiments separation distance 440 is minimal or /4 based on the expected wavelength of the RF signal. As an example, for an RF frequency (f), wavelength (), =c/f where c is the speed of light (299,792,458 m/s). For illustrative purposes, if the RF frequency was 1 GHz, the wavelength would be 30 cm. This would result in a distance of 7.5 cm.

[0037] For embodiments, the TVS diode is located on the IO PCB board. However, other embodiments may use the same substrate as the center conductor. In one embodiment, the TVS diode is a Semtech RClamp4041ZA surface mount device with specifications that comprise: size: 0.600.30mm; working voltage 4.0 v; capacitance 0.65 pF; and dynamic resistance Ohms. Embodiments are integrated on a printed circuit board of the receiver.

[0038] FIG. 5 is a flow chart depicting the RF pulse protection technique 500. The system has a front end protection TVS diode component for an RF receiver to protect against pulsed high power signals 505. The RF signal, which may include an RF pulse, is received at the antenna and I/O connection 510. The RF signal at the I/O connection is then received at a TVS diode component 515. As noted, in one example the TVS diode is coupled to the center conductor of the cable. The TVS diodes operate to reflect the pulsed high power signal by the TVS diode component 520, protecting RF receiver 525. During the time the TVS is active and reflecting, the high power RF signal, the receiver will typically not provide a good RF match. In such embodiments this may degrade the ability to receive desired signals. For certain embodiments this is strictly a protection feature.

[0039] According to example, the TVS diode assembly is designed for the particular application. Table 1 presents system requirements according to one example. For an IFF jamming application, the high power RF pulse is expected to be about 60 dBm at 1 GHz.

TABLE-US-00001 P.sub.in_max := 60 dBm P.sub.in_max := dBm_to_Watts(P.sub.in_max) = 1000 W V.sub.in max : = {square root over (P.sub.in_max_watts .Math. Impedance.sub.system)} = 223.607 VRMS V.sub.in_max_peak := V.sub.in_max .Math. {square root over (2)} = 316.228 V [00001]$I_{\mathrm{in\_max}}:=\frac{V_{\mathrm{in\_max}\mathrm{\_peak}}}{{\mathrm{Impedance}}_{\mathrm{system}}}=6.325A$

[0040] Based on requirements, this calculation determines the maximum current the TVS diode can possibly see, to confirm the TVS is capable of handling the current.

[0041] Table 2 presents a first embodiment analysis, based on TVS specifications.

TABLE-US-00002 V.sub.clamp.sub..sub.typ := 5.6 V V.sub.clamp.sub..sub.max := 8 V V.sub.clamp.sub..sub.typ.sub..sub.dBm := Voltage_to_dBm(V.sub.clamp.sub..sub.typ) = 27.974 dBm V.sub.clamp.sub..sub.max.sub..sub.dBm := Voltage_to_dBm(V.sub.clamp.sub..sub.max) = 31.072 dBm V.sub.stand.sub..sub.off.sub..sub.dBm := Voltage_to_dBm(4 V) = 25.051 dBm P.sub.dissipation.sub..sub.stead.sub..sub.state.sub..sub.typ := I.sub.in.sub..sub.max .Math. V.sub.clamp.sub..sub.typ = 35.418 W P.sub.dissipation.sub..sub.stead.sub..sub.state.sub..sub.max := I.sub.in.sub..sub.max .Math. V.sub.clamp.sub..sub.max = 50.596 W

[0042] Based on the characteristics of the TVS, this calculation estimates when the typical power limiting should occur where the typical clamping voltage is 5.6 volts and the maximum clamping voltage is 8 volts.

[0043] FIG. 6 is a power limiting plot 600 of two RCLamp4041ZA diodes in parallel with minimal spacing for a 3.3 s pulse @ 250 Hz with an input power of 66 dBm. The horizontal time scale is 500 ns per division, the vertical scale is 10 dBm per division. The plot shows that an input power of 66.1 dBm 605 is limited to 29.1 dBm 610, or a reduction of 37 dB. Pulses were 1030 MHz 60 and 66 dBm with a PRF OF 500 Hz, held for 10 minutes. These results show protection for inputs exceeding the 60 dBm of Table 1 system requirements.

[0044] FIG. 7 is a power limiting plot 700 of two RCLamp4041ZA diodes in parallel with /4 spacing for a 3.3 s pulse @ 250 Hz with an input power of 66 dBm. The horizontal time scale is 500 ns per division, the vertical scale is 10 dBm per division. The plot shows that an input power of 66.1 dBm 705 is limited to 23.3 dBm 710, or a reduction of about 43 dB. These results show protection for inputs exceeding the 60 dBm of Table 1 system requirements, and better than the minimal spacing performance of FIG. 6.

[0045] FIG. 8 is a power plot 800 showing the power limiting threshold of two RCLamp4041ZA diodes in parallel with minimal spacing at 1 dB increments. The horizontal time scale is 500 ns per division, the vertical scale is 5 dB per division. Input powers are 25.7 dBm 805, 26.7 dBm 810, and 27.5 dBm 815. As seen, an input power of 25.7 dBm 805 does not cause a reduction/limitation of the input power. Input power of 26.7 dBm 810, reveals a very small effect at this threshold. Input power of 27.5 dBm 815 shows a limiting of the power by about 0.57 dB from about 27.5 dBm to about 27 dBm. Therefore, in this embodiment, two RCLamp4041ZA diodes in parallel with minimal spacing have a power limiting threshold of about 26.7 dBm.

[0046] FIG. 9 is a Vector Network Analyzer (VNA) plot 900 showing insertion loss for two RCLamp4041ZA diodes in parallel with minimal spacing. The plot is over an 800 MHz to 1.2 GHz frequency range with a vertical insertion loss scale of 0.250 dB per division, from 1.250 to +1.250 dB. Insertion loss values range from about 0.25 dB at 800 MHz to about 0.46 at 1.2 GHz. Specific values are 0.2878 dB at 905.26316 MHz 905 and 0.4546 dB at 1.2000000 MHz 910. This depicts that the characteristics of the TVS diode have little to no effect on the RF transmission line characteristic impedance.

[0047] FIG. 10 is a Vector Network Analyzer (VNA) plot 1000 showing return loss for two RCLamp4041ZA diodes in parallel with /4 spacing. The plot is over an 800 MHz to 1.2 GHz frequency range with a vertical return loss scale of 10 dB per division, from 50 to +50 dB. Return loss values range from about 26 dB at 800 MHz to about 22 at 1.2 GHz. Specific performance values are 23.082 dB at 978.00000 MHz 1005, 23.262 dB at 1.0300000 MHz 1010, and 22.199 dB at 1.0900000 GHz 1015. This depicts performance that will not hamper receiver reception.

[0048] FIG. 11 is a VNA plot 1100 showing return loss for two RCLamp4041ZA diodes in parallel with minimal spacing. The plot is over an 800 MHz to 1.2 GHz frequency range with a vertical return loss scale of dB per division, from 50 to +50 dB. Return loss values range from about 20 dB at 800 MHz to about 15 dB at 1.2 GHz. Specific performance values are 18.650 dB at 905.26316 MHz 1105, and 15.816 dB at 1.20000000 GHz 1110. This depicts performance that will not hamper receiver reception.

[0049] FIG. 12 is a VNA plot 1200 showing insertion loss for two RCLamp4041ZA diodes in parallel with /4 spacing. The plot is over an 800 MHz to 1.2 GHz frequency range with a vertical insertion loss scale of 0.1 dB per division, from 0.50 to +0.50 dB. Insertion loss values range from about 0.20 dB at 800 MHz to about 0.30 at 1.2 GHz. Specific performance values are 0.2489 dB at 978.00000 MHz 1205, 0.2567 dB at 1.0300000 GHz 1210, and 0.2709 dB at 1.0900000 GHz 1215. This depicts performance that will not hamper receiver reception.

[0050] FIG. 13 is a VNA Smith Chart 1300 showing input match for dual-diodes with minimal spacing for an RCLamp4041ZA. Values at 905.26316 MHz are 40.832 , 5.3769, and 32.698 pF 1305; values at 1.200000 GHz are 36.318 , 2.8708, and 46.199 pF 1310, showing a good match to the ohms of the antenna receiver circuit; note the capacitive component of impedance.

[0051] FIG. 14 is a VNA Smith Chart 1400 showing input match for dual-diodes with /4 spacing for an RCLamp4041ZA. Values at 978.00000 MHz are 45.516 , 4.9814, and 810.64 pH 1405; values at 1.0300000 GHz are 46.312 , 5.5132, and 851.89 pH 1410, and values at 1.0900000 GHz are 46.776 , 6.8168, and 995.34 pH 1415. Note the better input match when compared with minimal-spacing configuration. Impedance is close to 50, with a slight inductive component.

[0052] FIG. 15 is a graph 1500 of compression curves providing a comparison of rejection performance. Power output Pout is compared to power input Pin in dBm. Three configurations are shown: single diode 1505; dual diode with close (adjacent) spacing 1110, and dual diode with /4 spacing 1515. In this example, the frequency is 1 GHz, therefore the wavelength is about 30 cm, and /4 is about 7.5 cm. While optimum rejection is obtained with /4 spacing 1515, close spacing 1510 performs surprisingly better than a single diode 1505. A single diode 1505 provides about 27 dB of rejection over the span of 60 dBm to 66 dBm input, while dual diodes with close spacing 1510 provides about 35 dB of rejection, and dual diode with /4 spacing 1515 provides about 35 to 43 dB of rejection over this range.

[0053] The foregoing description of the embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of this disclosure. It is intended that the scope of the present disclosure be limited not by this detailed description, but rather by the claims appended hereto.

[0054] A number of implementations have been described. Nevertheless, it will be understood that various modifications may be made without departing from the scope of the disclosure. Although operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results.

[0055] Each and every page of this submission, and all contents thereon, however characterized, identified, or numbered, is considered a substantive part of this application for all purposes, irrespective of form or placement within the application. This specification is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of this disclosure. Other and various embodiments will be readily apparent to those skilled in the art, from this description, figures, and the claims that follow. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.