HIGH-POWER ELECTRONICS DEVICES AND METHODS FOR MANUFACTURING SAME
20240006403 ยท 2024-01-04
Inventors
- Victor Zaderej (Oregon, IL, US)
- Richard FITZPATRICK (Chicago, IL, US)
- Alan Han (Aurora, IL, US)
- Lily Yeung (Naperville, IL, US)
- Ronald C. Hodge (Montgomery, IL, US)
- Gary Thomas O'Connor (Bolingbrook, IL, US)
Cpc classification
H01L23/49861
ELECTRICITY
H05K3/32
ELECTRICITY
H05K2201/1053
ELECTRICITY
H01L21/4842
ELECTRICITY
H01L25/50
ELECTRICITY
H01L21/4846
ELECTRICITY
International classification
H01L25/00
ELECTRICITY
H01L21/48
ELECTRICITY
H01L25/07
ELECTRICITY
H05K1/18
ELECTRICITY
H01L23/498
ELECTRICITY
H05K3/32
ELECTRICITY
Abstract
A high-power electronics device and a method of forming same are disclosed. The high-power electronics device is formed of a plurality of layers including molding compound, a printed circuit board, electrically conductive contacts, at least one electronic component, and molding compound. In an embodiment, a layer of a dielectric carrier is also provided.
Claims
1. A method of forming a high-power electronics device comprising: forming a stamping out of a sheet of thick conductive material, the stamping including a lead frame portion and at least first and second electronic component mounting contacts coupled to the lead frame portion by fingers; and attaching an electronic component to the first and second electronic component mounting contacts to form an assembly, the electronic component having a plurality of terminals, wherein one of the plurality of terminals of the electronic component is not attached to the first and second electronic component mounting contacts.
2. The method as defined in claim 1, wherein the sheet is formed of copper.
3. The method as defined in claim 1, wherein the sheet has a thickness of about 100 microns to about 3,000 microns.
4. The method as defined in claim 3, wherein the sheet has a thickness of about 500 microns to about 800 microns.
5. The method as defined in claim 1, wherein the electronic component is a field effect transistor.
6. The method as defined in claim 1, further comprising: mounting the assembly to a printed circuit board; and coupling the contacts with the printed circuit board.
7. The method as defined in claim 6, wherein the contacts are coupled with the printed circuit board by one or more of solder, fasteners and wire or ribbon bond.
8. The method as defined in claim 6, wherein the printed circuit board is mounted onto a fixture prior to coupling with the contacts.
9. The method as defined in claim 6, wherein the printed circuit board is proximate to the contacts.
10. The method as defined in claim 6, wherein the printed circuit board partially lays on top of the contacts.
11. The method as defined in claim 6, further comprising coupling the one of the plurality of terminals of the electronic component to the printed circuit board.
12. The method as defined in claim 11, wherein the one of the plurality of terminals of the electronic component is coupled with the printed circuit board by one of solder and wire or ribbon bond.
13. The method as defined in claim 11, further comprising removing the lead frame portion and fingers after the assembly is mounted to the printed circuit board to form a second assembly; and overmolding the second assembly.
14. The method as defined in claim 1, wherein prior to attaching the electronic component to the first and second electronic component mounting contacts, the method further comprises: insert molding a dielectric carrier to the stamping; and thereafter removing the lead frame portion and fingers.
15. The method as defined in claim 14, further comprising: mounting a printed circuit board to the carrier; and coupling the contacts with the printed circuit board.
16. The method as defined in claim 15, wherein the contacts are coupled with the printed circuit board by one or more of solder, fasteners and wire or ribbon bond.
17. The method as defined in claim 15, further comprising coupling the one of the plurality of terminals of the electronic component to the printed circuit board.
18. The method as defined in claim 17, wherein the one of the plurality of terminals of the electronic component is coupled with the printed circuit board by one of solder and wire or ribbon bond.
19. The method as defined in claim 17, further comprising coupling the contacts with the printed circuit board.
20. A high-power electronics device comprising: a first layer of molding compound; a second layer on top of the first layer comprising a printed circuit board; a third layer on top of the second layer formed of electrically conductive contacts; a fourth layer on top of the third layer formed of at least one electronic component; and a fifth layer on top of the fourth layer formed of molding compound.
21. The high-power electronics device of claim 20, further comprising a sixth layer between the first and second layers, the sixth layer comprising a dielectric carrier.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The present disclosure is illustrated by way of example, and not limited, in the accompanying figures in which like reference numerals indicate similar elements and in which:
[0015]
[0016]
[0017]
DETAILED DESCRIPTION
[0018] The appended drawings illustrate embodiments of the present disclosure and it is to be understood that the disclosed embodiments are merely exemplary of the disclosure, which may be embodied in various forms. Therefore, specific details disclosed herein are not to be interpreted as limiting, but merely as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present disclosure.
[0019] A high-power electronics device 20 and improved methods of manufacturing same are provided herein. One type of high-power electronics device 20 are solid-state devices, such as a solid-state switch which requires one FET (Field Effect Transistor) for switching less than 50 Amps of power. In an embodiment, the FET is a MOSFET (Metal Oxide Field Effect Transistors).
[0020] A first method of manufacturing is shown in
[0021] Attention is invited to the first method of manufacturing shown in
[0022] As shown in
[0023] As shown in
[0024] The first electronic component mounting contact 28a has a first mounting portion 68a which is adjacent to, parallel to, and spaced from a second mounting portion 68b of the electronic component mounting contact 28b. A space 70 is defined between the first and second mounting portions 68a, 68b. One of the mounting portions 68a has a length which is greater than the length of the other mounting portion 68b such that a void 72 is provided. The circuit board contact 54 extends into the void 72. The configuration shown in
[0025] As shown in
[0026] Thereafter, as shown in
[0027] Populated conventional printed circuit boards (PCBs) 84 are provided within a PCB panel 86,
[0028] Next, as shown in
[0029] Finally, as shown in
[0030] The step shown in
[0031] In an embodiment, circuit board contact 54 (and circuit board contact 56) are eliminated and the signal terminal 74 of the electronic component 76 is directly electrically coupled to the PCB 84.
[0032] The first method of manufacturing shown in
[0033] If the embodiment with the two FETs 76 is provided, the contacts form pins. One pin may be a current sense pin, a pin may be a fault detection pin (which is used to shut the device 20 down if a fault is detected), a pin may be an enable pin (which turns current on/off), a pin may be ground, a pin may be configured to connect to a battery (power source), and a pin is configured to connect to the load (the item being driven). In an embodiment, one FET 76 is connected to the battery pin, while the other FET 76 is connected to the load pin, and the shunt 80 is connected to each of the battery and load pins. Thus, the device 20 essentially forms a smart solid-state relay.
[0034] Attention is invited to the second method of manufacturing shown in
[0035] The stamping 22 is formed as shown in
[0036] Thereafter, the contact subassemblies 24a, 24b, 24c, 24d are singulated to form individual subassemblies, see
[0037] As shown in
[0038] Thereafter, the PCB 84 is laid on top of the carrier 92, or inserted through an opening 94 in the carrier 92, such that an edge 96 of the PCB 84 is proximate to the contacts 28a, 28b, 32, 34, 36, 38, 40, 42, 44, 46, 54 (and contact 56 if provided), see
[0039] As shown in
[0040] Alternatively, the step shown in
[0041] The contacts 28a, 28b, 32, 34, 36, 38, 40, 42, 44, 46, 54 (and contacts 28c, 28d, second circuit board contact 56, if provided) are then electrically coupled to the PCB 84 by, for example, one or more of solder, fasteners, such as a self-tapping screws, wire or ribbon bond, and the like. Other means for coupling may also be provided.
[0042] In an embodiment, circuit board contact 54 (and circuit board contact 56, if provided) are eliminated and the signal terminal 74 of the electronic component 76 is directly electrically coupled to the PCB 84.
[0043] Finally, as shown in
[0044] The second method of manufacturing shown in
[0045] This second embodiment recognizes that solid-state devices suffer from low junction temperatures of the integrated circuits used in them. Many of these devices use FETs and Insulated-Gate Bipolar Transistors (IGBTs) which generate their own heat while operating. This self-generating heat, plus the high temperatures provided in their environment, require thermal management to transfer the heat away from the FETs so the junction temperature is not reached. Current solutions use bare-dies with intimate thermal contact to heat sinks to eliminate heat. This second embodiment solders a packaged FET/IC on thick thermally conductive contact terminal blades to transfer the heat out of the device 20. The PCB 84 may be coupled to the packaged IC terminal using a wire or ribbon bond, and the PCB 84 may be coupled to the signal terminal 74 using a wire or ribbon bond. Manufacturing of the aforementioned solid-state device is described and illustrated below.
[0046] While particular embodiments are illustrated and described with respect to the drawings, it is envisioned that those skilled in the art may devise various modifications without departing from the spirit and scope of the appended claims. It will therefore be appreciated that the scope of the disclosure and the appended claims is not limited to the specific embodiments illustrated in and discussed with respect to the drawings and that modifications and other embodiments are intended to be included within the scope of the disclosure and the appended drawings. Moreover, although the foregoing descriptions and the associated drawings describe example embodiments in the context of certain example combinations of elements and/or functions, it should be appreciated that different combinations of elements and/or functions may be provided by alternative embodiments without departing from the scope of the disclosure and the appended claims. Further, the foregoing descriptions describe methods that recite the performance of a number of steps. Unless stated to the contrary, one or more steps within a method may not be required, one or more steps may be performed in a different order than as described, and one or more steps may be formed substantially contemporaneously. Finally, the drawings are not necessarily drawn to scale.
[0047] The disclosure provided herein describes features in terms of preferred and exemplary embodiments thereof. Numerous other embodiments, modifications and variations within the scope and spirit of the appended claims will occur to persons of ordinary skill in the art from a review of this disclosure.