COPPER-CERAMIC SUBSTRATE

Abstract

The invention relates to a copper-ceramic substrate comprising: a ceramic carrier, and at least one copper layer bonded to a surface of the ceramic carrier, which has a free surface for forming a conductor structure and/or for securing bonding wires, wherein the copper layer has a microstructure with an average grain size diameter of 200 to 500 m, preferably 300 to 400 m.

Claims

1-17. (canceled)

18. A copper-ceramic substrate, comprising: a ceramic carrier, and a copper layer bonded to a surface of the ceramic carrier, wherein the copper layer has a free surface for forming a conductor structure and/or for securing bonding wires, wherein the copper layer has a microstructure with an average grain size diameter of 200 to 500 m.

19. The copper-ceramic substrate according to claim 18, wherein the copper layer has an electrical conductivity of at least 50 MS/m.

20. The copper-ceramic substrate according to claim 18, wherein the copper layer has a Vickers hardness of 40 to 100.

21. The copper-ceramic substrate according to claim 18, wherein the copper layer has a proportion of at least 99.95% Cu.

22. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of at most 25 ppm Ag.

23. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of at most 10 ppm of O.

24. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Cd, Ce, Ge, V, Zn of, in each case, at most 0-1 ppm.

25. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Cd, Ce, Ge, V, Zn of a total of at least 0.5 ppm and at most 5 ppm.

26. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Bi, Se, Sn, Te of, in each case, at most 0-2 ppm.

27. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Bi, Se, Sn, Te of a total of at least 1.0 ppm and at most 8 ppm.

28. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Al, Sb, Ti, Zr of, in each case, at most 0-3 ppm.

29. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements Al, Sb, Ti, Zr of a total of at least 1.0 ppm and at most 10 ppm.

30. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements As, Co, In, Mn, Pb, Si of, in each case, at most 0-5 ppm.

31. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements As, Co, In, Mn, Pb, Si of a total of at least 1.0 ppm and at most 20 ppm.

32. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements B, Be, Cr, Fe, Mn, Ni, P, S of, in each case, at most 0-10 ppm.

33. The copper-ceramic substrate according to claim 21, wherein the copper layer has a proportion of the elements B, Be, Cr, Fe, Mn, Ni, P, S of a total of at least 1.0 ppm and at most of 50 ppm.

34. The copper-ceramic substrate according to claim 24, wherein the copper layer has further impurities, of at most 50 ppm.

Description

[0046] The invention is explained below on the basis of preferred embodiments with reference to the accompanying drawings, in which:

[0047] FIG. 1 is a copper-ceramic substrate according to the invention having two copper layers

[0048] Power modules are semiconductor components of power electronics and are used as semiconductor switches. They contain a plurality of power semiconductors (chips) that are electrically insulated from the heat sink in one housing. These are applied to a metallised surface of an electrically insulating plate (for example made of ceramic) by means of soldering or gluing, so that on the one hand the heat conduction towards the base plate is ensured and on the other hand the electrical insulation is ensured. The composite of metallised layers and insulating plate is called a copper-ceramic substrate and is realised on an industrial scale using the so-called DCB technology (direct copper bonding technology).

[0049] The chips are contacted by bonding with thin bonding wires. In addition, further modules with different functions (e.g., sensors, resistors) can be present and integrated.

[0050] To produce a DCB substrate, ceramic carriers (e.g., Al.sub.2O.sub.3, Si.sub.3N.sub.4, AlN, ZTA, ATZ) are bonded to one another on the top and bottom using copper plies in a bonding process. In preparation for this process, the copper plies can, before being placed onto the ceramic carrier, be surface-oxidised, (e.g., chemically or thermally) and subsequently can be placed onto the ceramic carrier. The connection is created in a high temperature process between 1060 C. and 1085 C., wherein a eutectic melt is created on the surface of the copper ply, which forms a connection with the ceramic carrier. In the case of copper (Cu) on aluminium oxide (Al.sub.2O.sub.3), for example, this connection consists of a thin CuAl spinel layer.

[0051] FIG. 1 shows a copper-ceramic substrate 1 further developed according to the invention having a ceramic carrier 2 and two copper layers 3 and 4. The two copper layers 3 and 4 developed further according to the invention have a microstructure with an average grain size diameter of 200 to 500 m, preferably 300 to 400 m.

[0052] The copper layers 3 and 4 can be connected to the ceramic carrier 2, for example by the DCB method described at the outset, so that they are connected to the ceramic carrier 2 by a substance-to-substance bond in the respective surface edge zone 5 and 6.

[0053] During the DCB method, the copper layers 3 and 4 are placed on the ceramic carrier 2 in the form of pre-oxidised semi-finished copper products and then heated to the process temperature from 1060 C. to 1085 C. The Cu-oxydul in the copper layers 3 and 4 melts and forms the connections in the surface edge zones with the ceramic carrier 2. Due to the effects of temperature and the recrystallization of the two copper materials, the microstructure can be set by choosing appropriate dwell times and cooling times so that the preferred average grain size diameter is set automatically. Since the influence of the temperature treatment including the cooling process is readily known to the person skilled in the art, he can select the parameters specifically so that the microstructure is formed according to the invention without a further temperature treatment being necessary. If the bonding process does not permit such a setting or if this is disadvantageous for economic reasons, the microstructure can also be achieved by a subsequent or previously carried out temperature treatment. Furthermore, the copper layers 3 and 4 preferably have a Vickers hardness of 40 to 100 after bonding.

[0054] The copper layers 3 and 4 having the microstructure according to the invention or having the proportions proposed according to the invention and in particular having the proposed proportions of O are highly conductive Cu materials and have a conductivity of 50 MS/m, preferably at least 57 MS/m and particularly preferably of at least 58 MS/m. However, materials with a lower conductivity are also conceivable. Furthermore, the copper layers 3 and 4 can, if necessary, also be supplemented by further Cu materials or layers, provided that the material properties of the copper layers 3 and 4 are to be further refined and the microstructure according to the invention is not adversely affected thereby.

[0055] The semi-finished copper products of the copper layers 3 and 4 can have a thickness of 0.1 to 1.0 mm and are placed in large dimensions on the ceramic carrier 2 and connected to the ceramic carrier 2 by the DCB method. The large-area copper-ceramic substrate 1 is then cut into smaller units and processed further.

[0056] The copper layers 3 and 4 can furthermore have at least 99.95% Cu, preferably at least 99.99% Cu, at most 25 ppm Ag, at most 10 ppm, or preferably at most 5 ppm O.

[0057] In addition, the copper layers 3 and 4 can have a proportion of the elements Cd, Ce, Ge, V, Zn of, in each case, at most 0-1 ppm, and/or a proportion of the elements Bi, Se, Sn, Te of, in each case, at most 0-2 ppm, and/or a proportion of the elements Al, Sb, Ti, Zr of, in each case, at most 0-3 ppm, and/or a proportion of the elements As, Co, In, Mn, Pb, Si of, in each case, at most 0-5 ppm, and/or a proportion of the elements B, Be, Cr, Fe, Mn, Ni, P, S of, in each case, at most 0-10 ppm. The enumerated additional elements can be deliberately introduced into the microstructure by doping during the melting process immediately before casting, or they can already be present in the copper layers 3 and 4 during the production of the semi-finished copper products. In any case, the proportion of these elements, including additional impurities, should preferably be at most 50 ppm.

[0058] Furthermore, the copper layer according to a further preferred embodiment has a proportion of the elements Cd, Ce, Ge, V, Zn of at least 0.5 ppm and at most 5 ppm, a proportion of the elements Bi, Se, Sn, Te of at least 1.0 ppm and at most 8 ppm, a proportion of the elements Al, Sb, Ti, Zr of at least 1.0 ppm and at most 10 ppm, a proportion of the elements As, Co, In, Mn, Pb, Si of at least 1.0 ppm and at most 20 ppm, and a proportion of the elements B, Be, Cr, Fe, Mn, Ni, P, S of a total of at least 1.0 ppm and at most 50 ppm.

[0059] The quantitative proportions of the elements described are necessary in order to achieve the average grain size of the microstructure proposed according to the invention. The microstructure formation is caused in particular due to the grain refinement of the microstructure caused by the elements and to the reduction in secondary recrystallization in the microstructure during the bonding process. For example, the element As can change and in particular increase the recrystallization temperature, so that the microstructure no longer changes during the bonding process to such an extent that the average grain size is increased and thus moves outside the proposed range. Furthermore, the element Zr can be used to preserve the microstructure while maintaining the average grain size when exposed to temperature, since the Zr acts as an external seed.