METHOD AND ARRANGEMENT FOR COMPENSATING MEMORY EFFECTS IN POWER AMPLIFIER

Abstract

A method for compensating memory effects in a power amplifier comprises obtaining of an original signal. A variation of power of the original signal with time is determined. The original signal is predistorted for memory effects of the power amplifier into a predistorted signal. The predistorting comprises predistorting of the original signal in dependence of the variation of power. A power amplifier predistortion arrangement for compensating memory effects in a power amplifier, a power amplifier arrangement, and radio transmitter are also disclosed.

Claims

1. A method for compensating memory effects in a power amplifier comprising: obtaining an original signal; and predistorting said original signal for memory effects of said power amplifier into a predistorted signal by determining a variation of power of said original signal with time, wherein the predistorting comprises predistorting said original signal in dependence of said variation of power to generate a predistorted signal y(t).

2. The method according to claim 1, further comprising: amplifying said predistorted signal into an amplified output signal.

3. The method according to claim 1, wherein said variation of power of said original signal with time is a power measure difference between consecutive time slots.

4. The method according to claim 3, wherein said power measure difference is a difference of instantaneous signal power.

5. The method according to claim 3, wherein said power measure difference is a difference of average signal power, said average signal power being determined over a predetermined period of time.

6. The method according to claim 1, wherein said predistorted signal y(t) is determined as:
y(t)=.sub.0X.sub.0(t)+.sub.3.sub.3(t)X.sub.3(t), where X.sub.k(t), k=0, 3, is a vector of a power amplifier behavioural model structure .sub.k, k=0, 3, are corresponding coefficients of said power amplifier behavioural model structure and .sub.3 is a dependency factor being dependent on said variation of power of said original signal.

7. The method according to claim 1 further comprising: determining an additional memory effect dependency factor from said original signal, wherein the predistorting comprises predistorting said original signal in further dependence of said additional memory effect dependency factor.

8. The method according to claim 1, wherein said predistorted signal y(t) is determined as:
y(t)=.sub.0X.sub.0(t)+.sub.k=1.sup.K.sub.k.sub.m=1.sup.M(k).sub.m,k(t)X.sub.k(t), where X.sub.k(t), k=0, K, is a vector of a power amplifier behavioural model structure .sub.k, k=0, K, are corresponding coefficients of said power amplifier behavioural model structure and .sub.m,k are dependency factors, of which one is dependent on said variation of power of said original signal.

9. The method according to claim 1 further comprising: determining a mean power over a predetermined period of time of said original signal and a frequency of said original signal, wherein the predistorting comprises predistorting said original signal in further dependence of said mean power and of said frequency.

10. The method according to claim 9, wherein said predistorted signal y(t) is determined as:
y(t)=.sub.0X.sub.0(t)+.sub.1.sub.1(t)X.sub.1(t)+.sub.2.sub.2(t)X.sub.2(t)+.sub.3.sub.3(t)X.sub.3(t), where X.sub.k(t), k=0, 1, 2, 3, is a vector of a power amplifier behavioural model structure .sub.k, k=0, 1, 2, 3, are corresponding coefficients of said power amplifier behavioural model structure, .sub.1 is a dependency factor being dependent on said mean power of said original signal, .sub.2 is a dependency factor being dependent on said frequency of said original signal and .sub.3 is a dependency factor being dependent on said variation of power of said original signal.

11. The method according to claim 9, wherein said predistorted signal, y(t) is determined as:
y(t)=.sub.0X.sub.0(t)+.sub.1.sub.1(t).sub.2(t)X.sub.1(t)+.sub.3.sub.3(t)X.sub.3(t), where X.sub.k(t), k=0, 1, 3, is a vector of a power amplifier behavioural model structure .sub.k, k=0, 1, 3, are corresponding coefficients of said power amplifier behavioural model structure, .sub.1 is a dependency factor being dependent on said mean power of said original signal, .sub.2 is a dependency factor being dependent on said frequency of said original signal and .sub.3 is a dependency factor being dependent on said variation of power of said original signal.

12. A power amplifier predistorter for compensating memory effects in a power amplifier, comprising: a processor; and a memory containing instructions which, when executed by the processor, cause the power amplifier predistorter to: obtain an original signal; and predistort said original signal for memory effects of said power amplifier into a predistorted signal, by performing operations to determine a variation of power of said original signal with time and predistort said original signal in dependence of said variation of power to generate a predistorted signal.

13. (canceled)

14. The power amplifier predistorter of claim 12, wherein the power amplifier predistorter is coupled to a power amplifier and wherein said power amplifier is configured to amplify said predistorted signal into an amplified output signal.

15. The power amplifier predistorter of claim 14, wherein the power amplifier is coupled to an antenna configured to transmit a radio signal according to said amplified output signal.

16. A non-transitory computer-readable storage medium comprising instructions which, when executed by at least one processor, cause a predistorter for compensating memory effects in a power amplifier to perform operations comprising: obtaining an original signal; and predistorting said original signal for memory effects of a power amplifier into a predistorted signal by determining a variation of power of said original signal with time and predistorting said original signal in dependence of said variation of power to generate a predistorted signal.

17-20. (canceled)

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The embodiments, together with further objects and advantages thereof, may best be understood by making reference to the following description taken together with the accompanying drawings, in which:

[0020] FIG. 1 is a schematic view of an embodiment of a power amplifier arrangement;

[0021] FIG. 2 is a schematic illustration steps of predistortion;

[0022] FIG. 3 is a schematic view of an embodiment of a radio transmitter;

[0023] FIG. 4 is a schematic view of another embodiment of a power amplifier arrangement;

[0024] FIG. 5 is a flow diagram of steps of an embodiment of a method for compensating memory effects in a power amplifier;

[0025] FIG. 6 is a diagram illustrating simulation results of different predistortion models;

[0026] FIG. 7 is a schematic block diagram illustrating an embodiment of a general compensation model;

[0027] FIG. 8 is a diagram illustrating simulation results of other predistortion models; and

[0028] FIG. 9 is a diagram illustrating simulation results of yet another predistortion model.

DETAILED DESCRIPTION

[0029] Throughout the drawings, the same reference designations are used for similar or corresponding elements.

[0030] For a better understanding of the proposed technology, it may be useful to begin with a brief overview of pre-distortion of power amplifiers.

[0031] FIG. 1 illustrates an example of a power amplifier arrangement 70. The power amplifier arrangement comprises a power amplifier 72 and a power amplifier predistortion arrangement 80. An original signal 75 is obtained by the power amplifier predistortion arrangement 80 at a signal input 84. The power amplifier predistortion arrangement 80 comprises a predistorter 82 for predistorting said original signal for non-linear characteristics of said power amplifier into a predistorted signal 85. Examples of such distortion characteristics could e.g. be momentary non-linear gain responses and/or memory effects. The predistorted signal 85 is provided to the power amplifier 72, which is configured to amplify the predistorted signal into an amplified output signal 65. An objective for the operation of the predistorter 82 is to achieve an as linear as possible amplified output signal 65.

[0032] The operation principle of the predistorter 82 can schematically be illustrated by FIG. 2. The predistorter is given a predistorter gain characteristics according to the diagram D1. The power amplifier has an intrinsic gain characteristics according to the diagram D2. Together, these gains are combined into a total gain, as illustrated in diagram D3. The aim for the predistorter is thus to provide a constant total gain of the amplified output signal with reference to the original signal.

[0033] A power amplifier arrangement as in FIG. 1 may be applicable in many different technical contexts. However, one of the more common applications is in radio transmitters, for instance in wireless communication systems. FIG. 3 schematically illustrates such an implementation. An original signal 75 is provided to a radio transmitter 60. The original signal 75 is converted into an amplified output signal 65 by the power amplifier arrangement 70. An antenna 62 is configured to transmit a radio signal 69 according to the amplified output signal 65.

[0034] As mentioned in background, memory effects of power amplifiers are causing distortions of the wide bandwidth signals despite the operation of prior art predistortion arrangements. However, it has now been discovered that memory effect is related to not only conventional power and frequency, but also the variation of power with time. In other words, not only the momentary power, or average power of a certain time period, plays a role in the relation to memory effects, but also the prevailing change rate of the power is involved. The derivate of the power is thus of interest.

[0035] Therefore, the quantity

[00001]$\begin{array}{cc}\frac{\mathrm{dP}\left(t\right)}{\mathrm{dt}}=.Math..Math.P\left(t\right)=P\left(t\right)-P\left(t-1\right),& \left(1\right)\end{array}$

[0036] where t denotes a time slot is also a dependency factor of memory effect. In this relation, P may mean power of an instantaneous original signal, but it could also stand for an average power over a short predetermined period of time.

[0037] With reference to FIG. 1, in one embodiment of a power amplifier predistortion arrangement 80 for compensating memory effects in a power amplifier. the power amplifier predistortion arrangement 80 is configured to obtain an original signal 75. The power amplifier predistortion arrangement 80 is furthermore configured to determine a variation of power of the original signal with time. The power amplifier predistortion arrangement 80 is configured to predistort the original signal 75 for memory effects of the power amplifier into a predistorted signal 85, whereby the predistortion of the original signal is performed in dependence of the variation of power.

[0038] FIG. 4 illustrates another implementation of an embodiment of a power amplifier predistortion arrangement 80 for compensating memory effects in a power amplifier. The predistorter 82 here comprises a power differentiator 86. The power differentiator 86 is configured for determining a variation of power of the original signal 75 with time. The predistorter 82 is configured to predistort the original signal 75 in dependence of the variation of power into the predistorted signal 85

[0039] In analogy, FIG. 5 illustrates a flow diagram of steps of a method for compensating memory effects in a power amplifier. In step S10, an original signal is obtained. In step S12, a variation of power of the original signal with time is determined. In step S14, the original signal is predistorted for memory effects of the power amplifier into a predistorted signal. This predistorting is performed by predistorting the original signal in dependence of the variation of power.

[0040] In one embodiment, the predistorted signal is further amplified into an amplified output signal, in step S14.

[0041] As indicated above, the variation of power does in some aspect reflect the derivate of the power. In one embodiment, the variation of power of the original signal with time is a power measure difference between consecutive time slots. In a particular embodiment, the power measure difference is a difference of instantaneous signal power. In another particular embodiment, the power measure difference is a difference of average signal power. The average signal power is determined over a predetermined period of time.

[0042] Simulations have been performed to prove the effectiveness of the above presented ideas. The simulations were performed on a set of real measurement data from power amplifier input and output based on 60 MHz LTE signals. Following models are used to compare the inverse modeling performance. A simulation with an un-predistorted system was made, together with a system with predistortion compensating for momentary non-linear gain responses of the power amplifier according to a Memory Polynomial (MP) approach and a system utilizing predistortion in dependence of the variation of power as a complement to the MP approach.

[0043] The Normalized Mean Square Error (NMSE) was compared for these different models. It was found that the conventional MP approach reached an NMSE of 36.23 dB and the approach using predistortion in dependence of the variation of power reached a level of 42.40 dB.

[0044] A comparison of Adjacent Channel Leakage Ratio (ACLR) of the different models was also performed. The results are schematically illustrated in FIG. 6. Curve D4 corresponds to the un-predistorted power amplifier, curve D5 corresponds to the predistortion using a conventional MP approach and curve D6 corresponds to the approach using predistortion in dependence of the variation of power.

[0045] The prior art compensations for memory effect dependencies have been performed as a mono-factor approach. However, in order to improve the compensation performance further, it is preferred to utilize different memory effect factors jointly and effectively.

[0046] In one embodiment, the method for compensating memory effects in a power amplifier comprises the further step of determining an additional memory effect dependency factor from the original signal. The step of predistorting consequently comprises predistorting the original signal in further dependence of the additional memory effect dependency factor.

[0047] To this end, a compensation model for memory effect and nonlinearity is proposed to be expressed as follow:

y(t)=.sub.0X.sub.0(t)+.sub.k=1.sup.K.sub.k.sub.m=1.sup.M(k).sub.m,k(t)X.sub.k(t),(2)

[0048] where .sub.m,k means memory effect dependency factors. These memory effect dependency factors include the variation of power but may additionally include dependencies of conventional power and/or frequency and/or other types of dependency factors. X.sub.k(t) stands for a vector of a power amplifier behavioral model structure. Non-exclusive examples of such models are MP, and Generalized MP (GMP). .sub.k are corresponding coefficients vector of the model. Each X.sub.k(t) could be same or different, depending on the nature of the dependency factor involved and resources and performance tradeoff. k corresponds to a particular kind of dependency factor. M is an integer and defines the number of dependency factors of each kind. Furthermore, M might be a function of k.

[0049] In a particular embodiment, one of the memory effect dependency factors is dependent on the variation of power of said original signal.

[0050] A vector of a power amplifier behavioral model is extracted and summarized based on the power amplifier basic physical character and on experiment. This model is thus a kind of description of the responses of the power amplifier. The Different power amplifies behavioral model focus on different aspects such as accuracy or numerical stability. In other words, different power amplifier behavioral models may be chosen to balance the performance and complexity. As mentioned above different X.sub.k(t) could be employed for different dependency factors in order to emphasize different aspects. However, as was utilized in the above simulations, the X.sub.0(t)=X.sub.1(t)= . . . =X.sub.k(t)=X(t) may be selected to be the same.

[0051] In one particular example, the vector of the power amplifier behavioral model structure could be selected as:

[00002]$\begin{array}{cc}{X}_k\left(t\right)=\left[x\left(t\right),x\left(t\right).Math.{.Math.x\left(t\right).Math.}^2,\mathrm{.Math.}.Math.,x\left(t\right).Math.{.Math.x\left(t\right).Math.}^{2.Math.L},.Math.\mathrm{.Math.}.Math..Math.\mathrm{.Math.},.Math.x\left(t-Q\right),x\left(t-Q\right).Math.{.Math.x\left(t-Q\right).Math.}^2,\mathrm{.Math.}.Math.,x\left(t-Q\right).Math.{.Math.x\left(t-Q\right).Math.}^{2.Math.L}\right].& \left(3\right)\end{array}$

[0052] Q denotes the memory length and L stands for nonlinearity order. Both these parameters affect the structure, the number of items and thereby complexity. This approach is a common model in the predistortion field, and was used in the above simulations to demonstrate the robustness of our method. A memory polynomial with memory length (Q) of 4 and nonlinearity order (2L+1) of 11 was utilized as X(t) in that particular simulation.

[0053] In another particular example, the vector of the power amplifier behavioral model structure could be selected as:

[00003]$\begin{array}{cc}{X}_k\left(t\right)=\left[x\left(t\right),x\left(t\right).Math..Math.x\left(t\right).Math.,\mathrm{.Math.}.Math.,x\left(t\right).Math.{.Math.x\left(t\right).Math.}^L,.Math.\mathrm{.Math.}.Math..Math.\mathrm{.Math.},.Math.x\left(t-Q\right),x\left(t-Q\right).Math..Math.x\left(t-Q\right).Math.,\mathrm{.Math.}.Math.,x\left(t-Q\right).Math.{.Math.x\left(t-Q\right).Math.}^L\right]& \left(4\right)\end{array}$

[0054] Many other types of power amplifier behavioral models are also used in this field and can be applied in the present model.

[0055] As mentioned above, .sub.k stands for the coefficients of model. It is a vector and corresponds to the items in the vector X.sub.k(t). There are many adaptive algorithms in the prior art field of predistortion to estimate these coefficients and its core is to compare and process the original signal, the predistorted signal and the amplified output signal to generate .sub.k. It can be noted that .sub.k does not include any memory effect information and cannot therefore be combined into the same factors as the memory effect dependency.

[0056] In one particular embodiment, the predistorted signal, y(t), is determined as:

y(t)=.sub.0X.sub.0(t)+.sub.3.sub.3(t)X.sub.3(t),(5)

[0057] where X.sub.k(t), k=0, 3, is a vector of a power amplifier behavioural model structure, .sub.k, k=0, 3, are corresponding coefficients of said power amplifier behavioural model structure and .sub.3 is a dependency factor being dependent on said variation of power of said original signal.

[0058] The above presented general compensation model can also be illustrated as a model structure, as schematically shown in FIG. 7. From this schematics, the model structure can be understood in detail. An original signal 75, x(t), is received in a predistorter 82 on the signal input 84. A vector of a power amplifier behavioral model X.sub.0(t) is created in a non-linearity section 90 based on the original signal and is multiplied with the corresponding coefficient vector .sub.0. This gives basically a correction of the momentary non-linear gain responses of the power amplifier. The original signal 75 is also provided to a number of memory effect sections 91A-K. In each section, a power amplifier behavioral model X.sub.k(t), which may be the same or different, is used. In each memory effect section 91A, the original signal 75 is further provided to one or more factor generators 92. Each of these factor generators 92 are targeting a particular memory effect dependency and generates a factor of memory effect dependency based on at least the latest original signal 75. In each memory effect section 91, the factors of memory effect dependency are multiplied together to form a total section factor and is then multiplied with the power amplifier behavioral model X.sub.k(t) and also multiplied with the corresponding coefficient vector .sub.k. The outputs from all sections 90, 91A-K are summed together into the predistorted signal 85, y(t).

[0059] In the particular embodiment presented by the relation (5) here above, the predistorter 82 comprises one memory effect section 91A with one factor generator. This factor generator can thus be considered as constituting a power differentiator for determining a variation of power of said original signal with time.

[0060] However, the general compensation model opens up for using more than one dependency factor for the power amplifier memory effects.

[0061] In FIG. 8, further simulation results are illustrated. Curve D7 corresponds to an approach using predistortion in dependence of the mean power. Curve D8 corresponds to an approach using predistortion in dependence of the frequency. These approaches correspond to NMSE of 42.02 dB and 41.68, respectively. A memory polynomial with memory length of 4 and nonlinearity order of 11 is used as X(t) as in previous simulations. NMSE and ACLR performance are improved greatly by using each memory effect dependency factor respectively comparing with conventional MP (a). From the point of view of NMSE, the new factor based on the variation of power (FIG. 6) achieves a slightly better performance comparing with conventional factors of curves D7 and D8.

[0062] However, an even better result can be achieved if more than one memory effect dependency is used. Curve D9 illustrates a simulation, where predistortion in dependence of the mean power, in dependence of the frequency and in dependence of the variation of power. A NMSE of 43.12 dB was achieved.

[0063] In a particular embodiment, the method for compensating memory effects in a power amplifier comprises the further step of determining a mean power over a predetermined period of time of the original signal and a frequency of the original signal. The predistorting then comprises predistorting of the original signal in further dependence of the mean power and of said frequency.

[0064] One particular embodiment can be described in terms of an equation. A predistorted signal, y(t), is then determined as:

y(t)=.sub.0X.sub.0(t)+.sub.1.sub.1(t)X.sub.1(t)+.sub.2.sub.2(t)X.sub.2(t)+.sub.3.sub.3(t)X.sub.3(t).(6)

[0065] In this relation, X.sub.k(t), k=0, 1, 2, 3, is a vector of a power amplifier behavioural model structure, .sub.k, k=0, 1, 2, 3, are corresponding coefficients of said power amplifier behavioural model structure, .sub.1 is a dependency factor being dependent on the mean power of the original signal, .sub.2 is a dependency factor being dependent on the frequency of the original signal and .sub.3 is a dependency factor being dependent on the variation of power of the original signal.

[0066] The NMSE and ACLR performance are improved more by using these factors jointly.

[0067] Further dependency factors may also be utilized in an analogous manner according to the general compensation model (2), presented above.

[0068] A minor disadvantage with the use of multiple dependency factors is that addition of the individual correction results requires relatively large computational effort. In other words, multi-factor compensation will cost large digital resources. This corresponds to a situation in equation (2) having a large k.

[0069] However, some memory effect dependency factors have been found to have a low correlation. This opens up for sharing one common model using multiplication and save digital resources. In equation (2), this corresponds to cases where M is larger than 1. In such a way, the parameter k can be reduced while maintaining the same total number of dependency factors.

[0070] A simulation has been performed on a resource-friendly system where the dependency factors of the mean power of the original signal and of the frequency share the same model. The result is shown in FIG. 9. Curve D9 is the same as presented in FIG. 6, while curve D10 corresponds to the resource-friendly approach. The NMSE corresponding to the curve D10 is 42.94 dB, which is very close indeed to the optimum multi-factor compensation of curve D6. However, the computational complexity is reduced considerably.

[0071] In a particular embodiment, the predistorted signal, y(t), is determined as:

y(t)=.sub.0X.sub.0(t)+.sub.1.sub.1(t).sub.2(t)X.sub.1(t)+.sub.3.sub.3(t)X.sub.3(t),(7)

[0072] where X.sub.k(t), k=0, 1, 3, is a vector of a power amplifier behavioural model structure, .sub.k, k=0, 1, 3, are corresponding coefficients of the power amplifier behavioural model structure, .sub.1 is a dependency factor being dependent on the mean power of the original signal, .sub.2 is a dependency factor being dependent on the frequency of the original signal and .sub.3 is a dependency factor being dependent on the variation of power of the original signal.

[0073] As mentioned above, a power amplifier predistortion arrangement or a power amplifier arrangement according to the ideas presented above can be utilized in different kinds of radio transmitters. The radio transmitters may constitute parts of different kinds of wireless communication devices and radio communication network nodes.

[0074] As used herein, the non-limiting terms User Equipment (UE), station (STA) and wireless communication device or wireless device may refer to a mobile phone, a cellular phone, a Personal Digital Assistant (PDA) equipped with radio communication capabilities, a smart phone, a laptop or Personal Computer (PC) equipped with an internal or external mobile broadband modem, a tablet PC with radio communication capabilities, a target device, a device to device UE, a machine type UE or UE capable of machine to machine communication, iPAD, Customer Premises Equipment (CPE), Laptop Embedded Equipment (LEE), Laptop Mounted Equipment (LME), Universal Serial Bus (USB) dongle, a portable electronic radio communication device, a sensor device equipped with radio communication capabilities or the like. In particular, the term UE, the term Station, the term wireless device and the term wireless communication device should be interpreted as non-limiting terms comprising any type of wireless device communicating with a network node in a wireless communication system and/or possibly communicating directly with another wireless communication device. In other words, a wireless communication device may be any device equipped with circuitry for wireless communication according to any relevant standard for communication.

[0075] As used herein, the non-limiting term network node may refer to base stations, access points, network control nodes such as network controllers, radio network controllers, base station controllers, access controllers, and the like. In particular, the term base station may encompass different types of radio base stations including standardized base stations such as Node Bs (NB), or evolved Node Bs (eNB) and also macro/micro/pico radio base stations, home base stations, also known as femto base stations, relay nodes, repeaters, radio access points, Base Transceiver Stations (BTS), and even radio control nodes controlling one or more Remote Radio Units (RRU), or the like.

[0076] The general non-limiting term communication unit includes network nodes and/or associated wireless devices.

[0077] As used herein, the term network device may refer to any device located in connection with a communication network, including but not limited to devices in access networks, core networks and similar network structures. The term network device may also encompass cloud-based network devices.

[0078] It will be appreciated that the methods and devices described herein can be combined and re-arranged in a variety of ways.

[0079] For example, embodiments may be implemented in hardware, or in software for execution by suitable processing circuitry, or a combination thereof.

[0080] The steps, functions, procedures, modules and/or blocks described herein may be implemented in hardware using any conventional technology, such as discrete circuit or integrated circuit technology, including both general-purpose electronic circuitry and application-specific circuitry.

[0081] Alternatively, or as a complement, at least some of the steps, functions, procedures, modules and/or blocks described herein may be implemented in software such as a computer program for execution by suitable processing circuitry such as one or more processors or processing units.

[0082] Examples of processing circuitry includes, but is not limited to, one or more microprocessors, one or more Digital Signal Processors (DSPs), one or more Central Processing Units (CPUs), video acceleration hardware, and/or any suitable programmable logic circuitry such as one or more Field Programmable Gate Arrays (FPGAs), or one or more Programmable Logic Controllers (PLCs).

[0083] It should also be understood that it may be possible to re-use the general processing capabilities of any conventional device or unit in which the proposed technology is implemented. It may also be possible to re-use existing software, e.g. by reprogramming of the existing software or by adding new software components.

[0084] According to an aspect of the proposed technology there is provided a power amplifier predistortion arrangement configured to obtain an original signal, to determine a variation of power of the original signal with time and to predistort the original signal for memory effects of the power amplifier into a predistorted signal. The power amplifier predistortion arrangement is configured to predistort the original signal in dependence of the variation of power.

[0085] In one embodiment, the power amplifier predistortion arrangement is based on a processor-memory implementation according to an embodiment. In this particular example, the power amplifier predistortion arrangement comprises a processor and a memory, the memory comprising instructions executable by the processor, whereby the processor is operative to obtain an original signal, to determine a variation of power of the original signal with time and to predistort the original signal for memory effects of the power amplifier into a predistorted signal.

[0086] In another embodiment, the power amplifier predistortion arrangement is based on a hardware circuitry implementation. Particular examples of suitable hardware (HW) circuitry include one or more suitably configured or possibly reconfigurable electronic circuitry, e.g. Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), or any other hardware logic such as circuits based on discrete logic gates and/or flip-flops interconnected to perform specialized functions in connection with suitable registers (REG), and/or memory units (MEM).

[0087] In another embodiment, the power amplifier predistortion arrangement is based on combination of both processor(s) and hardware circuitry in connection with suitable memory unit(s)

[0088] Alternatively, or as a complement, at least some of the steps, functions, procedures, modules and/or blocks described herein may be implemented in software such as a computer program for execution by suitable processing circuitry such as one or more processors or processing units.

[0089] The flow diagram or diagrams presented herein may therefore be regarded as a computer flow diagram or diagrams, when performed by one or more processors. A corresponding apparatus may be defined as a group of function modules, where each step performed by the processor corresponds to a function module. In this case, the function modules are implemented as a computer program running on the processor.

[0090] Examples of processing circuitry includes, but is not limited to, one or more microprocessors, one or more Digital Signal Processors (DSPs), one or more Central Processing Units (CPUs), video acceleration hardware, and/or any suitable programmable logic circuitry such as one or more Field Programmable Gate Arrays (FPGAs), or one or more Programmable Logic Controllers (PLCs).

[0091] It should also be understood that it may be possible to re-use the general processing capabilities of any conventional device or unit in which the proposed technology is implemented. It may also be possible to re-use existing software, e.g. by reprogramming of the existing software or by adding new software components.

[0092] In a particular embodiment, a computer program comprises instructions, which when executed by at least one processor, cause the at least one processor to obtain an original signal, to determine a variation of power of the original signal with time and to predistort the original signal for memory effects of the power amplifier into a predistorted signal. The instructions, when executed by the at least one processor, cause the at least one processor to predistort the original signal in dependence of the variation of power.

[0093] The proposed technology also provides a carrier comprising the computer program, wherein the carrier is one of an electronic signal, an optical signal, an electromagnetic signal, a magnetic signal, an electric signal, a radio signal, a microwave signal, or a computer-readable storage medium.

[0094] By way of example, the software or computer program may be realized as a computer program product, which is normally carried or stored on a computer-readable medium in particular a non-volatile medium. The computer-readable medium may include one or more removable or non-removable memory devices including, but not limited to a Read-Only Memory (ROM), a Random Access Memory (RAM), a Compact Disc (CD), a Digital Versatile Disc (DVD), a Blu-ray disc, a Universal Serial Bus (USB) memory, a Hard Disk Drive (HDD) storage device, a flash memory, a magnetic tape, or any other conventional memory device. The computer program may thus be loaded into the operating memory of a computer or equivalent processing device for execution by the processing circuitry thereof.

[0095] The flow diagram or diagrams presented herein may be regarded as a computer flow diagram or diagrams, when performed by one or more processors. A corresponding apparatus may be defined as a group of function modules, where each step performed by the processor corresponds to a function module. In this case, the function modules are implemented as a computer program running on the processor.

[0096] The computer program residing in memory may thus be organized as appropriate function modules configured to perform, when executed by the processor, at least part of the steps and/or tasks described herein.

[0097] In one embodiment, a power amplifier predistortion arrangement for compensating memory effects in a power amplifier, comprises a signal input for obtain an original signal. The power amplifier predistortion arrangement further comprises a predistorter for predistorting the original signal for memory effects of the power amplifier into a predistorted signal. The predistorter comprises a power differentiator for determining a variation of power of the original signal with time. The predistorter is configured to predistort the original signal in dependence of the variation of power.

[0098] In the above description, it has been shown that the introduction of a new factor of compensation for memory effect based on power variations leads to improved results. Furthermore, by utilizing a proposed compensation structure of using memory effect dependency factors jointly, the result can be improved even more. Only slightly decreased performance is obtained if the compensation structure is simplify based on low correlation between factors.

[0099] The embodiments described above are merely given as examples, and it should be understood that the proposed technology is not limited thereto. It will be understood by those skilled in the art that various modifications, combinations and changes may be made to the embodiments without departing from the present scope as defined by the appended claims. In particular, different part solutions in the different embodiments can be combined in other configurations, where technically possible.

ABBREVIATIONS

[0100] ACLR Adjacent Channel Leakage Ratio [0101] ASIC Application Specific Integrated Circuits [0102] BTS Base Transceiver Stations [0103] CD Compact Disc [0104] CPE Customer Premises Equipment [0105] CPU Central Processing Units [0106] DSP Digital Signal Processors [0107] DVD Digital Versatile Disc [0108] eNB evolved Node B [0109] FPGA Field Programmable Gate Arrays [0110] GaN Gallium Nitride [0111] GMP General memory polynomial [0112] HDD Hard Disk Drive [0113] HW hardware [0114] I/O input/output [0115] LEE Laptop Embedded Equipment [0116] LME Laptop Mounted Equipment [0117] MEM memory units [0118] MP Memory polynomial [0119] NB Node B [0120] ND Network Device [0121] NMSE Normalized mean square error [0122] PA Power Amplifier [0123] PC Personal Computer [0124] PDA Personal Digital Assistant [0125] PLC Programmable Logic Controllers [0126] RAM Random Access Memory [0127] REG registers [0128] ROM Read-Only Memory [0129] RRU Remote Radio Units [0130] STA Station [0131] SW software [0132] UE User Equipment [0133] USB Universal Serial Bus

REFERENCES

[0134] [1] T. Ota, H. Ishikawa, and K. Nagatani, A novel adaptive digital predistortion for wideband power amplifiers with memory effects, in Proc. Asia-Pacific Microw. Conf. (APMC), vol. 1. December 2015, pp. 1-3.

[0135] [2] A. S. Tehrani, T. Eriksson, and C. Fager, Modeling of long term memory effects in RF power amplifiers with dynamic parameters, in IEEE MTT-S Int. Microw. Symp. Dig., Montreal, QC, Canada, June 2012, pp. 1-3.