Multi-stage sub-THz frequency generator incorporating injection locking

10862423 ยท 2020-12-08

Assignee

Inventors

Cpc classification

International classification

Abstract

A novel and useful mm-wave frequency generation system is disclosed that takes advantage of injection locking techniques to generate an output oscillator signal with improved phase noise (PN) performance and power efficiency. Low frequency and high frequency DCOs as well as a pulse generator make up the oscillator system. A fundamental low frequency (e.g., 30 GHz) signal and its sufficiently strong higher (e.g., fifth) harmonic (e.g., 150 GHz) are generated simultaneously in a single oscillator system. The second high frequency DCO having normally poor phase noise is injected locked to the first low frequency DCO having good phase noise. Due to injection locking, the high frequency output signal generated by the second DCO exhibits good phase noise since the phase noise of the second DCO tracks that of the first DCO.

Claims

1. An oscillator system, comprising: a reference frequency pulse generator operative to generate a reference signal containing a plurality of harmonics; a first oscillator operative to receive said reference signal output by said pulse generator and to resonate at and generate a first fundamental frequency and one or more harmonic signals therefrom, wherein said first oscillator is injection locked to said pulse generator at one of said plurality of harmonics generated by said pulse generator; and a second oscillator operative to receive and resonate at said one of the harmonic signals output by said first oscillator, and to generate an output signal therefrom at a frequency of the one of the harmonic signals output by said first oscillator, wherein said second oscillator is injection locked to said first oscillator at the frequency of the one of the harmonic signals output from said first oscillator.

2. The oscillator system according to claim 1, wherein said reference signal generated by said pulse generator exhibits relatively good phase noise.

3. The oscillator system according to claim 1, wherein said first oscillator's one or more harmonic signals exhibits relatively good phase noise being injection locked to said pulse generator.

4. The oscillator system according to claim 1, wherein said second oscillator normally exhibits relatively bad phase noise but is operative to generate said output signal having relatively good phase noise being injection locked to said first oscillator.

5. The oscillator system according to claim 1, wherein said second oscillator is operative to generate relatively high output power at said output node.

6. The oscillator system according to claim 1, wherein said second oscillator exhibits a relatively wide locking range.

7. An oscillator system, comprising: a pulse generator having relatively good phase noise operative to generate a reference frequency signal containing a plurality of harmonics; a first oscillator operative to receive said reference frequency signal and to resonate at and generate a millimeter wave output fundamental frequency signal and a higher harmonic signal, wherein said first oscillator is injection locked to said reference frequency signal output of said pulse generator at one of the plurality of harmonics generated by the pulse generator; and a second oscillator having relatively poor phase noise operative to receive the higher harmonic signal, and to generate an output oscillator signal therefrom at a frequency of the higher harmonic signal and at an output node having relatively good phase noise, wherein said second oscillator is injection locked to said first oscillator at the frequency of the higher harmonic signal, wherein the phase noise of said second oscillator tracks that of said first oscillator.

8. The oscillator system according to claim 7, wherein said second oscillator is operative to generate relatively high output power at said output node.

9. The oscillator system according to claim 7, wherein the phase noise of said first oscillator is relatively clean due to the phase noise of said first oscillator tracking that of said pulse generator.

10. The oscillator system according to claim 7, wherein said first oscillator comprises a class F oscillator operative to generate a relatively strong higher harmonic signal.

11. The oscillator system according to claim 7, wherein said second oscillator exhibits a relatively wide locking range.

12. The oscillator system according to claim 7, wherein the higher harmonic signal generated by said first oscillator comprises a fifth harmonic of the output fundamental frequency signal.

13. A method of generating an output oscillator signal, comprising: generating a reference frequency signal containing a plurality of millimeter wave harmonics; first injection locking a first oscillator to one of the plurality of millimeter wave harmonics thereby generating a millimeter wave fundamental first oscillator signal and a harmonic thereof, said first oscillator operative to resonate at a frequency of said fundamental first oscillator signal; and second injection locking a second oscillator to the harmonic output of said first oscillator and generating the output oscillator signal therefrom at an output node, said second oscillator operative to resonate at a frequency of said harmonic output of said first oscillator.

14. The method according to claim 13, wherein said reference frequency signal having relatively good phase noise and said second oscillator normally having relatively poor phase noise.

15. The method according to claim 13, wherein the harmonic of the fundamental first oscillator signal generated by said first oscillator comprises a fifth harmonic thereof.

16. The method according to claim 13, further comprising generating the output oscillator signal to have relatively high output power at said output node.

17. The method according to claim 13, further comprising providing said second oscillator with a relatively wide locking range.

18. An oscillator system, comprising: a pulse generator having relatively good phase noise operative to generate a reference frequency signal having a plurality of harmonics; a first oscillator operative to receive the reference frequency signal output by said pulse generator and to resonate at and generate a fundamental signal and to also generate a first higher harmonic signal therefrom, wherein said first oscillator is injection locked to a first one of the plurality of harmonics output of said pulse generator; a second oscillator operative to receive said first higher harmonic signal, to resonate at said first higher harmonic signal, to generate a first output oscillator signal at an output node at a frequency of said first higher harmonic signal, wherein said second oscillator is injection locked to said first oscillator at the frequency of said first higher harmonic signal causing the phase noise of said second oscillator to track that of said first oscillator; and a third oscillator operative to receive said reference signal and to generate a second output signal therefrom at a second higher harmonic frequency, wherein said third oscillator resonating at and injection locked to a second one of the plurality of harmonics output of said pulse generator, wherein the phase noise of said third oscillator tracks the relatively good phase noise of said pulse generator.

19. The oscillator system according to claim 18, further comprising a buffer circuit adapted to receive the signal output of said third oscillator and generate a buffered output signal therefrom.

20. The oscillator system according to claim 18, wherein: said first higher harmonic of said fundamental signal generated by said first oscillator comprises a fifth harmonic thereof; and said second higher harmonic output of said pulse generator comprises a fifth harmonic thereof.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention is explained in further detail in the following exemplary embodiments and with reference to the figures, where identical or similar elements may be partly indicated by the same or similar reference numerals, and the features of various exemplary embodiments being combinable. The invention is herein described, by way of example only, with reference to the accompanying drawings, wherein:

(2) FIG. 1 is a high-level block diagram illustrating an example high frequency oscillator employing multiplier techniques;

(3) FIG. 2 is a high-level block diagram illustrating an example high frequency oscillator employing push-push techniques;

(4) FIG. 3 is a high-level block diagram illustrating an example fundamental high frequency oscillator;

(5) FIG. 4 is a high-level block diagram illustrating an example multi-stage high-frequency oscillator utilizing injection locking techniques;

(6) FIG. 5 is a schematic diagram illustrating an example multi-stage high-frequency oscillator utilizing injection locking techniques;

(7) FIG. 6 is a schematic diagram illustrating an example pulse generator;

(8) FIG. 7 is a schematic diagram illustrating an example multi-stage dual high-frequency oscillator utilizing injection locking techniques;

(9) FIG. 8 is a schematic diagram illustrating an example transformer circuit;

(10) FIG. 9 is a diagram illustrating X-factor versus harmonic ratio for different values of k.sub.m;

(11) FIG. 10 is a diagram illustrating the dependency of X-factor on k.sub.m;

(12) FIG. 11 is a diagram illustrating the dependency of tank input resistance on k.sub.m;

(13) FIG. 12 is a diagram illustrating the dependency of equivalent quality factor of transient based resonant at 30 GHz on k.sub.m;

(14) FIG. 13 is a diagram illustrating the drain current of the 30 GHz oscillator with strengthened 5.sup.th harmonic;

(15) FIG. 14 is a diagram illustrating the dependency of the normalized resonance frequency on k.sub.m;

(16) FIG. 15 is a diagram illustrating the primary and secondary inductance as a function of frequency;

(17) FIG. 16 is a diagram illustrating the primary and secondary quality factor (Q) as a function of frequency;

(18) FIG. 17 is a diagram illustrating the transformer coupling factor as a function of frequency;

(19) FIG. 18 is a diagram illustrating the oscillator voltage waveform in differential mode;

(20) FIG. 19 is a diagram illustrating the oscillator gate voltage waveform;

(21) FIG. 20 is a diagram illustrating the transformed-based tank input impedance Z.sub.11 magnitude;

(22) FIG. 21 is a diagram illustrating the transformed-based tank trans-impedance Z.sub.21 magnitude;

(23) FIG. 22 is a diagram illustrating an example ratio of fifth harmonic to fundamental magnitude;

(24) FIG. 23 is a diagram illustrating example phase noise for the oscillator circuit of FIG. 5;

(25) FIG. 24 is a diagram illustrating a first example locked signal spectrum of the oscillator system; and

(26) FIG. 25 is a diagram illustrating a second example locked signal spectrum of the oscillator system.

DETAILED DESCRIPTION OF THE INVENTION

(27) The present invention is a novel and useful mm-wave frequency generation system that takes advantage of injection locking techniques to generate an output oscillator signal with improved phase noise (PN) performance and power efficiency. A fundamental low frequency (e.g., 30 GHz) signal and its sufficiently strong higher (e.g., fifth) harmonic at a high frequency (e.g., 150 GHz) are generated simultaneously in a single oscillator.

(28) A high-level block diagram illustrating an example high frequency oscillator employing a multiplier technique is shown in FIG. 1. In this embodiment, the oscillator, generally referenced 10, comprises a relatively low frequency reference 12 (150/m GHz). This reference is multiplied m times via frequency multiplier block 14. The output is buffered and amplified via amplifier 16 to generate the desired oscillator output frequency (150 GHz in this example). Oscillators based on frequency multipliers at this high frequency typically have limited locking range or consume large amounts of power in order to achieve large locking range.

(29) A high-level block diagram illustrating an example high frequency oscillator employing a push-push technique is shown in FIG. 2. In this example, the oscillator, generally referenced 20, comprises a 150/m GHz push-push oscillator block 22 containing m-push oscillators. The push-push technique is used to obtain oscillation at high frequencies. The output of block 22 is buffered and amplified via amplifier 24 to generate the desired oscillator output frequency (150 GHz in this example).

(30) An oscillator with m-push oscillators utilize frequency dividers operating at 150/m GHz, avoiding the use of frequency multipliers. This oscillator type, however, suffers from low output power and mismatches among the m oscillators. Among this type, push-push oscillators are the most common and easiest to implement. The required large common mode (CM) swing, however, can increase the 1/f noise upconversion. Moreover, the conversion from single-ended CM signal to a differential output may introduce large phase error.

(31) Both of these oscillator circuits, suffer from high power consumption and low output power. Thus, the power efficiency of these oscillator circuit techniques is a significant bottleneck to using them in real world applications.

(32) A high-level block diagram illustrating an example fundamental high frequency oscillator is shown in FIG. 3. As shown in FIG. 3, the oscillator, generally referenced 30, comprises a high frequency reference 32 (e.g., 150 GHz), and amplifier 34 which functions to generate the oscillator output at a high fundamental frequency. This is one of the first requirements of designing a high-speed oscillator. This technique, however, is not sufficient at high frequency where it is restricted by the f.sub.max of the semiconductor process devices used to construct to the oscillator. Thus, the phase noise and gain requirements are not met. Moreover, the quality factor of passive components deteriorates at relatively high frequencies.

(33) Several difficulties of designing oscillators of the type described supra include (1) the parasitic capacitance of active devices takes up a large share of the relatively small tank capacitance, thus limiting the frequency tuning range; (2) to achieve a tuning range of >15%, the poor Q-factor of the tuning capacitance dominates the Q-factor of the resonator, thus limiting the achievable phase noise. The 150 GHz frequency dividers must achieve large locking range to ensure sufficient overlap with the oscillator tuning range under PVT variations. There is a strong tradeoff, however, between the locking range and the power consumption.

(34) To alleviate the design challenges for mm-wave oscillators and dividers without shifting more stress onto other blocks, a 150 GHz frequency generation technique based on a 30 GHz oscillator and higher (e.g., fifth) harmonic is disclosed. To realize that goal, the higher (e.g., fifth) harmonic as well as the fundamental are applied to a 30 GHz transformer-based dual-resonance oscillator. Using this technique, the higher (e.g., fifth) harmonic is the signal of interest.

(35) In accordance with the invention, both a low frequency fundamental (e.g., 30 GHz) and a significant level of its higher (e.g., fifth) harmonic at a high frequency (e.g., 150 GHz) are simultaneously generated within a low frequency, e.g., 30 GHz, oscillator. The generated 150 GHz signal is fed to a second high frequency oscillator. Since, in one embodiment, the oscillator runs at the fundamental frequency of 30 GHz, its resonant tank achieves a better Q-factor than at 150 GHz, which leads to better PN performance. Moreover, the tank has a larger inductance and capacitance. This increases the variable portion of the total tank capacitance and the frequency tuning range.

(36) A high-level block diagram illustrating an example multi-stage high-frequency oscillator utilizing injection locking techniques is shown in FIG. 4. The oscillator, generally referenced 40, comprises pulse generator 42, first low frequency digitally controlled oscillator (DCO) 44, and second high frequency DCO 46. The second DCO is operative to generate and output the target frequency (150 GHz in this example embodiment).

(37) In this example embodiment, the oscillator architecture is based on an injection locking technique. The pulse generator 42 functions as a reference frequency. This eases the design of the frequency divider when the oscillator 40 is used to implement a phase locked loop (PLL). The pulse generator is operative to generate one or more harmonics (n harmonics in this example). The low frequency DCO 44 is injection locked to one of the harmonics generated by the pulse generator. In this example embodiment, the pulse generator fundamental period is 60 ps which corresponds to approximately 16 GHz. The second harmonic at 32 GHz is injection locked to the first low frequency DCO.

(38) In one embodiment, the first DCO comprises a 30 GHz oscillator such as a class F oscillator adapted to produce relatively strong 5th harmonics at 150 GHz. Since the first oscillator is injection locked to the pulse generator which is designed to exhibit relative very good phase noise, the first oscillator output signal (i.e. fundamental as well as harmonics) also has relatively very clean phase noise as well.

(39) The second DCO comprises a relatively high frequency oscillator circuit. In one example, the second oscillator is adapted to generate a 150 GHz signal. The second DCO, however, is designed to normally exhibit relatively poor phase noise performance, i.e. when the DCO is stand-alone without any injection locking in order to conserve power. The signal output of the class F oscillator (i.e. first DCO) is injection locked to the second oscillator which normally features poor phase noise. Note that the strong 5th harmonic of the first oscillator can be injected simultaneously with the fundamental frequency (e.g., 30 GHz) signal to the second oscillator stage, i.e. the high frequency oscillator which in this example embodiment is 150 GHz. This causes the second 150 GHz oscillator to lock relatively easily to the first 30 GHz oscillator. Consequently, the second high frequency oscillator tracks the phase noise of the first oscillator within a relatively wide locking range.

(40) Thus, using this injection locking technique relaxes the design challenges of the second oscillator at 150 GHz at least from a phase noise point of view. Since the injection signal generated by the first oscillator is strong, the second oscillator having wide locking range is locked to the first oscillator and tracks its phase noise. Moreover, since the second oscillator (e.g., 150 GHz) is used as the output stage instead of a multiplier in the architecture described supra, it provides relatively high output voltage swing and high output power at 150 GHz while consuming less power.

(41) A schematic diagram illustrating the circuit implementation of an example multi-stage high-frequency oscillator utilizing injection locking techniques is shown in FIG. 5. The injection oscillator functions to boost the higher (e.g., fifth) harmonic generated by the first DCO. The oscillator, generally referenced 50, comprises two sub-oscillators including a low frequency oscillator 56 (e.g., 30 GHz) and a high frequency oscillator 58 (e.g., 150 GHz). The low frequency oscillator 56 comprises transformer 57 based tank while the high frequency oscillator 58 comprises transformer 59 based tank.

(42) The class F low frequency oscillator 56 comprise transistors M.sub.1 and M.sub.2 and is adapted to produce relatively strong 5.sup.th harmonics. Using the injection transistors M.sub.inj, the 5.sup.th harmonics of the low frequency oscillator 56 is injected to the second stage high frequency oscillator 58 via transistors M.sub.3 and M.sub.4 which in one example embodiment comprises a 150 GHz oscillator normally having relatively poor phase noise. At the output stage, in order to separate the output node from pad parasitics and also deliver maximum power to output, transformer 59 with coupling factor k.sub.m2 is used. Note that a load-pull simulation has been performed at the output stage to determine the required impedance which provides both oscillation and delivers maximum power to the output node.

(43) The class F low frequency oscillator 56 comprise transistors Mi and M2 and is adapted to produce relatively strong 5.sup.th harmonics. Using the injection transistors M.sub.inj, the 5.sup.th harmonics of the low frequency oscillator 56 is injected to the second stage high frequency oscillator 58 via transistors M.sub.3 and M.sub.4 which in one example embodiment comprises a 150 GHz oscillator normally having relatively poor phase noise. At the output stage, in order to separate the output node from pad parasitics and also deliver maximum power to the output, transformer 59 with coupling factor k.sub.m2 is used. Note that a load-pull simulation has been performed at the output stage to determine the required impedance which provides both oscillation and delivers maximum power to the output node.

(44) In one embodiment, the L and C ratios in primary and secondary windings of the transformer based dual tank resonator were optimized to realize fundamental oscillation and its higher (e.g., fifth) harmonic resonance.

(45) A schematic diagram illustrating an example pulse generator is shown in FIG. 6. The pulse generator, generally referenced 60, comprises a frequency reference source 62 that may comprise a crystal oscillator (XO), an external frequency reference, e.g., having sinusoidal shape, etc., or a ring oscillator. The pulse generator is operative to generate an output reference signal 64 having any desired pulse width in accordance with the particular implementation of the invention, e.g., 10-30 or 55-70 ps.

(46) In the example embodiment shown, the noise-free pulse generator comprises a crystal oscillator (XO) slicer that combines the programmable edge delay. The voltage offset V gets converted to time offset T (by adding extra offset-inducing transistors) by delaying the threshold detection of the sinusoidal waveform. This mechanism does not appreciably add any extra noise. Note that the pulse width is controlled from 10-30 ps (or 55-70 ps) with a multibit code.

(47) A schematic diagram illustrating an example multi-stage dual high-frequency oscillator utilizing injection locking techniques is shown in FIG. 7. In this additional embodiment, a dual mode 79/150 GHz band injection locked oscillator system is provided. The oscillator system, generally referenced 70, comprises pulse generator 72, first low frequency digitally controlled oscillator (DCO) 74, second high frequency DCO 76, third DCO 78, and buffer/amplifier 80. In one example embodiment, the first DCO runs at approximately 30 GHz, the second DCO at approximately 150 GHz, and the third DCO at approximately 83 GHz.

(48) The third 79 GHz oscillator 78 is used in a second path which is locked directly to the pulse generator 72. In this embodiment, the first path is the same as the oscillator shown in FIG. 4, described in detail supra. In the second path, the 83 GHz oscillator 78 is locked to 5.sup.th harmonics generated by the pulse generator. The output of the oscillator 78 is input to a buffer and/or amplifier to the output. Note that this embodiment is capable of simultaneously providing dual oscillators in the range of 145-165 GHz and 75-90 GHz for both FMCW automotive radars (e.g., 76-81 GHz) as well as imaging and security applications above 100 GHz.

(49) A schematic diagram illustrating an example transformer circuit is shown in FIG. 8. The transformer circuit, generally referenced 90, comprises a transformer 92 with 1:n turns ratio and coupling factor k.sub.m, primary L.sub.p and secondary L.sub.p windings, and tunable primary capacitor C.sub.1 and secondary capacitor C.sub.2. To provide adequate 5.sup.th harmonic signal, the transformer 57 (FIG. 5) preferable has a relatively high coupling factor k.sub.m.

(50) A diagram illustrating X-factor versus harmonic ratio for different values of k.sub.m is shown in FIG. 9. The X-factor is defined as follows

(51) X = ( L s L p .Math. C 2 C 1 ) ( 1 )
Trace 100 represents the harmonic ratio for k.sub.m=0.9; trace 102 represents the harmonic ratio for k.sub.m=0.8; and trace 104 represents the harmonic ratio for k.sub.m=0.7.

(52) A diagram illustrating the dependency of X-factor on k.sub.m when

(53) 5 1 = 5
is shown in FIG. 10. Note that an X-factor of 12 corresponds to a k.sub.m of 0.67. The required X-factor is used to select an appropriate value of the running capacitor.

(54) A diagram illustrating the dependency of tank input resistance on k.sub.m is shown in FIG. 11. Trace 110 represents R.sub.p5 while trace 112 represents R.sub.p1. A diagram illustrating the dependency of equivalent quality factor of transient based resonant at 30 GHz on k.sub.m is shown in FIG. 12. It is noted that the higher (e.g., fifth) harmonic component generated by the first oscillator is the signal of interest. Thus, it is preferable to make it sufficiently stronger by configuring a larger R.sub.p5/R.sub.p1. On the other hand, however, the equivalent Q factor at the two resonant frequencies affect oscillator performance. A high Q factor at .sub.osc (e.g., 30 GHz) promotes low phase noise, while low Q at 5.sub.osc is appreciated for better tolerance to possible frequency misalignment between the second resonance and 5.sub.osc. As shown in FIG. 11, R.sub.p1 decreases with smaller k.sub.m while R.sub.p5 behaves opposite. Therefore, smaller k.sub.m is desired for large R.sub.p5/R.sub.p1 and in doing a passive gain for the 5.sup.th harmonic is provided. As shown in FIG. 12, however, a larger k.sub.m is required for high Q at .sub.osc to have better phase noise.

(55) In one embodiment, as a trade-off between a large higher (e.g., fifth) harmonic and optimal oscillator performance, k.sub.m=0.67 is selected for R.sub.p5/R.sub.p1=2 with sufficient Q. A diagram illustrating the dependency of the normalized resonance frequency on k.sub.m is shown in FIG. 14 where trace 120 represents .sub.5/30 and trace 122 represents .sub.1/30. Under this condition, as the ratio of .sub.osc5/.sub.osc1 reaches the desired value of five for k.sub.m=0.67 which corresponds to an X-factor of 12 (see FIG. 11).

(56) Intuitively, we know that the drain current of oscillator in the presence of harmonics is close to a square wave as shown in FIG. 13 which illustrates the drain current of the low frequency (e.g., 30 GHz) oscillator with strengthened 5.sup.th harmonic. It is also known that an ideal square wave with an amplitude of one can be represented as an infinite sum of sinusoid waves:

(57) x ( t ) = 4 .Math. k = 1 sin ( 2 ( 2 k - 1 ) f t ) 2 k - 1 = 4 ( sin ( 2 f t ) + 1 3 sin ( 3 * 2 f t ) + 1 5 sin ( 5 * 2 f t ) + .Math. ) . ( 2 )
According to Equation 2, the higher (e.g., fifth) harmonic is a very weak signal. Thus, having passive gain helps to inject a stronger higher (e.g., fifth) harmonic signal to the high frequency (e.g., 150 GHz) oscillator which improves the locking range of the oscillator system. This provide additional motivation to select a coupling factor of k.sub.m=0.67.

(58) A diagram illustrating an example ratio of fifth harmonic to fundamental magnitude is shown in FIG. 22. As indicated, the output signal of the low frequency oscillator (e.g., 30 GHz class F oscillator) provides relatively strong fifth harmonics. Utilizing the passive gain boosted fifth harmonic, the magnitude ratio between fifth to first harmonics components of the drain oscillator voltages increases to almost 10%. This high ratio provides a strong injected signal to the second stage high frequency oscillator (e.g., 150 GHz) and helps it to lock with lower power consumption as well as having a wider locking range.

(59) A diagram illustrating the transformed-based tank input impedance Z.sub.11 magnitude is shown in FIG. 20. The figure shows the tank input impedance with k.sub.m=0.67. Note that a concern may arise that the oscillation could happen at 5.sub.osc (150 GHz) rather than at .sub.osc (30 GHz) due to Rp5>Rp1. Start-up conditions are examined to ensure that the oscillation can only happen at .sub.osc, even if R.sub.p5>R.sub.p1. Barkhausen's phase and gain criteria should be satisfied for a stable oscillation.

(60) A diagram illustrating simulated open loop response of the transformed-based tank trans-impedance Z.sub.21 magnitude is shown in FIG. 21. This figure shows the open loop phase response of transimpedance Z.sub.21. Note that the phase criterion is satisfied only at .sub.osc which shows that there only one stable oscillation mode at 30 GHz is possible here.

(61) Z in = s 3 ( L p L s C 2 ( 1 - k m 2 ) ) + s 2 ( C 2 ( L s r p + L p r s ) ) + s ( L p + r s r p C 2 ) + r p s 4 ( L p L s C 1 C 2 ( 1 - km 2 ) ) + s 3 ( C 1 C 2 ( L s r p + L p r s ) ) + s 2 ( L p C 1 + L s C 2 + r p r s C 1 C 2 ) + s ( r p C 1 + r s C 2 ) + 1 ( 3 )
where k.sub.m, L.sub.p, L.sub.s, C.sub.1, C.sub.2, r.sub.p, and r.sub.s are the magnetic coupling factor of the transformer, primary and secondary inductance, tuning capacitor on the primary and secondary side, and model the equivalent series resistance of the primary and secondary inductance, respectively. In order to find the poles of this transfer function, the equation is solved for the denominator=0 which yields

(62) 1 , 2 2 = 1 + L s C 2 L p C 1 1 + ( L s C 2 L p C 1 ) 2 + L s C 2 L p C 1 ( 4 k m 2 - 1 ) 2 L s C 2 ( 1 - k m 2 ) ( 4 )

(63) Since we are interested in the higher (e.g., fifth) harmonic, the ratio

(64) 2 1 = 5 ,
as a result is given by

(65) 2 1 = 1 + X + 1 + X 2 + X ( 4 k m 2 - 2 ) 1 + X - 1 + X 2 + X ( 4 k m 2 - 2 ) = 5 ( 5 )
where

(66) X = ( L s L p C 2 C 1 ) .
By solving Equation 5, we obtain X as a function of k.sub.m, as shown in FIG. 9.

(67) To determine R.sub.p1 and R.sub.p5, the real part of Equation 3 must be determined first as follows

(68) { Z in ( ) } = ( r p - 2 A ) ) ( C 1 B 4 - C 2 + 1 ) + 2 ( D - B 2 ) ( E - C 1 A 2 ) ( C 1 B 4 - C 2 + 1 ) 2 + ( E - C 1 A 2 ) 2 ( 6 )
where A, B, C, D, and E are calculated as follows
A=C.sub.2(L.sub.sr.sub.p+L.sub.pr.sub.s)
B=L.sub.pL.sub.sC.sub.2(1k.sub.m.sup.2)
C=L.sub.pC.sub.1+L.sub.sC.sub.2+r.sub.pr.sub.sC.sub.1C.sub.2
D=(L.sub.p+r.sub.sr.sub.pC.sub.2)
E=(r.sub.pC.sub.1+r.sub.8C.sub.2)(7)

(69) R.sub.p1 and R.sub.p5 are calculated as R.sub.p1=custom character{Z.sub.in(.sub.1}, R.sub.p5=custom character{Z.sub.in(.sub.2} where it is known that .sub.2=5.sub.1. The results are shown in FIG. 11.

(70) The transimpedance of the tank from primary to secondary winding is as follows

(71) 0 Z 21 ( j ) = j k m L p L s 4 ( L p L s C 1 C 2 ( 1 - k m 2 ) ) - j 3 ( C 1 C 2 ( L s r p + L p r s ) ) - 2 ( L p C 1 + L s C 2 + r p r s C 1 C 2 ) + j ( r p C 1 + r s C 2 ) + 1 ( 8 )
where the equivalent quality factor is derived from the phase response of the open-loop transfer function of G.sub.mZ.sub.21(j)

(72) Q eq = 2 .Math. d [ - G m Z 21 ( j ) ] d .Math. = 1 + ( k m 2 - 1 ) 4 L s L p C 1 C 2 2 L p C 1 Q p + 2 L s C 2 Q s - ( 1 Q p + 1 Q s ) 4 L s L p C 1 C 2 ( 9 )
where Q.sub.p and Q.sub.s are the quality factor of the primary and secondary winding, respectively. Since the phase noise response is defined by the equivalent quality factor on the primary side. Note that Equation 9 has been plotted for the fundamental frequency f.sub.0=30 GHz and as shown in FIG. 12.

(73) Several transformer characteristics are shown in FIGS. 15, 16, and 17. A diagram illustrating the primary and secondary inductance as a function of frequency is shown in FIG. 15 where trace 132 represents the primary and trace 130 represents the secondary inductance as a function of frequency. A diagram illustrating the primary and secondary quality factor (Q) as a function of frequency is shown in FIG. 16 where trace 140 represents the Q of the primary and trace 142 represents the Q of the secondary. A diagram illustrating the transformer coupling factor k.sub.m as a function of frequency is shown in FIG. 17.

(74) A diagram illustrating the oscillator voltage waveform in differential mode is shown in FIG. 18 where trace 162 represents the drain voltage V.sub.D1 on transistor M.sub.1 (FIG. 5) and trace 160 represents the drain voltage V.sub.D2 on transistor M.sub.2 which illustrates that the drain voltage contains both fundamental and 5.sup.th harmonics. Note that the fundamental can be rejected or attenuated for the purpose of boosting the relative importance of the higher harmonic.

(75) A diagram illustrating the oscillator gate voltage waveform is shown in FIG. 19 where trace 150 represents the gate voltage V.sub.G1 on transistor M.sub.1 (FIG. 5) and trace 152 represents the gate voltage V.sub.G2 on transistor M.sub.2.

(76) A diagram illustrating example phase noise of the oscillator circuit of FIG. 5 is shown in FIG. 23 where trace 190 represents the phase noise for the high frequency oscillator (e.g., 150 GHz oscillator) 58 (FIG. 5) when it is in free running mode (i.e. not locked); trace 192 represents the phase noise for the high frequency oscillator (e.g., 150 GHz oscillator) 58 when it is locked to the low frequency (e.g., 30 GHz) oscillator 56 whereby its phase noise follows that of the low frequency oscillator; and trace 194 represents the phase noise for the low frequency oscillator (e.g., 30 GHz). As indicated, the phase noise of the oscillator confirms the injection locking theory, therefore the phase noise of the second DCO stage (e.g., the 150 GHz oscillator) follows the phase noise of first DCO stage (e.g., the 30 GHz oscillator).

(77) A diagram illustrating a first example locked signal spectrum of the oscillators is shown in FIG. 24 where trace 200 represents the spectrum of the drain voltage of the low frequency DCO and trace 202 represents the drain voltage of the high frequency DCO for a value of C.sub.s=284 fF (FIG. 5). A diagram illustrating a second example locked signal spectrum of the oscillators is shown in FIG. 25 where trace 204 represents the spectrum of the drain voltage of the low frequency DCO and trace 204 represents the drain voltage of the high frequency DCO for a value of C.sub.s=300 fF (FIG. 5). Note that as the secondary capacitor C.sub.s increases, the oscillator frequency is reduced since the oscillator frequency is a function of one over the square root of LC.

(78) Those skilled in the art will recognize that the boundaries between logic and task blocks are merely illustrative and that alternative embodiments may merge logic or task blocks or impose an alternate decomposition of functionality upon various logic or task blocks. Thus, it is to be understood that the architectures depicted herein are merely exemplary, and that in fact many other architectures may be implemented which achieve the same functionality.

(79) Any arrangement of components to achieve the same functionality is effectively associated such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality may be seen as associated with each other such that the desired functionality is achieved, irrespective of architectures or intermediary components. Likewise, any two components so associated can also be viewed as being operably connected, or operably coupled, to each other to achieve the desired functionality.

(80) Furthermore, those skilled in the art will recognize that boundaries between the above described operations merely illustrative. The multiple operations may be combined into a single operation, a single operation may be distributed in additional operations and operations may be executed at least partially overlapping in time. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.

(81) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms a, an and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises and/or comprising, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

(82) In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The use of introductory phrases such as at least one and one or more in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles a or an limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases one or more or at least one and indefinite articles such as a or an. The same holds true for the use of definite articles. Unless stated otherwise, terms such as first, second, etc. are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements. The mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these measures cannot be used to advantage.

(83) The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. As numerous modifications and changes will readily occur to those skilled in the art, it is intended that the invention not be limited to the limited number of embodiments described herein. Accordingly, it will be appreciated that all suitable variations, modifications and equivalents may be resorted to, falling within the spirit and scope of the present invention. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.