Current sensing circuit for generating sensed current signal with average value being constant under different input voltages of direct current to direct current converter and associated current-mode control circuit

Abstract

A current sensing circuit includes an inductor current sensing circuit and a processing circuit. The inductor current sensing circuit senses an inductor current of a direct current to direct current (DC-to-DC) converter to generate a first sensed current signal, wherein an average value of the first sensed current signal is not a constant under different input voltages of the DC-to-DC converter. The processing circuit generates a second sensed current signal, wherein the first sensed current signal is involved in generation of the second sensed current signal, the second sensed current signal is involved in current-mode control of the DC-to-DC converter, and an average value of the second sensed current signal is a constant under said different input voltages of the DC-to-DC converter.

Claims

1. A current sensing circuit comprising: an inductor current sensing circuit, arranged to sense an inductor current of a direct current to direct current (DC-to-DC) converter to generate a first sensed current signal, wherein an average value of the first sensed current signal is not a constant under different input voltages of the DC-to-DC converter; and a processing circuit, arranged to generate a second sensed current signal, wherein the first sensed current signal is involved in generation of the second sensed current signal, the second sensed current signal is involved in current-mode control of the DC-to-DC converter, and an average value of the second sensed current signal is a constant under said different input voltages of the DC-to-DC converter.

2. The current sensing circuit of claim 1, wherein the processing circuit comprises: a load current sensing circuit, arranged to sense a load current of the DC-to-DC converter to generate a third sensed current signal; and an adjusting circuit, arranged to derive an alternating current (AC) component from the first sensed current signal, and generate the second sensed current signal by combining the third sensed current signal and the AC component.

3. The current sensing circuit of claim 2, wherein the AC component is equal to a half of peak-to-peak ripple current amplitude of the first sensed current signal.

4. The current sensing circuit of claim 1, wherein the processing circuit comprises: an adjustment signal generator circuit, arranged to generate an adjustment signal; and a combining circuit, arranged to generate the second sensed current signal by subtracting the adjustment signal from the first sensed current signal.

5. The current sensing circuit of claim 4, wherein the adjustment signal generator circuit generates the adjustment signal according to the average value of the first sensed current signal and a duty cycle controlled by said current-mode control.

6. The current sensing circuit of claim 4, wherein the adjustment signal generator circuit generates the adjustment signal according to a load current of the DC-to-DC converter, an input voltage of the DC-to-DC converter, and an output voltage of the DC-to-DC converter.

7. The current sensing circuit of claim 1, wherein the DC-to-DC converter is an inverting buck-boost converter.

8. A current-mode control circuit of a direct current to direct current (DC-to-DC) converter comprising: an error amplifier circuit, arranged to receive a feedback voltage of the DC-to-DC converter and a reference voltage, and generate an error signal according to the feedback voltage and the reference voltage; a current sensing circuit, comprising: an inductor current sensing circuit, arranged to sense an inductor current of the DC-to-DC converter to generate a first sensed current signal, wherein an average value of the first sensed current signal is not a constant under different input voltages of the DC-to-DC converter; and a processing circuit, arranged to generate a second sensed current signal, wherein the first sensed current signal is involved in generation of the second sensed current signal, and an average value of the second sensed current signal is a constant under said different input voltages of the DC-to-DC converter; a ramp generator circuit, arranged to generate a ramp signal; a first combining circuit, arranged to combine the second sensed current signal and the ramp signal to generate a summing signal; and a comparator circuit, arranged to receive the error signal and the summing signal, and generate a control signal according to the error signal and the summing signal, wherein an output voltage of the DC-to-DC converter depends on the control signal.

9. The current-mode control circuit of claim 8, wherein the processing circuit comprises: a load current sensing circuit, arranged to sense a load current of the DC-to-DC converter to generate a third sensed current signal; and an adjusting circuit, arranged to derive an alternating current (AC) component from the first sensed current signal, and generate the second sensed current signal by combining the third sensed current signal and the AC component.

10. The current-mode control circuit of claim 9, wherein the AC component is equal to a half of peak-to-peak ripple current amplitude of the first sensed current signal.

11. The current-mode control circuit of claim 8, wherein the processing circuit comprises: an adjustment signal generator circuit, arranged to generate an adjustment signal; and a second combining circuit, arranged to generate the second sensed current signal by subtracting the adjustment signal from the first sensed current signal.

12. The current-mode control circuit of claim 11, wherein the adjustment signal generator circuit generates the adjustment signal according to the average value of the first sensed current signal and a duty cycle controlled by the control signal.

13. The current-mode control circuit of claim 11, wherein the adjustment signal generator circuit generates the adjustment signal according to a load current of the DC-to-DC converter, an input voltage of the DC-to-DC converter, and an output voltage of the DC-to-DC converter.

14. The current-mode control circuit of claim 8, wherein the DC-to-DC converter is an inverting buck-boost converter.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram illustrating a current sensing circuit according to an embodiment of the present invention.

(2) FIG. 2 is a current-mode control circuit of a DC-to-DC converter according to an embodiment of the present invention.

(3) FIG. 3 is a diagram illustrating waveforms of different signals of a DC-to-DC converter under a condition of V.sub.SUM=I.sub.SEN+I.sub.RAMP.

(4) FIG. 4 is a diagram illustrating waveforms of different signals of a DC-to-DC converter under a condition of V.sub.SUM=I.sub.ASEN+I.sub.RAMP according to an embodiment of the present invention.

(5) FIG. 5 is a diagram illustrating a first exemplary design of the current sensing circuit shown in FIG. 1 according to an embodiment of the present invention.

(6) FIG. 6 is a diagram illustrating a second exemplary design of the current sensing circuit shown in FIG. 1 according to an embodiment of the present invention.

DETAILED DESCRIPTION

(7) Certain terms are used throughout the following description and claims, which refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not in function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

(8) FIG. 1 is a block diagram illustrating a current sensing circuit according to an embodiment of the present invention. The current sensing circuit 100 may be used for achieving advanced current-mode PWM control proposed by the present invention. In contrast to the typical current-mode PWM control, the advanced current-mode PWM control enables a DC-to-DC converter to benefit from low compensation hardware cost of current-mode PWM control while maintaining good line regulation/transient performance. As shown in FIG. 1, the current sensing circuit 100 may include an inductor current sensing circuit 102 and a processing circuit 104. The inductor current sensing circuit 102 is arranged to sense an inductor current I.sub.L of an inductor L in a DC-to-DC converter (e.g., an inverting buck-boost converter that has a power stage 10 for generating a negative output voltage V.sub.OUT according to a positive input voltage V.sub.IN, and for providing a constant load current I.sub.LOAD that is drawn by a load device) to generate one sensed current signal I.sub.SEN, wherein an average value of the sensed current signal I.sub.SEN is not a constant under different input voltages V.sub.IN of the DC-to-DC converter. For example, the inductor current sensing circuit 102 may be implemented by a current sensing amplifier used to sense the inductor current I.sub.L when the metal-oxide-semiconductor (MOS) transistor DH (which acts as a high-side switch) is turned on and the MOS transistor DL (which acts as a low-side switch) is turned off. The sensed current signal I.sub.SEN may be expressed in “voltage” form or “current” form, depending upon actual design consideration.

(9) The processing circuit 104 is arranged to generate another sensed current signal I.sub.ASEN as an sensing output of the current sensing N circuit 100, wherein the sensed current signal I.sub.SEN is involved in generation of the sensed current signal I.sub.ASEN, the sensed current signal I.sub.ASEN is involved in current-mode control of the DC-to-DC converter (particular, current-mode PWM control of MOS transistors DH and DL in the DC-to-DC converter), and an average value of the sensed current signal I.sub.ASEN is a constant under the different input voltages V.sub.IN of the DC-to-DC converter. In contrast to the typical current-mode PWM control that directly uses the sensed current signal I.sub.SEN, the advanced current-mode PWM control proposed by the present invention uses the sensed current signal I.sub.ASEN Further details of the advanced current-mode PWM control are described below with reference to the accompanying drawings.

(10) FIG. 2 is a current-mode control circuit of a DC-to-DC converter according to an embodiment of the present invention. For example, the current-mode control circuit 200 may be a current-mode PWM controller, and/or may be employed by an inverting buck-boost converter having the power stage 10 shown in FIG. 1. The current-mode control circuit 200 may include the current sensing circuit 100 shown in FIG. 1, and may further include an error amplifier circuit (labeled by “EA”) 202, a ramp generator circuit 204, a combining circuit 206, and a comparator circuit (labeled by “CMP”) 208. The error amplifier circuit 202 is arranged to receive a feedback voltage V.sub.FB and a reference voltage V.sub.REF, and generate an error signal V.sub.COMP according to the feedback voltage V.sub.FB and the reference voltage V.sub.REF. For example, the feedback voltage V.sub.FB may be obtained from dividing the output voltage V.sub.OUT of the DC-to-DC converter through a voltage divider. The comparison result decides the voltage level of the error signal V.sub.COMP.

(11) The ramp generator circuit 204 is arranged to generate a ramp signal I.sub.RAMP that has a periodic sawtooth or triangle waveform. For example, the ramp generator circuit 204 may refer to the input voltage V.sub.IN and the reference voltage V.sub.REF to generate the ramp signal I.sub.RAMP with a dynamic slope. The combining circuit 206 is arranged to combine the sensed current signal I.sub.ASEN and the ramp signal I.sub.RAMP to generate a summing signal V.sub.SUM (i.e. V.sub.SUM=I.sub.ASEN+I.sub.RAMP). For example, the summing signal V.sub.SUM may be expressed in “voltage” form. It should be noted that, if the sensed current signal I.sub.ASEN and the ramp signal I.sub.RAMP are expressed in “current” form, the combining circuit 206 may be equipped with a current-to-voltage conversion function for generating the summing signal V.sub.SUM.

(12) The comparator circuit 208 is arranged to receive the error signal V.sub.COMP and the summing signal V.sub.SUM, and generate a control signal V.sub.SW (which is a comparator output) according to the error signal V.sub.COMP and the summing signal V.sub.SUM. The control signal V.sub.SW is a PWM control signal, and determines on-time period t.sub.ON and off-time period t.sub.OFF of the MOS transistor DH, where the duty cycle D is defined by

(13) $D=\frac{t_{\mathrm{ON}}}{t_{\mathrm{ON}}+t_{\mathrm{OFF}}}.$
Hence, the output voltage V.sub.OUT of the DC-to-DC converter depends on the control signal V.sub.SW.

(14) Since the present invention focuses on the innovative design of the current sensing circuit 100 and the error amplifier circuit 202, the ramp generator circuit 204, the combining circuit 206 and the comparator circuit 208 may be implemented using any known designs, further description of the error amplifier circuit 202, the ramp generator circuit 204, the combining circuit 206 and the comparator circuit 208 is omitted here for brevity.

(15) The typical current-mode PWM control directly uses the sensed current signal I.sub.SEN. As a result, a DC-to-DC converter using the typical current-mode PWM control has poor line transient performance as well as poor line regulation performance. Consider a case that the current sensing circuit 100 is modified to output the sensed current signal I.sub.SEN, instead of the proposed sensed current signal I.sub.ASEN. As a result, the summing signal V.sub.SUM (V.sub.SUM=I.sub.SEN+I.sub.RAMP) is output from the combining circuit 206. FIG. 3 is a diagram illustrating waveforms of different signals of a DC-to-DC converter under a condition of V.sub.SUM=I.sub.SEN+I.sub.RAMP. The input voltage V.sub.IN may be supplied by a battery device that is shared by multiple components in the same portable device. Hence, the input voltage V.sub.IN may suffer from an input voltage disturbance or transient caused by one or more of the components. Suppose that the DC-to-DC converter is an inversing buck-boost converter that operates under a continuous-conduction mode (CCM). Hence, the duty cycle D may be represented by

(16) $D=\frac{-V_{\mathrm{OUT}}}{V_{\mathrm{IN}}-V_{\mathrm{OUT}}},$
where the input voltage V.sub.IN is a positive voltage (i.e. V.sub.IN>0V), and the output voltage V.sub.OUT is a negative voltage (i.e. V.sub.OUT<0V). In addition, the average value I.sub.L,AVG of the inductor current I.sub.L may be expressed as

(17) $I_{L,\mathrm{AVG}}=\frac{I_{\mathrm{LOAD}}}{1-D},$
where the load current I.sub.LOAD drawn from the load device (e.g., AMOLED panel) has a fixed current value regardless of the input voltage V.sub.IN.

(18) As shown in FIG. 3, when the input voltage V.sub.IN has an input voltage disturbance or transient (e.g., a transition from a current voltage level to a lower voltage level), the current-mode PWM control is operative to increase the duty cycle D for the same output voltage V.sub.OUT. Hence, the peak value I.sub.L,PEAK and the average value I.sub.L,AVG of the inductor current I.sub.L are both increased due to a larger duty cycle D. Since the sensed current signal I.sub.SEN is derived from sensing the inductor current I.sub.L (particularly, sensing the inductor current I.sub.L during the on-time period t.sub.ON of the MOS transistor DH), the peak value I.sub.S,PEAK and the average value I.sub.S,AVG of the sensed current signal I.sub.SEN are both increased, where the average value I.sub.S,AVG of the sensed current signal I.sub.SEN is positively correlated with the average value I.sub.L,AVG of the inductor current I.sub.L. The duty cycle D depends on comparison of error signal V.sub.COMP and summing signal V.sub.SUM, where an end point of one on-time period t.sub.ON of the MOS transistor DH may be aligned with a time point when a peak value of the summing signal V.sub.SUM reaches the error signal V.sub.COMP. The relation between error signal V.sub.COMP and summing signal V.sub.SUM (V.sub.SUM=I.sub.SEN+I.sub.RAMP) may be expressed by the following formula, where

(19) $\begin{array}{cc}{I}_{L,\mathrm{AVG}}=\frac{I_{\mathrm{LOAD}}}{1-D}.V_{\mathrm{COMP}}\begin{array}{c}=V_{\mathrm{SUM}}\\ =I_{\mathrm{RAMP}}+I_{\mathrm{SEN}\left(\mathrm{PEAK}\right)}\\ =I_{\mathrm{RAMP}}+\frac{I_{L,\mathrm{PP}}}{2}+I_{L,\mathrm{AVG}}\\ =I_{\mathrm{RAMP}}+\frac{I_{L,\mathrm{PP}}}{2}+\frac{I_{\mathrm{LOAD}}}{1-D}\end{array}& \left(1\right)\end{array}$

(20) In above formula (1), I.sub.L,PP represents peak-to-peak ripple current amplitude of the inductor current I.sub.L. Since the current-mode PWM control is operative to increase the duty cycle D in response to the input voltage V.sub.IN having a transition from a current voltage level to a lower voltage level, the variation ΔI.sub.L,AVG of the inductor current I.sub.L, the variation ΔI.sub.S,AVG of the sensed current signal I.sub.SEN, and the variation ΔV.sub.COMP of the error signal V.sub.COMP are all large. Specifically, the duty cycle D is adjusted in response to the variation of the input voltage V.sub.IN. The factor

(21) $\frac{I_{L,\mathrm{PP}}}{2}$
has negligible impact on the variation ΔV.sub.COMP of the error signal V.sub.COMP, and an average value of

(22) $\frac{I_{L,\mathrm{PP}}}{2}$
may be treated as a constant under different input voltages of the DC-to-DC converter. However, the factor

(23) $\frac{I_{\mathrm{LOAD}}}{1-D}$
(i.e. I.sub.L,AVG) dominates the variation ΔV.sub.COMP of the error signal V.sub.COMP (i.e., ΔV.sub.COMP≈ΔI.sub.L,AVG), and an average value of

(24) $\frac{I_{\mathrm{LOAD}}}{1-D}$
is not a constant under different input voltages of the DC-to-DC converter. When the input voltage V.sub.IN has an input voltage disturbance or transient, the large variation ΔV.sub.COMP within the time period Δt leads to large output voltage variation (i.e. large voltage change of the output voltage V.sub.OUT). As a result, the DC-to-DC converter using the typical current-mode PWM control has poor line transient performance when the input voltage V.sub.IN suffers from an input voltage disturbance or transient.

(25) To address this issue, the advanced current-mode PWM control proposed by the present invention uses the sensed current signal T rather than the sensed current signal I.sub.SEN. FIG. 4 is a diagram illustrating waveforms of different signals of a DC-to-DC converter under a condition of V.sub.SUM=I.sub.ASEN+I.sub.RAMP according to an embodiment of the present invention. As mentioned above, the input voltage V.sub.IN supplied from a power source (e.g., a battery module) may suffer from an input voltage disturbance or transient. Suppose that the DC-to-DC converter is an inversing buck-boost converter that operates under a continuous-conduction mode (CCM). The duty cycle D may be represented by

(26) $D=\frac{-V_{\mathrm{OUT}}}{V_{IN}-V_{OUT}},$
where the input voltage V.sub.IN is a positive voltage (i.e. V.sub.IN>0V), and the output voltage V.sub.OUT is a negative voltage (i.e. V.sub.OUT<0V). In addition, the average value I.sub.L,AVG of the inductor current I.sub.L may be represented by

(27) 0$I_{L,\mathrm{AVG}}=\frac{I_{LOAD}}{1-D},$
where the load current I.sub.LOAD drawn from the load device (e.g., AMOLED panel) has a fixed current value regardless of the input voltage V.sub.IN. As shown in FIG. 4, when the input voltage V.sub.IN has an input voltage disturbance or transient (e.g., a transition from a current voltage level to a lower voltage level), the current-mode PWM control is operative to increase the duty cycle D for the same output voltage V.sub.OUT. Hence, the peak value I.sub.L,PEAK and the average value I.sub.L,AVG of the inductor current I.sub.L are both increased.

(28) By way of example, but not limitation, the sensed current signal I.sub.ASEN may be generated by subtracting an adjustment signal I.sub.FF from the sensed current signal I.sub.SEN, where the sensed current signal I.sub.SEN is derived from sensing the inductor current I.sub.L (particularly, sensing the inductor current I.sub.L during the on-time period t.sub.ON of the MOS transistor DH). With a proper setting of the adjustment signal I.sub.FF, the peak value I.sub.AS,PEAK and the average value I.sub.AS,AVG of the sensed current signal I.sub.ASEN do not change when the input voltage V.sub.IN has an input voltage disturbance or transient. Hence, the variation ΔI.sub.AS,AVG of the average value I.sub.AS,AVG of the sensed current signal I.sub.ASEN is substantially zero, and the variation ΔI.sub.AS,PP of peak-to-peak ripple current amplitude of the sensed current signal I.sub.ASEN is substantially zero.

(29) An end point of one on-time period t.sub.ON of the MOS transistor DH may be aligned with a time point when a peak value of the summing signal V.sub.SUM reaches the error signal V.sub.COMP. The relation between error signal V.sub.COMP and summing signal V.sub.SUM (V.sub.SUM=I.sub.RAMP+(I.sub.SEN−I.sub.FF)) may be expressed by the following formula, where

(30) $D=\frac{-V_{OUT}}{V_{IN}-V_{OUT}}$
and

(31) $$\begin{gathered} \begin{array}{cc}{I}_{L,\mathrm{AVG}}=\frac{I_{\mathrm{LOAD}}}{1-D} \\ {V}_{COMP}\begin{array}{c}=V_{\mathrm{SUM}}\\ =I_{\mathrm{RAMP}}+I_{ASEN\left(PEAK\right)}\\ =I_{\mathrm{RAMP}}+I_{SEN\left(PEAK\right)}-I_{FF}.\end{array}& \left(2\right)\end{array} \end{gathered}$$

(32) When the adjustment signal I.sub.FF is set by

(33) $I_{\mathrm{FF}}=I_{L,\mathrm{AVG}}.Math.D=I_{\mathrm{LOAD}}\left(\frac{.Math.V_{\mathrm{OUT}}.Math.}{V_{\mathrm{IN}}}\right),$
the above formula can be rewritten as:

(34) $\begin{array}{cc}{V}_{COMP}=I_{\mathrm{RAMP}}+\frac{I_{L,\mathrm{PP}}}{2}+I_{LOAD}& \left(3\right)\end{array}$

(35) Regarding the typical current-mode PWM control that directly uses the sensed current signal I.sub.SEN, the factor

(36) $\frac{I_{\mathrm{LOAD}}}{1-D}$
in formula (1) dominates the variation ΔV.sub.COMP of the error signal V.sub.COMP. However, with the cancellation factor I.sub.FF intentionally introduced, the sensed current signal I.sub.ASEN

(37) $\left(I_{\mathrm{ASEN}}=\frac{I_{L,\mathrm{PP}}}{2}+I_{\mathrm{LOAD}}\right)$
has an average value being a constant regardless of the input voltage of the DC-to-DC converter, and the factor

(38) $\frac{I_{\mathrm{LOAD}}}{1-D}$
does not exist in formula (3). Since the variation ΔI.sub.AS,AVG of the sensed current signal I.sub.ASEN is substantially zero, the variation ΔV.sub.COMP of the error signal V.sub.COMP induced due to the sudden change of the input voltage V.sub.IN is small (i.e. ΔV.sub.COMP≈ΔI.sub.AS,PP≈0). To put it another way, the variation ΔV.sub.COMP of the error signal V.sub.COMP can be cancelled or mitigated by the variation ΔI.sub.FF of the intentionally introduced adjustment signal I.sub.FF. It should be noted that subtracting the adjustment signal I.sub.FF from the sensed current signal I.sub.SEN is one example of generating the sensed current signal I.sub.ASEN with a constant average value. In practice, any means capable of processing the sensed current signal I.sub.SEN to generate the sensed current signal I.sub.ASEN with a constant average value may be employed by the proposed advanced current-mode PWM control. When the input voltage VIN has an input voltage disturbance or transient, the small variation ΔV.sub.COMP within the time period Δt leads to small output voltage variation (i.e. small voltage change of the output voltage V.sub.OUT). In this way, the DC-to-DC converter using the proposed advanced current-mode PWM control has good line transient performance when the input voltage V.sub.IN suffers from an input voltage disturbance or transient.

(39) As mentioned above, the processing circuit 104 is designed for generating the sensed current signal I.sub.ASEN as a sensing output of the current sensing circuit 100, wherein an average value of the sensed current signal I.sub.ASEN is a constant under different input voltages V.sub.IN of the DC-to-DC converter (e.g. inverting buck-boost converter). FIG. 5 is a diagram illustrating a first exemplary design of the current sensing circuit shown in FIG. 1 according to an embodiment of the present invention. The processing circuit 104 may be configured to include a load current sensing circuit 502 and an adjusting circuit 504. The load current sensing circuit 502 is arranged to sense the load current I.sub.LOAD of the DC-to-DC converter (e.g., inverting buck-boost converter) to generate a sensed current signal I.sub.SEN,LOAD. For example, the load current sensing circuit 502 may be implemented by a current sensing amplifier used to sense the load current I.sub.LOAD that has a fixed current value regardless of the input voltage V.sub.IN. The sensed current signal I.sub.SEN,LOAD may be expressed in “voltage” form or “current” form, depending upon actual design consideration. The adjusting circuit 504 is arranged to derive an alternating current (AC) component I.sub.SEN,AC from the sensed current signal I.sub.SEN, and generate the sensed current signal I.sub.ASEN by combining the sensed current signal I.sub.SEN,LOAD and the AC component I.sub.SEN,AC, that is, I.sub.ASEN=I.sub.SEN,AC+I.sub.SEN,LOAD. For example, the AC component I.sub.SEN,AC may be equal to a half of peak-to-peak ripple current amplitude of the sensed current signal I.sub.SEN. The sensed current signal I.sub.ASEN includes information of the inductor current I.sub.L for current-mode PWM control, but is free from the input-voltage-dependent factor

(40) $\frac{I_{\mathrm{LOAD}}}{1-D}$
that significantly degrades the line transient performance. In other words, the DC-to-DC converter (e.g., inverting buck-boost converter) retains weighting of current information and current-mode characteristic (e.g. saving the hardware compensation cost), and reduces variation ΔV.sub.COMP of the error signal V.sub.COMP for improving the line regulation/transient performance. Furthermore, the current sensing circuit 100 shown in FIG. 5 can be implemented using a single circuit design.

(41) FIG. 6 is a diagram illustrating a second exemplary design of the current sensing circuit shown in FIG. 1 according to an embodiment of the present invention. The processing circuit 104 may be configured to include an adjustment signal generator circuit 602 and a combining circuit 604. The adjustment signal generator circuit 602 is arranged to generate an adjustment signal I.sub.FF. The adjustment signal I.sub.FF may be expressed in “voltage” form or “current” form, depending up actual design considerations. The combining circuit 604 is arranged to generate the sensed current signal I.sub.ASEN by subtracting the adjustment signal I.sub.FF from the sensed current signal I.sub.SEN, that is, I.sub.ASEN=I.sub.SEN−I.sub.FF. For example, the adjustment signal generator circuit 602 may generate the adjustment signal I.sub.FF according to an average value of the sensed current signal I.sub.SEN and the duty cycle D controlled by the current-mode PWM control. In a case where the DC-to-DC converter is an inversing buck-boost converter that operates under CCM, the duty cycle D may be represented by

(42) $D=\frac{-V_{OUT}}{V_{IN}-V_{OUT}}.$
Alternatively, the adjustment signal generator circuit 602 may generate the adjustment signal I.sub.FF according to the load current I.sub.LOAD of the DC-to-DC converter, the input voltage V.sub.IN of the DC-to-DC converter, and the output voltage V.sub.OUT of the DC-to-DC converter. The sensed current signal I.sub.ASEN includes information of the inductor current I.sub.L for current-mode PWM control, but is free from the input-voltage-dependent factor

(43) 0$\frac{I_{\mathrm{LOAD}}}{1-D}$
that significantly degrades the line transient performance. In other words, the DC-to-DC converter (e.g., inverting buck-boost converter) retains weighting of current information and current-mode characteristic (e.g. saving the hardware compensation cost), and reduces variation ΔV.sub.COMP of the error signal V.sub.COMP for improving the line regulation/transient performance. Furthermore, the current sensing circuit 100 shown in FIG. 6 can be implemented using a single circuit design.

(44) The embodiments shown in FIG. 5 and FIG. 6 are for illustrative purposes only, and are not meant to be limitations of the present invention. As long as the sensed current signal I.sub.ASEN (which is derived from the sensed current signal I.sub.SEN) has an average value being a constant under different input voltages V.sub.IN, the variation ΔV.sub.COMP of the error signal V.sub.COMP can be mitigated to reduce the output voltage variation, as illustrated in FIG. 4. In practice, any current-mode PWM controller using the sensed current signal I.sub.ASEN with a constant average value falls within the scope of the present invention.

(45) For brevity and simplicity, the above assumes that the DC-to-DC converter using the proposed current-mode control design is an inverting buck-boost converter. However, this is not meant to be a limitation of the present invention. In practice, any DC-to-DC converter using the sensed current signal I.sub.ASEN for current-mode PWM control falls within the scope of the present invention.

(46) Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.