SYSTEMS AND METHODS FOR HIGH SPEED TEST PROBING OF DENSELY PACKAGED SEMICONDUCTOR DEVICES
20200379010 ยท 2020-12-03
Inventors
- Joven R. Tienzo (Fremont, CA, US)
- Hin Lum Lee (Fremont, CA, US)
- Joe Xiao (Union City, CA, US)
- Chee Wah Ho (Fremont, CA, US)
- Nasser J. Barabi (Lafayette, CA, US)
Cpc classification
G01R1/0483
PHYSICS
G01R31/27
PHYSICS
G01R1/07314
PHYSICS
G01R1/07307
PHYSICS
International classification
Abstract
The present invention relates to systems and methods that enable a connection to be made to a high speed, packaged or unpackaged semiconductor device that preserves signal integrity using probes that exhibit the properties of a coaxial transmission line so as to provide an accurate representation of the environment in which the device under test will be used. The coaxial structure further reduces capacitive coupling between probes resulting in significantly improved crosstalk performance.
Claims
1. A probe assembly for testing densely packaged semiconductor assemblies, the probe assembly comprising: a housing machined with a plurality of channels to accept components so as to form a coaxial structure between each component and the housing; a plurality of connecting pin assemblies, each pin assembly secured at one end and with a probing end free to move over a predetermined distance along the symmetrical axis of the assembly; and insulating materials embedded into the housing to retain the plurality of connecting pin assemblies in one or more predetermined positions.
2. The assembly of claim 1 further comprising an insulating material with depressions to capture a ball of a BGA to prevent the probing end from skating on the surface of the ball.
3. The assembly of claim 1 further comprising an insulating material with depressions to capture the bumping feature of a flip-chip semiconductor to prevent the probe end from skating on the surface of the semiconductor.
4. The assembly of claim 3 wherein the insulating material alters the characteristic impedance of the co-axial structure.
5. The assembly of claim 1 wherein the channels in the housing are radiused to avoid an abrupt transition.
6. The assembly of claim 3 wherein the insulating material is formed by a layer of anodized aluminum created in the housing.
7. The assembly of claim 6 wherein the anodizing layer is between 5 m and 15 m thick.
8. The assembly of claim 1 wherein the channels in the housing that house any or all of the connecting pins are radiused to avoid uneven anodizing.
9. The assembly of claim 1 wherein a diameter of the channels is between 2 and 3 times diameter of the pin assembly, to minimize crosstalk between the more than one connecting pin assembly.
10. The assembly of claim 9 wherein the diameter of the channels is between 2.3 times a diameter of the pin assembly.
11. The assembly of claim 1 further comprising a flexible washer for buffering the pin assembly.
12. A probe assembly for testing densely packaged semiconductor assemblies, the probe assembly comprising: an insulating plastic housing machined with a plurality of channels to accept components so as to form a coaxial structure between each component and the housing; and a plurality of connecting pin assemblies, each pin assembly secured at one end and with a probing end free to move over a predetermined distance along the symmetrical axis of the assembly, and wherein the plastic housing is configured to retain the plurality of connecting pin assemblies in one or more predetermined positions.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] In order that the present invention may be more clearly ascertained, some embodiments will now be described, by way of example, with reference to the accompanying drawings, in which:
[0012]
[0013]
[0014]
[0015]
[0016]
[0017]
[0018]
DETAILED DESCRIPTION
[0019] The present invention will now be described in detail with reference to several embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be apparent, however, to one skilled in the art, that embodiments may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention. The features and advantages of embodiments may be better understood with reference to the drawings and discussions that follow.
[0020] Aspects, features and advantages of exemplary embodiments of the present invention will become better understood with regard to the following description in connection with the accompanying drawing(s). It should be apparent to those skilled in the art that the described embodiments of the present invention provided herein are illustrative only and not limiting, having been presented by way of example only. All features disclosed in this description may be replaced by alternative features serving the same or similar purpose, unless expressly stated otherwise. Therefore, numerous other embodiments of the modifications thereof are contemplated as falling within the scope of the present invention as defined herein and equivalents thereto. Hence, use of absolute and/or sequential terms, such as, for example, always, will, will not, shall, shall not, must, must not, first, initially, next, subsequently, before, after, lastly, and finally, are not meant to limit the scope of the present invention as the embodiments disclosed herein are merely exemplary.
[0021] The present invention relates to systems and methods for a high speed test probe intended for inspection of densely packaged semiconductor devices. Although it should be clear that this technology can be down-scaled for small semiconductor packages, the current area of interest focuses upon packaged semiconductor devices having high connection counts and are typically seen as BGA and LGA structures. Other technologies that present the connection points directly on the semiconductor, such as Flip-Chip, are of course very similar and the use of the descriptor BGA or LGA is not intended to be limiting. Pin Grid arrays are also appropriate connection technologies.
[0022] To facilitate discussion,
[0023] Housing elements 124 and 114 may be made of any suitable conductive material, and in one embodiment an aluminum alloy 6061 is used; and for robustness, with a T6 temper. Channel 127 is drilled in both the upper housing 124 and in the lower housing 114 so that, when assembled, the channels in both of these elements are accurately aligned. In the same way as insulating material 112 is provided, terminating at the lower (outer) surface of lower element 114, a similar insulating component 122 is provided, terminating at the upper surface of the upper element 124 and it should be noted that the illustrated dimensions for 124 and 114 are only for example, in that they can be sized for height in any way that lends itself to ease of manufacture and assembly of the structure. An upper component 130 is shown in this example for a BGA probe. This component provides a surface feature that guides each solder ball 140 to which a connection is desired so that it is held in a stable manner as the connecting pin is compressed.
[0024] Component 130 may be made of an insulating material if it is very thin, but if there is significant thickness to the part, it may be made of metal and plated with an insulating lining where the connecting pin penetrates it to mate with the ball 140. In one embodiment this component 130 is made from 6061 aluminum and is passivated by anodizing the selected surfaces. Typically the outer surfaces and the holes are anodized and the surface that butts up against the upper housing 124 can be left untreated, although even if the entire part is anodized, capacitive coupling is sufficient to assure that it is effectively connected to the housing at higher frequencies. In some embodiments, an insulating sleeve may be created and positioned within this component; this has the advantage that, at the cost of some complexity in manufacturing, a predetermined impedance for the coaxial structure so formed may be established so that discontinuities are minimized and in consequence any frequency dependence can be controlled.
[0025] If a goal is to minimize crosstalk, that undesired coupling of neighboring signals to a desired signal, then the shielding effect of the metal enclosure is sufficient. In one embodiment the pin density is very high, the major diameter of a connecting pin assembly is 0.17 mm and the diameter of the hole through which this part of the connecting pin passes is about 0.2 mm. Using the coaxial cable formula Z.sub.0={138 Log.sub.10 (D/d)}/.sub.r where Z.sub.0 is the characteristic impedance, D is the diameter of the channel and d is the major diameter of the pin (Fr is the relative dielectric constant which is about 1 for air making the equation simpler) we see that this is about 10. To make a 50 section using this same pin, we need to make the channel about 2.3 times the pin diameter. Fortunately it is rarely necessary to make every section a 50 section and since every test jig is usually specific to the tested part this is not inconvenient. It is also possible to compensate for anomalies at specific frequencies by test-specific tuning; for example the addition of a dielectric sleeve can be used to reduce the characteristic impedance of the transmission line structure formed by the connection pin assembly and the housing.
[0026] Turning now to
[0027]
[0028] Turning now to
[0029] In a similar way,
[0030] The pin 150 that is used to make the connection to the DUT is a compressible pin and can be fabricated in a number of ways to allow the pin to be made suitable for the particular application.
[0031] In some embodiments, the tip is segmented so that there are more than one contact point to pierce the oxide. In other embodiments, the tip is electrically machined so as to give a very rough surface with multiple points of contact. The tip 425 may be plated in the same material as the rest of the pin 405 or may have a preferred plating to reduce thermoelectric voltage effects. Persons of ordinary skill will understand that wear properties and plating choices may not be mutually compatible and that compromises will have to be made; for example a gold plating may be preferred for its corrosion resistance, yet a nickel plating chosen for its hard wearing properties.
[0032] The pins 405 themselves can be of any suitable material having the required mechanical properties and a plating material used to achieve the desired electrical properties. The opposite end of the pin 405 within the barrel has a shoulder 435, which is chosen to be a snug fit into the enclosing barrel 410, and forms the surface against which the spring 415 exerts force; there being two pins 405 and 406, the spring pushes them apart to the extent allowed by the geometry of the parts.
[0033] The illustration of
[0034]
[0035] For completeness an exemplary crimp area 420 that secures this pin 405 into the barrel 410 is also shown. In some embodiments, a small flexible washer 455 may be installed to serve as a buffer between the harder pin assembly and the insulator 122 to reduce wear or damage to the insulator over time and repetitive cycles. The conical or shouldered section shape of the insulator is exemplary and it should be clear that so long as the insulator is secured in place relative to the housing 124 then other solutions may be used; for example any keyed surface that allows durable adhesion or restraint between the housing and the insulator material can be used. The flexible washer 455 serves only to absorb impact shock from the pin assembly and if the lifetime of the probe assembly is determined to be sufficient without this component then it may be excluded. In one embodiment, the diameter of the channel cut into the housing is about 0.2 mm and the pin barrel is about 0.17 mm. In another embodiment, the housing channel is 2.3 times the barrel diameter and a smaller pin assembly is used so that the coaxial section has a line impedance of 50. In yet another embodiment, a dielectric sleeve is fitted that reduces the impedance of this transmission line section to a lower impedance whilst maintaining a required tolerance for its operating voltage. Dielectric sleeves may also be used to provide reactive elements to tune out or match the device under test to the driving impedance of the testing equipment.
[0036] It will be observed that the pin and barrel crimp 420 secures these two parts firmly together and this end of the pin assembly is used to make the connection to the DUT. This offers the benefit that any incidental side loading that has to be reacted by the neck 430 region at the other end of the pin assembly is far lower than if it were proximate to the contact point and this contributes significantly to good probe assembly lifetime.
[0037] The lower housing 114 also has an insulating section where the other, sliding pin 406 penetrates it. The connection between the pin assembly and the test equipment that is connected to the DUT by the probe assembly is connected at this point and unlike the assembly in
[0038] The probe assembly dimensions vary according to the application, the number of contacts to be connected and the flatness of the DUT. The probe height measured from the bottom of the lower housing 114 to the top surface of the upper housing is typically between 2 mm and 5 mm. The upper layer 130 construction is not fixed. It may be any material that can provide insulation or a combination of materials that can perform this function. If a passivated (anodized) aluminum is used, this has the advantage of continuing the shielding as close to the ball of a BGA DUT as is possible, but creates a parasitic capacitance to ground that should be considered when the test regime for the DUT is being designed. Specific applications may use a composite upper layer where the main bulk is anodized aluminum and specific connection points have a plastic insert to reduce this parasitic component whilst still retaining most of the shielding advantages.
[0039] In sum, the present invention provides a system and methods for high speed test probing of densely packaged semiconductor devices. The advantages of such a system include the ability to greatly reduce crosstalk between channels, which is exacerbated by very densely packed connection points.
[0040] While this invention has been described in terms of several embodiments, there are alterations, modifications, permutations, and substitute equivalents, which fall within the scope of this invention. Although sub-section titles have been provided to aid in the description of the invention, these titles are merely illustrative and are not intended to limit the scope of the present invention. In addition, where claim limitations have been identified, for example, by a numeral or letter, they are not intended to imply any specific sequence.
[0041] It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and substitute equivalents as fall within the true spirit and scope of the present invention.