Panel for flexible digital x-ray detector and method for manufacturing the same
10852447 ยท 2020-12-01
Assignee
Inventors
Cpc classification
H01L31/115
ELECTRICITY
H01L31/1892
ELECTRICITY
G01T1/20189
PHYSICS
G01T1/20183
PHYSICS
H01L27/14663
ELECTRICITY
International classification
H01L31/0392
ELECTRICITY
H01L31/115
ELECTRICITY
Abstract
A panel for a flexible digital X-ray detector and a method for manufacturing the same are disclosed. Embodiments of the flexible digital X-ray detector reduce device characteristic deterioration caused by X-ray exposure, increase flexibility to the panel by reducing a thickness of the panel yet provide rigidity to maintain the shape of the panel, and reduce residual impurities during a Laser Lift Off (LLO) process. The panel can include a multi-buffer layer in which a silicon oxide (SiOx) layer and a silicon nitride (SiNx) layer are alternately stacked, and a device array layer and a scintillator layer that are disposed over the multi-buffer layer. During the LLO process, the method for manufacturing the panel includes increasing the hydrogen content using a sacrificial layer including an amorphous silicon (a-Si) layer and a silicon nitride (SiNx) layer disposed at both surfaces of the a-Si layer, such that the amount of residual impurities in the sacrificial layer can be reduced.
Claims
1. A panel for a flexible digital X-ray detector comprising: a multiple layered buffer stack in which a first flexible layer and a second flexible layer are alternately stacked; a device array layer disposed over the multiple layered buffer stack, the device array layer comprising at least one thin film transistor and at least one PIN diode connected to the at least one thin film transistor, the at least one PIN diode configured to generate an electrical signal responsive to receiving light, the at least one thin film transistor configured to transmit a detection signal to a readout circuit in response to receiving the electrical signal from the at least one PIN diode; and a scintillator layer disposed over the device array layer, the scintillator layer configured to generate the light responsive to receiving an X-ray, wherein the multiple layered buffer stack is a lowest layer of the panel.
2. The panel of claim 1, wherein the multiple layered buffer stack includes at least three layers.
3. The panel of claim 1, further comprising: an organic layer disposed between the device array layer and the scintillator layer, the organic layer configured to reduce a height difference caused by an arrangement of the device array layer.
4. The panel of claim 3, wherein the scintillator layer includes a plurality of scintillator columnar crystals arranged on the organic layer.
5. The panel of claim 3, wherein the device array layer is on the multiple layered buffer stack, the organic layer is on the device array layer, and the scintillator layer is on the organic layer.
6. The panel of claim 1, further comprising: a protective layer that covers the scintillator layer and the device array layer.
7. The panel of claim 6, further comprising: a reflective layer that covers the protective layer, the reflective layer configured to prevent the light generated from the scintillator layer from leaking outside of the flexible digital X-ray detector.
8. The panel of claim 1, wherein the first flexible layer is a silicon oxide (SiOx) layer and the second flexible layer is a silicon nitride (SiNx) layer.
9. The panel of claim 1, wherein a lower electrode of the at least one PIN diode is electrically connected to a source electrode of the at least one thin film transistor.
10. A method for manufacturing a panel for a flexible digital X-ray detector comprising: forming a sacrificial layer over a sacrificial substrate; forming a multiple layered buffer stack over the sacrificial layer, the multiple layered buffer stack including a first flexible layer and a second flexible layer stacked alternately; forming a device array layer over the multiple layered buffer stack, the device array layer including at least one PIN diode that generates an electrical signal responsive to receiving light and at least one thin film transistor transmitting a detection signal to a readout circuit in response to receiving the electrical signal from the at least one PIN diode; forming a scintillator layer over the device array layer to generate light responsive to receiving an X-ray; and separating the sacrificial layer from the multiple layered buffer stack after forming the scintillator layer over the device layer, wherein, after separating the sacrificial layer from the multiple layered buffer stack, the multiple layered buffer stack forms a lowest layer of the panel.
11. The method of claim 10, wherein the sacrificial layer includes: an amorphous silicon (a-Si) layer and a silicon nitride (SiNx) layer disposed at both surfaces of the amorphous silicon (a-Si) layer.
12. The method of claim 10, further comprising: forming an organic layer between the device array layer and the scintillator layer, wherein the scintillator layer is formed by growing a plurality of scintillator columnar crystals on the organic layer.
13. The method of claim 12, wherein the device array layer is formed on the multiple layered buffer stack and the organic layer is formed on the device array layer.
14. The method of claim 10, wherein the separating of the sacrificial layer and the multiple layered buffer stack is performed using a laser lift off (LLO) process.
15. The method of claim 10, wherein the first flexible layer is a silicon oxide (SiOx) layer and the second flexible layer is a silicon nitride (SiNx) layer.
16. The method of claim 10, wherein the multiple layered buffer stack includes at least three layers.
17. The method of claim 10, further comprising: forming a protective layer over the scintillator layer and the device array layer; and forming a reflective layer over the protective layer to prevent light generated from the scintillator layer from leaking outside of the flexible digital X-ray detector.
18. The method of claim 10, wherein a lower electrode of the at least one PIN diode is electrically connected to a source electrode of the at least one thin film transistor.
Description
BRIEF DESCRIPTION OF DRAWINGS
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DETAILED DESCRIPTION
(8) The above objects, features, and advantages will become apparent from the detailed description with reference to the accompanying drawings. Embodiments are described in sufficient detail to enable those skilled in the art in the art to easily practice the technical idea of the present disclosure. Detailed descriptions of well-known functions or configurations may be omitted in order not to unnecessarily obscure the gist of the present disclosure. Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Throughout the drawings, like reference numerals refer to like elements.
(9) The embodiments of the present disclosure will hereinafter be described with reference to the attached drawings.
(10) In the following description, assuming that a certain object is formed above (over) or below (beneath) the respective constituent elements, this means that two constituent elements are brought into direct contact with each other, or one or more constituent elements are disposed and formed between two constituent elements. In addition, assuming that a certain object is formed over or below the respective constituent elements, this means that the object may also be arranged in upward or downward directions on the basis of the position of one constituent element.
(11) It will be understood that when one element is referred to as being connected to, coupled to, or accessed by another element, one element may be connected to, coupled to, or accessed by another element via a further element although one element may be directly connected to or directly accessed by another element.
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(13) The TFT array 110 may sense X-rays emitted from an energy source, may perform photoelectric conversion of the sensed signal, and may thus output an electrical detection signal. In the TFT array 110, each cell region may be defined not only by a plurality of gate lines (GL) arranged in a horizontal direction, but also by a plurality of data lines (DL) arranged in a vertical direction perpendicular to the horizontal direction. Each cell region of the TFT array 110 may include a plurality of photosensitive pixels (P) arranged in a matrix.
(14) Each photosensitive pixel (P) may include a PIN diode configured to sense light converted from X-rays and output the sensed light as a signal, and a thin film transistor (TFT) configured to transmit a detection signal output from the PIN diode in response to a gate signal. One side of the PIN diode may be connected to the thin film transistor (TFT), and the other side thereof may be connected to a bias line (BL).
(15) A gate electrode of the thin film transistor (TFT) may be connected to the gate line (GL) through which a scan signal is transmitted, a source electrode may be connected to the PIN diode, and a drain electrode may be connected to the data line (DL) through which the detection signal is transmitted. The bias line BL may be arranged parallel to the data line (DL).
(16) The gate driver 130 may sequentially apply a plurality of gate signals, each of which has a gate-ON voltage level, through the gate lines (GL). The gate driver 130 may also apply a plurality of reset signals, each of which has a gate-ON voltage level, through a plurality of reset lines (RL). Here, the gate-ON voltage level may refer to a voltage level at which thin film transistors of the photosensitive pixels can be turned on. The thin film transistors of the photosensitive pixels may be turned on in response to a gate signal or a reset signal.
(17) The gate driver 130 may be an integrated circuit (IC) such that the gate driver 130 may be populated on an external substrate connected to the TFT array 110 or may be formed over the TFT array 110 through a Gate In Panel (GIP) process.
(18) The bias supplier 140 may apply a drive voltage through bias lines (BL). The bias supplier 140 may apply a predetermined voltage to the PIN diode. In this case, the bias supplier 140 may selectively apply a reverse bias or a forward bias to the PIN diode.
(19) The power-supply voltage supplier 150 may supply a power-supply voltage to the photosensitive pixels through power-supply voltage lines (VL).
(20) The readout circuit 160 may read out the detection signal generated from the thin film transistor (TFT) that is turned on in response to the gate signal. Accordingly, the detection signal generated from the PIN diode may be input to the readout circuit 160 through the data lines (DL).
(21) The readout circuit 160 may include a signal detector, a multiplexer, etc. The signal detector may include a plurality of amplification circuits corresponding to the data lines (DL) on a one to one basis, and each amplification circuit may include an amplifier, a capacitor, a reset element, etc.
(22) In order to control the gate driver 130, the timing controller 170 may generate a start signal (STV), a clock signal (CPV), etc., and may transmit the start signal (STV), the clock signal (CPV), etc. to the gate driver 130. In order to control the readout circuit 160, the timing controller 170 may generate a readout control signal (ROC), a readout clock signal (CLK), etc., and may transmit the readout control signal (ROC), the readout clock signal (CLK), etc. to the readout circuit 160.
(23) A panel for a digital X-ray detector according to one embodiment of the present disclosure will hereinafter be described with reference to
(24) A panel 200 for a flexible digital X-ray detector 200 according to the embodiment of the present disclosure may include multiple buffer layers (hereinafter referred to as a multi-buffer layer or a multiple layered buffer stack) 210 in which a silicon oxide (SiO.sub.x) layer and a silicon nitride (SiN.sub.x) layer are alternately stacked, a device array layer 220 that is disposed over the multi-buffer layer 210 and has a thin film transistor 230 and a PIN diode 240 connected to the thin film transistor 230 (e.g., see
(25) The multi-buffer layer 210 serving as the lowest layer of the panel 200 may be disposed such that the SiO.sub.x layers and the SiN.sub.x layers are alternately stacked to form at least three layers. For example, the SiO.sub.x layers and the SiN.sub.x layers may be alternately stacked in the form of various buffer layers, for example, SiO.sub.x/SiN.sub.x/SiO.sub.x, SiN.sub.x/SiO.sub.x/SiN.sub.x, SiO.sub.x/SiN.sub.x/SiO.sub.x/SiN.sub.x, SiN.sub.x/SiO.sub.x/SiN.sub.x/SiO.sub.x, etc.
(26) Differently from the conventional digital X-ray detector in which the base substrate is used as the lowest substrate, the panel 200 for the flexible digital X-ray detector according to the embodiment of the present disclosure does not have a base substrate, and the multi-buffer layer 210 forms the lowest layer of the panel 200, such that the entire thickness of the panel 200 is reduced and flexibility can be more effectively allocated to the panel 200.
(27) In addition, the multi-buffer layer 210 forms the lowest layer of the panel 200, such that the multi-buffer layer 210 does not have a separate base substrate. As a result, device deterioration capable of being additionally generated by the base substrate during X-ray emission can be reduced.
(28) Due to characteristics of the digital X-ray detector, a threshold voltage of a device such as a thin film transistor (TFT) undergoes a negative shift when the device is exposed to X-rays. In this case, if a separate base substrate such as a glass substrate or a polyimide (PI) substrate is arranged in the digital X-ray detector, carrier variation of the thin film transistor occurs during X-ray emission, such that the additional threshold-voltage negative shift phenomenon occurs during X-ray emission, and thus device deterioration becomes more serious.
(29) Specifically, the negative shift phenomenon caused by the PI substrate is about two or more times greater than the negative shift phenomenon caused by the glass substrate. Therefore, the panel 200 for the flexible digital X-ray detector in which the base substrate is removed and the multi-buffer layer 210 forms the lowest layer of the panel 200 may have flexibility and may reduce device deterioration.
(30) In addition, since the base substrate is removed from the panel 200 according to the present disclosure, the thin film transistor 230 or the PIN diode 240 included in the device array layer 220 may be vulnerable to external moisture or oxygen penetration.
(31) Therefore, the panel 200 according to the present disclosure includes a multi-buffer layer 210 in which the SiO.sub.x layer and the SiN.sub.x layer are alternatively stacked to form at least three layers in the lowest layer, instead of including a single buffer layer in the lowest layer, such that devices of the device array layer can be minimally affected by external moisture and oxygen penetration.
(32) The thin film transistor 230 and the device array layer 220 including the PIN diode 240 connected to the thin film transistor 230 may be disposed over the multi-buffer layer 210.
(33) In this case, a pad part 290 including various lines may be disposed at the edge of the multi-buffer layer 210, and the device array layer 220 may be formed in a manner that spacing of the edge of the multi-buffer layer 210 remains.
(34) In the device array layer 220, pixel regions P (not shown in
(35) The thin film transistor 230 may include an active layer 231, a gate electrode 233, a source electrode 235, and a drain electrode 237. In this case, the active layer 231 may be formed of an oxide semiconductor material such as indium gallium zinc oxide (IGZO), Low Temperature Polycrystalline Silicon (LTPS), or amorphous silicon (a-Si).
(36) The thin film transistor 230 may be connected to the PIN diode 240 that includes a lower electrode 241, a PIN layer 243, and an upper electrode 245. In more detail, the lower electrode 241 may be connected to the source electrode 235 of the thin film transistor 230. The PIN layer 243 in which an N-type (negative) semiconductor layer having N-type impurities, an intrinsic (I-type) semiconductor layer having no impurities, and a P-type (positive) semiconductor layer including P-type impurities are sequentially stacked, may be formed.
(37) The PIN layer 243 may include a material capable of converting X-rays emitted from an energy source into an electric signal. For example, the PIN layer 243 may include amorphous selenium (a-Se), mercuric iodide (HgI2), cadmium telluride (CdTe), lead oxide (PbO), lead iodide (PbI2), bismuth triiodide (BiI3), gallium arsenide (GaAs), germanium (Ge), and the like.
(38) The upper electrode 245 of the PIN diode may be connected to the bias electrode 247 through which a voltage is applied to the PIN diode 240. A passivation layer 249 may be a monolayer or multilayer structure formed of a silicon oxide (SiOx) film or a silicon nitride (SiNx) film. The passivation layer 249 may be formed over the bias electrode 247. In this case, the passivation layer 249 may be disposed to cover the entire surface of the device array layer 220 other than a contact hole of the bias electrode 247, thereby protecting the device array layer 220.
(39) The internal structure of the above-mentioned device array layer 220 is merely exemplary, and the scope or spirit of the present disclosure is not limited thereto. In the device array layer 220, the arrangement format of various devices, for example, the thin film transistor 230, the PIN diode 240, and the bias electrode 247 may include various modified examples.
(40) An organic layer 250 may be disposed over the device array layer 220. The organic layer 250 may reduce a step difference caused by arrangement of the devices included in the device array layer 220, and may be used as a planarization layer such that the scintillator layer 260 disposed at an upper part can be formed at the planarized surface.
(41) In addition, the organic layer 250 may serve as a growth base layer such that the scintillator can be formed as a plurality of columnar crystals (CC) 261 on the basis of the organic layer 250.
(42) In more detail, the panel 200 for the flexible digital X-ray detector according to the embodiment of the present disclosure may allow the scintillator layer 260 to be disposed over the device array layer 220 without formation of a separate adhesive layer.
(43) That is, the scintillator layer 260 may be grown in the vertical direction in a manner that the scintillator layer 260 has a plurality of columnar crystals (CC) 261 through deposition by using the organic layer 250 as a growth base layer between the device array layer 220 and the scintillator layer 260, such that the plurality of scintillator columnar crystals (CCs) may be arranged in parallel. In this case, although the scintillator is formed of cesium iodide (CsI), the scope or spirit of the present disclosure is not limited thereto.
(44) The panel 200 according to the present disclosure can form the scintillator layer 260 over the device array layer 220 without having a separate adhesive layer, such that the entire thickness of the panel 200 can be greatly reduced, and more effective flexibility can be given to the panel 200.
(45) In addition, the scintillator layer 260 may serve as a support substrate to provide rigidity to maintain the overall shape of the panel 200. As described above, the embodiments of the present disclosure can remove the base substrate from the panel and use the lowest layer of the panel 200 as the multi-buffer layer 210 such that the panel has increased flexibility and the possibility of additional device deterioration is reduced.
(46) Therefore, the scintillator layer 260 may serve as a support substrate to provide rigidity through which the scintillator layer 260 has flexibility and the entire shape of the panel 200 is maintained. As a result, the base substrate is reduced in thickness such that flexibility can be more effectively given to the panel 200.
(47) In addition, a protective layer 270 may be formed to cover the scintillator layer 260 and the device array layer 220 at the scintillator layer 260, such that the scintillator layer 260 may be formed to have stronger supporting force.
(48) The protective layer 270 may be formed of parylene. The protective layer 270 may be formed to cover the scintillators arranged in the plurality of columnar crystals (CCs) 261, and may also be formed to bury spaces between the neighboring CCs 261.
(49) A reflective layer 280 covering the protective layer 270 may be additionally disposed over the protective layer 270, and may prevent light from leaking outside.
(50) The protective layer 270 and the reflective layer 280 may be disposed to cover the entire surface of the multi-buffer layer 210 other than the pad part 290 disposed at the edge of the device array layer 220.
(51) The panel 200 for the above-mentioned flexible digital X-ray detector may operate as follows.
(52) X-rays emitted towards and received by the flexible digital X-ray detector panel 200 may be converted into visible light by the scintillator layer 260. The visible light may be converted into an electronic signal by the PIN layer 243 of the PIN diode 240.
(53) In more detail, when visible light is emitted towards and received by the PIN layer 243, the intrinsic semiconductor layer is depleted by the P-type semiconductor layer and the N-type semiconductor layer, and thus generates an electric field therein. Electrons and holes generated by light may be drifted by the electric field, and are then collected in the P-type semiconductor layer and in the N-type semiconductor layer, respectively.
(54) The PIN diode 240 may convert visible light into an electronic signal, and may deliver the electronic signal to the thin film transistor 230. The delivered electronic signal may be displayed as an image signal after passing through the data line DL connected to the thin film transistor 230.
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(56) A method for manufacturing the panel 200 of the flexible digital X-ray detector according to the embodiment of the present disclosure may include forming 710 a sacrificial layer 320 over a sacrificial substrate 310, forming 720 a multi-buffer layer 210 in which the SiO.sub.x layer and the SiN.sub.x layer are alternately stacked over the sacrificial layer 320, forming 730 a device array layer 220 having a thin film transistor 230 and a PIN diode 240 connected to the thin film transistor 230 over the multi-buffer layer 210, forming 740 a scintillator layer 260 over the device array layer 220, and separating 750 the sacrificial layer 320 and the multi-buffer layer 210.
(57) The sacrificial substrate 310 may be a region that will be isolated and removed by the next process such as laser lift off (LLO) in a subsequent process, and may serve as a base substrate for forming the sacrificial layer 320, the multi-buffer layer 210, and the device array layers 220. The glass substrate may be used as a sacrificial substrate 310.
(58) As shown in
(59) Referring to
(60) Referring to
(61) An organic layer 250 for planarizing the device array layer 220 may be formed over the device array layer 220.
(62) A plurality of CC (Columnar Crystal)-shaped scintillators may be grown through deposition on the organic layer 250 such that the CC-shaped scintillators can be vertically arranged in parallel, resulting in formation of the scintillator layer 260. In this case, the organic layer 250 may also serve as a growth base layer for growing the scintillator columnar crystals (CCs) 261.
(63) The protective layer 270 and the reflective layer 280 may be formed over the scintillator layer 260, thereby covering the columnar crystals (CCs) 261 and the device array layer 220.
(64) Referring to
(65) The process for isolating the interface according to the present disclosure may be performed by the LLO process, and a detailed description thereof will hereinafter be given in detail.
(66) The LLO process refers to a process for using amplified laser to isolate device layers stacked on the sacrificial substrate 310 from the sacrificial substrate 310. Generally, laser light is emitted towards and received by the sacrificial substrate 310, and the interfacial bonding between the sacrificial layers 320 of the sacrificial substrate 310 and the device layers is destroyed, such that the sacrificial layers 320 and the device layers can be isolated from one another.
(67) Generally, if the base substrate such as the polyimide (PI) substrate is formed in the LLO process, the sacrificial layer 320 may be formed of the amorphous silicon (a-Si) material.
(68) In this case, hydrogen swelling occurs between the polyimide (PI) layer acting as an organic layer and the sacrificial layer 320 during laser emission, such that the sacrificial substrate 310 can be isolated. The hydrogen (H) content at the interface may be important to the LLO process.
(69) However, the present disclosure may not use a separate base substrate, and can use the multi-buffer layer 210 of the inorganic film as the lowest layer, such that there is a need to increase the hydrogen content at the interface.
(70) Therefore, the SiN.sub.x layer having a high hydrogen content is disposed at both sides of the amorphous silicon (a-Si) layer, such that the hydrogen content of the sacrificial layer 320 is increased.
(71) As a result, the hydrogen content at the interface between the sacrificial layer 320 and the multi-buffer layer 210 increases, such that the sacrificial substrate 310 and the sacrificial layer 320 can be easily isolated from each other by the LLO process even when a separate base substrate is not used.
(72) In addition, the embodiment of the present disclosure does not form a separate base substrate at the lower part of the multi-buffer layer 210 so as to reduce additional device deterioration as well as to increase flexibility, such that the multi-buffer layer 210 composed of at least three layers may be formed below the device array layer 220. The multi-buffer layer composed of at least three layers can allow the device array layer 220 to be minimally affected by laser light during LLO processing.
(73)
(74) In more detail,
(75) As can be seen from
(76) However, if the silicon nitride (SiNx) layer having a high hydrogen content is disposed at both surfaces of the amorphous silicon (a-Si) layer, hydrogen swelling occurs in the SiN.sub.x layer due to laser light, and the sacrificial layer can be sufficiently removed and isolated from the multi-buffer layer, such that it can be confirmed that hardly any residual impurities remain.
(77) As is apparent from the above description, the embodiments of the present disclosure may reduce device deterioration caused by a base substrate during X-ray emission because the lowest layer of a panel is composed of multiple buffer layers without having a separate base substrate.
(78) The embodiments of the present disclosure may allow a scintillator layer to serve as a support substrate that is capable of providing rigidity to maintain the shape of a panel without using a separate base substrate and the junction between the device layer and the scintillator layer can be formed without and adhesive layer, such that a total thickness of the panel is reduced and the panel has increased flexibility.
(79) The embodiments of the present disclosure may use a sacrificial layer that includes an amorphous silicon (a-Si) layer and a silicon nitride (SiNx) layer disposed at both surfaces of the amorphous silicon (a-Si) layer during LLO (Laser Lift Off) processing, may effectively isolate a sacrificial layer from a sacrificial substrate by increasing hydrogen content at an interface, and may reduce the amount of residual impurities remaining in the sacrificial layer after isolation between the sacrificial layer and the sacrificial substrate.
(80) The present disclosure described above may be variously substituted, altered, and modified by those skilled in the art to which the present disclosure pertains without departing from the scope and sprit of the present disclosure. Therefore, the present disclosure is not limited to the above-mentioned exemplary embodiments and the accompanying drawings.