Chip resistor
10839989 ยท 2020-11-17
Assignee
Inventors
Cpc classification
H01C1/142
ELECTRICITY
H01C1/02
ELECTRICITY
International classification
Abstract
An object of the present disclosure is to provide a chip resistor that reduces a possibility of occurrence of a mounting failure. The chip resistor of the present disclosure includes: insulating substrate; a pair of first upper-face electrodes that is provided at both end portions of an upper face of insulating substrate; and resistor that is provided on the upper face of insulating substrate and is formed between the pair of first upper-face electrodes. The chip resistor also includes: a pair of second upper-face electrodes that is formed on upper faces of the pair of first upper-face electrodes and is connected to resistor; and protective film that is provided to cover exposed resistor and part of the pair of second upper-face electrodes.
Claims
1. A chip resistor comprising: an insulating substrate; a pair of first upper-face electrodes that is provided at both end portions of an upper face of the insulating substrate; a resistor that is provided on the upper face of the insulating substrate and is formed between the pair of first upper-face electrodes; a pair of second upper-face electrodes that is provided on upper faces of the pair of first upper-face electrodes and is provided at both end portions of the resistor; and a protective film that is provided to cover a portion of the resistor existing between the pair of second upper-face electrodes and part of the pair of second upper-face electrodes, wherein a length of a portion of the resistor disposed on the pair of first upper-face electrodes taken along a first direction extending from one first upper-face electrode to the other first upper-face electrode is longer than a length of a portion of the resistor disposed between the pair of first upper-face electrodes taken along the first direction, and the pair of first upper-face electrodes are disposed between the insulating substrate and the resistor.
2. The chip resistor according to claim 1, wherein a distance between either of front ends of the both end portions of the resistor and either of end faces of the insulating substrate is set to 50 m or more and 100 m or less.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1)
(2)
(3)
(4)
(5)
DESCRIPTION OF EMBODIMENT DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
(6) A chip resistor in an exemplary embodiment of the present disclosure will be described below with reference to the drawings.
(7)
(8) The chip resistor in one exemplary embodiment of the present disclosure includes insulating substrate 11, a pair of first upper-face electrodes 12, resistor 13, a pair of second upper-face electrodes 14, protective film 15, a pair of end-face electrodes 16, and plating layer 17. The pair of first upper-face electrodes 12 is provided on both end portions of upper face of insulating substrate 11. Resistor 13 is provided on an upper face of insulating substrate 11 and is formed between the pair of first upper-face electrodes 12. The pair of second upper-face electrodes 14 is formed on upper faces of the pair of first upper-face electrodes 12 and is connected to resistor 13. Protective film 15 is provided to cover exposed resistor 13 and part of the pair of second upper-face electrodes 14. The pair of end-face electrodes 16 is provided on both end faces of insulating substrate 11 in such a manner as to be electrically connected to the pair of first upper-face electrodes 12. Plating layer 17 is formed on part of the pair of second upper-face electrodes 14 and surfaces of the pair of end-face electrodes 16.
(9) Length w2 of a portion of resistor 13 formed on the pair of first upper-face electrodes 12 is made longer than length w1 of a portion of resistor 13 formed between the pair of first upper-face electrodes 12. Distance t1 between either of front ends of end portions 13a on both sides of resistor 13 and either of end faces 11a of insulating substrate 11 is set to 100 m or less.
(10) In the foregoing configuration, insulating substrate 11 is formed of alumina containing 96% Al.sub.2O.sub.3 and is rectangular in shape. A length, width, and thickness of insulating substrate 11 are as described in [Table 1] below.
(11) TABLE-US-00001 TABLE 1 Length (m) Width (m) Thickness (m) Insulating substrate 11 1600 800 500
(12) The pair of first upper-face electrodes 12 is provided on both end portions of upper face of insulating substrate 11 and is formed by printing and sintering a thick film material made of silver, silver palladium, or copper. Back face electrodes 12a may be formed at both end portions of insulating substrate 11.
(13) Further, resistor 13 is formed by printing a thick film material made of silver palladium, ruthenium oxide, or copper nickel on an upper face of insulating substrate 11 between the pair of first upper-face electrodes 12 and then sintering the thick film material. End portions 13a on the both sides of resistor 13 are positioned on the upper faces of the pair of first upper-face electrodes 12. Resistor 13 is not bar-shaped, and end portions 13a on the both sides are positioned inside insulating substrate 11.
(14) A protective glass layer of pre-coat glass may be provided to cover resistor 13. Further, a trimming groove for resistance value adjustment (hereinafter, not illustrated) may be provided in resistor 13.
(15) The pair of second upper-face electrodes 14 is formed by printing and sintering a thick film material made of silver, silver palladium, or copper. The pair of second upper-face electrodes 14 is formed on part of first upper-face electrodes 12 not covered by resistor 13 and the upper face of resistor 13 and is connected to resistor 13. End portions 14a opposed to each other (facing inward) of the pair of second upper-face electrodes 14 are covered by protective film 15.
(16) Protective film 15 is formed of a thick film material made of glass or epoxy resin to cover part of the pair of second upper-face electrodes 14 and resistor 13.
(17) The pair of end-face electrodes 16 is provided at the both end portions of insulating substrate 11 and is formed by printing a material made of Ag and a resin to be electrically connected to the pair of first upper-face electrodes 12 exposed from the pair of second upper-face electrodes 14.
(18) Further, plating layer 17 including a Cu plating layer, an Ni plating layer, and an Sn plating layer is formed on surfaces of the pair of end-face electrodes 16. In this case, plating layer 17 is connected to the pair of second upper-face electrodes 14 in such a manner as to cover part of the pair of second upper-face electrodes 14, and is in contact with protective film 15.
Example
(19) An example of the present exemplary embodiment will be described below.
(20) In the present example, materials and thicknesses of first upper-face electrodes 12, resistor 13, second upper-face electrodes 14, protective film 15, end-face electrodes 16, and plating layer 17 are as described in [Table 2]. The thickness of plating layer 17 is total thicknesses of the Cu layer, the Ni layer, and the Sn layer. Insulating substrate 11 is formed of alumina containing 96% Al.sub.2O.sub.3 and is rectangular in shape. Length, width, and thickness of insulating substrate 11 are as described in [Table 1] above.
(21) TABLE-US-00002 TABLE 2 Material Thickness (m) First upper-face electrode 12 Ag 10 to 20 Resistor 13 AgPd 20 to 30 Second upper-face electrode 14 Ag 5 to 15 Protective film 15 Epoxy resin 25 to 50 End-face electrode 16 Ag 5 to 20 Plating layer 17 Cu 10 to 45 Ni 3 to 15 Sn 3 to 15
(22) In the present example, values of parameters t1, w1, and w2 described above are as in [Table 3].
(23) TABLE-US-00003 TABLE 3 Length (m) t1 100 w1 200 to 400 w2 500 to 1000
(24) End portions 13a on the both sides of resistor 13 are positioned near end faces 11a of insulating substrate 11, and length w2 of the portion of resistor 13 formed on the pair of first upper-face electrodes 12 is made longer than length w1 of the portion of resistor 13 formed between the pair of first upper-face electrodes 12. Further, distance t1 between either of the front ends of end portions 13a on both sides of resistor 13 and either of end faces 11a of insulating substrate 11 is set to 100 m or less. Dimension of w1 regulates a resistance value. Dimension of w2 is preferably 1.5 times to 2.5 times inclusive longer than the dimension of w1.
(25) As described above, in the present example, length w2 of the portion of resistor 13 formed on the pair of first upper-face electrodes 12 is made longer than length w1 of the portion of resistor 13 formed between the pair of first upper-face electrodes 12. In addition, the positions of end portions 13a on the both sides of resistor 13 and the positions of end portions 14a opposed to each other of the pair of second upper-face electrodes 14 are separated from each other. This suppresses upward protrusion of end portions 14a of the pair of second upper-face electrodes 14. This prevents generation of an inclination or slope on the upper faces of the pair of second upper-face electrodes 14. This produces an advantageous effect that, even in the case of implementing the upper face as a mounting surface, it is possible to reduce a possibility of occurrence of a mounting failure such as a tombstone phenomenon due to a difference in height caused by an inclination or slope.
(26) Specifically, length w2 of the portion of resistor 13 formed on the pair of first upper-face electrodes 12 is made longer than length w1 of the portion of resistor 13 formed between the pair of first upper-face electrodes 12. Accordingly, end portions 13a on the both sides of resistor 13 are close to end faces 11a of insulating substrate 11, and end portions 13a on the both sides of resistor 13 are separated from the end portions of upper faces of the pair of first upper-face electrodes 12. Accordingly, end portions 13a on the both sides of resistor 13 do not bulge upward, and thus the upper faces of the pair of second upper-face electrodes 14 are flat with a smaller difference in height caused by an inclination or slope. As a result, the inclination or slope on the upper face of plating layer 17 on the upper faces of the pair of second upper-face electrodes 14 becomes small. In addition, the both end portions of protective film 15 do not protrude upward, and thus the upper face of the chip resistor becomes horizontal (flat), thereby suppressing the occurrence of a mounting failure such as tombstone phenomenon due to a difference in level of the upper face of the chip resistor.
(27) On the other hand, when end portions 13a on the both sides of resistor 13 are separated from end faces 11a of insulating substrate 11 and end portions 13a on the both sides of resistor 13 are close to the end portions of the upper faces of the pair of first upper-face electrodes 12 as in the conventional case, end portions 13a on the both sides of resistor 13 bulge upward. Accordingly, the surfaces of the pair of second upper-face electrodes 14 are more inclined with increasing proximity to protective film 15 along the bulging shape. As a result, an inclination or slope on the upper face of plating layer 17 on the upper faces of the pair of second upper-face electrodes 14 also becomes large. In addition, the both end portions of protective film 15 protrude upward, and thus the upper face of the chip resistor does not become flat and there is a possibility of occurrence of a mounting failure such as a tombstone phenomenon due to a difference in height on the upper face of the chip resistor caused by the inclination or slope.
(28) In the resistor of the present disclosure, distance t1 between either of the front ends of end portions 13a on both sides of resistor 13 and either of end faces 11a of insulating substrate 11 is preferably close to 100 m or less.
(29)
(30) In this case, the dimension in height between either of the upper faces of the pair of second upper-face electrodes 14 at 100 m from end faces 11a of insulating substrate 11 (point A in
(31) The followings can be seen from
(32) When distance t1 is 100 m or less as in the resistor of the present disclosure, end portions 13a on the both sides of resistor 13 are separated from the end portions of the upper faces of the pair of first upper-face electrodes 12, and end portions 13a on the both sides of resistor 13 do not bulge upward as illustrated in
(33) In contrast, when distance t1 is set to larger than 100 m as illustrated in
(34) In this case, a lower limit value of distance t1 between either of the front ends of end portions 13a on the both sides of resistor 13 and either of end faces 11a of insulating substrate 11 is decided with consideration given to printing accuracy and division accuracy, and is set to 5 m, for example.
(35) The chip resistor according to the present disclosure provides an advantageous effect of reducing a possibility of occurrence of a mounting failure, and in particular, is useful in a small-size chip resistor that is used in various kinds of electronic devices and is formed of a thick film resistor with low resistance value.