EFFICIENT QUANTUM SIMULATION WITH QUANTUM INFORMATION COMPRESSION AND MULTIPLE FERMION-TO-QUBIT BASIS TRANSFORMATIONS

Abstract

Aspects of the present disclosure describe a method including compressing and uncompressing redundant quantum information encoded in quantum computers; processing quantum information in the compressed space; and computing, in response to determining the ansatz terms, a set of optimal transformations.

Claims

1. A method of performing a dynamics simulation of a Fermionic system, using a quantum information processing system comprising a plurality of trapped ions, each trapped ion defining a qubit, the method comprising: computing, by a processor, quantum circuits that implement one-body Trotter terms and two-body Trotter terms of a time evolution operator of a Fermionic system to be simulated, on a plurality of qubits; compressing, by the processor, a quantum circuit that implements a two-body Trotter term on a first qubit, a second qubit, a third qubit, and a fourth qubit in a selected state, wherein in the selected state, the first and second qubits are in the same qubit state, and the third and fourth qubits are in the same qubit state; implementing, by an optical controller, the compressed quantum circuits on the plurality of qubits; measuring, by an imaging system, a qubit state of each of the plurality of qubits at a first time; and outputting, by the processor, an indication of the measured qubit states of the plurality of qubits at the first time, the indication illustrating a time evolution of the Fermionic system at the first time.

2. The method of claim 1, wherein a quantum circuit that implements a one-body Trotter term on a pair of qubits of the plurality of qubits comprises a singly-controlled X gate and a controlled-NOT gate on the pair of qubits of the plurality of qubits.

3. The method of claim 1, wherein a quantum circuit that implements a two-body Trotter term on the first, second, third, and fourth qubits comprises a triply-controlled-X and controlled-NOT gates on the first, second, third, and fourth qubits.

4. The method of claim 3, wherein the compressed quantum circuit that implements a two-body term on the first, second, third, and fourth qubits in the selected state comprises a quantum circuit that implements a one-body Trotter term on the first and third qubits, a controlled-NOT gate on the first and second qubits, and a controlled-NOT gate on the second and fourth qubits.

5. The method of claim 1, further comprising: computing, by the processor, quantum circuits that implement hybrid Trotter terms between one-body Trotter terms and two-body Trotter terms, each quantum circuit comprising a doubly-controlled X gate.

6. A method of performing an estimation of a ground state energy of a Fermionic system using a quantum information processing system comprising a plurality of trapped ions, each trapped ion defining a qubit, the method comprising: preparing, by an optical controller, a plurality of qubits in a first ansatz state; computing, by a processor, quantum circuits that implement one-body Trotter terms and two-body Trotter terms of a parametrized unitary ansatz evolution operator of a Fermionic system, on the plurality of qubits; compressing, by the processor, a quantum circuit that implements a two-body Trotter term on a first qubit, a second qubit, a third qubit, and a fourth qubit in a selected state, wherein in the selected state, the first and second qubits are in the same qubit state, and the third and fourth qubits are in the same qubit state; implementing, by the optical controller, the compressed quantum circuits on the plurality of qubits; measuring, by an imaging system, a qubit state of each of the plurality of qubits; and outputting, by the processor, an indication of the measured qubit states of the plurality of qubits, the indication illustrating a first energy of the Fermionic system.

7. The method of claim 6, further comprising: modifying, by the processor, the parametrized unitary ansatz evolution operator; and repeating the preparing of the plurality of qubits, the computing of the quantum circuits, the compressing of the quantum circuit, the measuring of the qubit states of the plurality of qubits, and the outputting of an indication of the measured qubit states of the plurality of qubits, the indication illustrating a second energy of the Fermionic system, wherein the second energy is less than the first energy.

8. The method of claim 6, wherein a quantum circuit that implements a one-body Trotter term on a pair of qubits of the plurality of qubits comprises a singly-controlled X gate and a controlled-NOT gate on the pair of qubits of the plurality of qubits.

9. The method of claim 6, wherein a quantum circuit that implements a two-body Trotter term on the first, second, third, and fourth qubits comprises 13 controlled-NOT gates on the first, second, third, and fourth qubits.

10. The method of claim 9, wherein the compressed quantum circuit that implements a two-body term on the first, second, third, and fourth qubits in the selected state comprises a quantum circuit that implements a one-body Trotter term on the first and third qubits, a controlled-NOT gate on the first and second qubits, and a controlled-NOT gate on the second and fourth qubits.

11. The method of claim 6, further comprising: computing, by the processor, quantum circuits that implement hybrid Trotter terms between one-body Trotter terms and two-body Trotter terms, each quantum circuit comprising 30 controlled-NOT gates; and compressing, by the processor, a quantum circuit that implements a hybrid Trotter.

12. A non-transitory computer readable medium having instructions stored therein that, when executed by a processor, cause the processor to: compute, by a processor, quantum circuits that implement one-body Trotter terms and two-body Trotter terms of an evolution operator of a Fermionic system, on a plurality of qubits, each qubit comprising a trapped ion; compress, by the processor, a quantum circuit that implements a two-body Trotter term on a first qubit, a second qubit, a third qubit, and a fourth qubit in a selected state, wherein in the selected state, the first and second qubits are in the same qubit state, and the third and fourth qubits are in the same qubit state; implement, by an optical controller, the compressed quantum circuits on the plurality of qubits; measure, by an imaging system, a qubit state of each the plurality of qubits; and output, by the processor, an indication of the measured qubit states of the plurality of qubits.

13. The non-transitory computer readable medium of claim 12, wherein the evolution operator of the Fermionic system is a time evolution operator of the Fermionic system, and the indication of the measured qubit states of the plurality of qubits is a time evolution of the Fermionic system.

14. The non-transitory computer readable medium of claim 12, wherein the evolution operator of the Fermionic system is a parametrized unitary ansatz evolution operator of the Fermionic system, and the indication of the measured qubit states of the plurality of qubits is a first energy of the Fermionic system.

15. The non-transitory computer readable medium of claim 14, further comprising instructions for preparing, by the optical controller, the plurality of qubits in a first ansatz state.

16. The non-transitory computer readable medium of claim 15, further comprising instructions for modifying, by the processor, the parametrized unitary ansatz evolution operator; and repeating the preparing of the plurality of qubits, the computing of the quantum circuits, the compressing of the quantum circuit, the measuring of the qubit states of the plurality of qubits, and the outputting of an indication of the measured qubit states of the plurality of qubits, the indication illustrating a second energy of the Fermionic system, wherein the second energy is less than the first energy.

17. The non-transitory computer readable medium of claim 12, wherein a quantum circuit that implements a one-body Trotter term on a pair of qubits of the plurality of qubits comprises a singly-controlled X gate and a controlled-NOT gate on the pair of qubits of the plurality of qubits.

18. The non-transitory computer readable medium of claim 12, wherein a quantum circuit that implements a two-body Trotter term on the first, second, third, and fourth qubits comprises controlled-NOT gates on the first, second, third, and fourth qubits.

19. The non-transitory computer readable medium of claim 18, wherein the compressed quantum circuit that implements a two-body term on the first, second, third, and fourth qubits in the selected state comprises a quantum circuit that implements a one-body Trotter term on the first and third qubits, a controlled-NOT gate on the first and second qubits, and a controlled-NOT gate on the second and fourth qubits.

20. The non-transitory computer readable medium of claim 15, further comprising instructions for computing, by the processor, quantum circuits that implement hybrid Trotter terms between one-body Trotter terms and two-body Trotter terms.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 is a diagram illustrating an example of a hybrid two-body interaction circuit according to some aspects of the present disclosure.

[0016] FIG. 2 is a diagram illustrating an example of a doubly-controlled R.sub.x(θ) gate implementation with relative-phase doubly-controlled not gates.

[0017] FIG. 3 illustrates examples of quantum circuits and optimized constructions according to some aspects of the present disclosure.

[0018] FIG. 4 is a diagram illustrating an example of a doubly-controlled R.sub.x(θ) gate implementation with relative-phase doubly-controlled not gates and an ancilla qubit.

[0019] FIG. 5 is a diagram illustrating an example circuit of a pair of hybrid two-body interactions according to some aspects of the present disclosure.

[0020] FIG. 6 is a diagram illustrating an example circuit of multiple two-body interactions according to some aspects of the present disclosure.

[0021] FIG. 7 is a block diagram that illustrates an example of a quantum information processing (QIP) system according to some aspects of the present disclosure.

[0022] FIG. 8 is a diagram that illustrates an example of a computer device according to some aspects of the present disclosure.

[0023] FIG. 9 depicts a flowchart illustrating a method of performing a Hamiltonian dynamics simulation of a Fermionic system on a quantum information processing system.

[0024] FIG. 10 depicts a flowchart illustrating a method of performing an estimation of a ground state energy of a Fermionic system on a quantum information processing system.

DETAILED DESCRIPTION

[0025] The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well known components are shown in block diagram form in order to avoid obscuring such concepts.

[0026] In the embodiments described herein, methods and systems for quantum simulation of a Fermionic system on a quantum computer, using two approaches: a Hamiltonian dynamics simulation, and a variational ground state energy estimation. The Hamiltonian dynamics simulation is suitable for a fault-tolerant (FT) quantum computer, and based on quantum simulation algorithms, using the product-formula (PF) algorithm and multiple generalized transformation of Fermionic operators to qubit operators. The variational ground state energy estimation is suitable for an imperfect, pre-fault tolerant (pre-FT) quantum computer, and based on variational quantum-classical hybrid approach, such as the variational quantum eigensolver (VQE) using a unitary coupled cluster (UCC) ansatz.

[0027] In some implementations, results of the Hamiltonian dynamics simulation may be utilized in chemical, pharmaceutical, physical, and other applications. The simulation may be real-time. In some implementations, results of the variational ground state estimation may be utilized to compute the ground states of particles. The ground states of the particles may be used for determining chemical reactions, bonding properties, energetic states.

[0028] In both approaches, quantum circuits that implement the quantum simulation are optimized. The cost functions considered for optimization include me number or

[00002]$T:=\left(\begin{array}{cc}1& 0\\ 0& e^{i\pi /4}\end{array}\right)$

gates, and the number of qubits when the PF algorithm is used, in the Hamiltonian dynamics simulation, and the number of two-qubit gates and the number of qubits in the variational ground state energy estimation.

I. Quantum Information Processing (QIP) Systems

[0029] As described above, trapped ions may be used to implement qubits used in quantum information processing (QIP) systems. A typical ion trap geometry or structure used for quantum information and metrology purposes is the linear radio frequency (RF) Paul trap (also referred to as an RF trap or simply a Paul trap), where nearby electrodes hold static and dynamic electrical potentials that lead to a confinement of the ions. Qubits based on trapped ions may be used as different types of devices, including but not limited to quantum memories, quantum gates in quantum computers and simulators, and nodes for quantum communication networks.

[0030] As used in this disclosure, the terms “atoms” and “neutral atoms” may be interchangeable, while the terms “ions” and “atomic ions” may be interchangeable. Moreover, the terms “atomic ions,” “ions,” “atoms,” and “neutral atoms” may describe the particles that are generated from a source material and that are to be confined or trapped, or are actually confined or trapped, in a trap to form a crystal, lattice, or similar arrangement or configuration. The term “plasma” may describe a flux of neutral atoms, ions, or both.

II. Simulation of Fermionic System

[0031] In the described herein, two methods of quantum simulation of a Fermionic system on a quantum computer are provided: a Hamiltonian dynamics simulation, suitable for a fault-tolerant (FT) quantum computer, and a ground state energy estimation, suitable for an imperfect, pre-fault tolerant (pre-FT) quantum computer.

II. A Fermionic System

[0032] In one implementation, a Fermionic system evolves according to a time-independent, local, second-quantized Hamiltonian H in the occupation basis

H=Σ.sub.p,qh.sub.pqα.sub.p.sup.†α.sub.q+Σ.sub.p,q,r,sh.sub.pqrsα.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s,  (1)

where α.sub.p.sup.† and α.sub.s denote the Fermionic creation and annihilation operators on the p-th and q-th levels, respectively, and h.sub.pq and h.sub.pqrs denote single- and double-Fermion Hamiltonian coefficients, respectively. The Fermionic operators follow the canonical anti-commutation relations

{a.sub.j,a.sub.k}=0,{α.sub.j.sup.†,α.sub.k.sup.†}=0,{α.sub.j,α.sub.k.sup.†}=δ.sub.j,k1,  (2)

where {A,B} denotes the anticommutator {AB+BA}, δ.sub.jk is a Kronecker delta, and 1 is an identity operator. For the implementations on a quantum computer, the Fermionic operators may be transformed using the Jordan-Wigner (JW) transformation, defined for a n-qubit system according to

a.sub.j.sup.†=1.sup..Math.n-j-1.Math.σ.sub.+σ.sub.z.sup..Math.j,α.sub.j=1.sup..Math.n-j-1.Math.σ.sub.−.Math.σ.sub.z.sup..Math.j  (3)

where j∈[0,n−1], .Math. denotes the tensor product,

[00003]${\sigma }_{+}:=\left(\begin{array}{cc}0& 0\\ 1& 0\end{array}\right),{\sigma }_{-}:=\left(\begin{array}{cc}0& 1\\ 0& 0\end{array}\right),\mathrm{and}{\sigma }_z:=\left(\begin{array}{cc}1& 0\\ 0& -1\end{array}\right).$

[0033] In some instances, the transformation of the Fermionic operations to qubit operators may use other transformation, such as Jordan-Wigner (JW) or Bravyi-Kitaev (BK), or any other transformations known in the art. Depending on the transformation, quantum resource requirements, such as the number of two-qubit gates and/or the number of qubits required for implementing quantum simulation, may be reduced.

II. B Hamiltonian Dynamics Simulation of Fermionic System

[0034] In the Hamiltonian dynamics simulation, the evolution operator U.sub.evo=e.sup.iHt, by which the Fermionic system evolves forward in time for time, is implemented on a quantum computer, where H is the system Hamiltonian.

[0035] Implementation of the evolution operator U.sub.evo may use the technique of the 2k-th order product formula (PF), which may result in a more efficient quantum circuit in practice. After the JW transformation has been performed on the Hamiltonian H in equation (1), the time evolution operator U.sub.evo=e.sup.iHt may be written as

exp[−i(Σ.sub.j=1.sup.Lθ.sub.j{circumflex over (σ)}.sup.(j))]≈[S.sub.2k(λ)].sup.r,  (4)

where λ: =1/r, {circumflex over (σ)}.sup.(j)=.Math..sub.i{tilde over (σ)}.sup.(i,j)+h.c., where {tilde over (σ)}{σ.sub.+,σ.sub.−,σ.sub.z} and h.c. denotes the Hermitian conjugate operator, and

[00004]$\begin{array}{cc}{S}_1\left(\lambda \right):=\underset{j=1}{\overset{L}{.Math.}}\exp \left(-i{\theta }_j{\hat{\sigma }}^{\left(j\right)}\lambda \right),& \left(5\right)\end{array}$$S_2\left(\lambda \right):=\underset{j=1}{\overset{L}{.Math.}}\exp \left(-i{\theta }_j{\hat{\sigma }}^{\left(j\right)}\lambda /2\right)\underset{j=L}{\overset{1}{.Math.}}\exp \left(-i{\theta }_j{\hat{\sigma }}^{\left(j\right)}\lambda /2\right),$$S_{2k}\left(\lambda \right):={\left[S_{2k-2}\left(p_k\lambda \right)\right]}^2{S_{2k-2}\left(\left(1-4p_k\right)\lambda \right)\left[S_{2k-2}\left(p_k\lambda \right)\right]}^2,$

with p.sub.k: =1/(4−4.sup.1/(2k-1)) for k>1. The individual exponential terms, hereafter referred to as a Trotter term, are of the form exp [−iθ′.sub.i(.Math..sub.i+h.c.)], where θ′.sub.j is a suitably scaled θ.sub.j.

Optimized Circuits for Trotter Term Implementation in FT Quantum Computer

[0036] As shown above, in the Hamiltonian dynamics simulation, quantum circuits that implement Trotter terms of the time evolution operator U.sub.evo=e.sup.iHt on a quantum computer are compiled (e.g., the Trotter terms are converted into quantum circuits), and then optimized. Quantum circuits are optimized such that the number of

[00005]$T:=\left(\begin{array}{cc}1& 0\\ 0& e^{i\pi /4}\end{array}\right)$

gates and the number of qubits required for the implementation of the Trotter terms are minimized.

[0037] An optimized circuit that implements a two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] can be synthesized by the method described in detail in the U.S. application Ser. No. 17/177,813 (entitled “Methods and apparatuses for resource-optimized Fermionic local simulation on quantum computer for quantum chemistry”) which is incorporated by reference herein. An optimized circuit that implements the two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] can be synthesized by a triply-controlled R.sub.x(θ′): =exp (−iθ′σ.sub.x/2) gate (also referred to as a “triply-controlled-X gate”), where σ.sub.x=σ.sub.++σ.sub.−, conjugated by an appropriate network of controlled-NOT gates, where

[00006]$\mathrm{NOT}:=\left(\begin{array}{cc}0& 1\\ 1& 0\end{array}\right).$

In certain instances, the two-body Trotter term exp [−iθσ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] implements an operation on the input state c.sub.00,00|0000+c.sub.00,11|0011+c.sub.11,00|1100+c.sub.11,11|1111. Redundant information encoded between a first set of two qubits and a second set of two qubits can be leveraged to enable circuit optimization. For instance, a one-body Trotter term exp [−iθ(σ.sub.+σ.sub.−+h.c.)] can be used on a first qubit of the first set and a first qubit of the second set to implement the two-body Trotter term, up to a conjugation by controlled-NOT gates, conditioned on the first qubit of the first set and the first qubit of the second set, targeted on a second qubit of the first set and a second qubit of the second set, that compresses and uncompresses the redundant information. One with the ordinary skill in the art would readily know that the choice of a first qubit and a second qubit in the first and the second sets can be arbitrary.

[0038] An optimized circuit that implements the one-body Trotter term exp [−iθ(σ.sub.+σ.sub.−+h.c.)] can be synthesized by the method described in detail in the U.S. application Ser. No. 17/177,813 (entitled “Methods and apparatuses for resource-optimized Fermionic local simulation on quantum computer for quantum chemistry”) which is incorporated by reference herein. An optimized circuit that implements the one-body Trotter term exp [−iθ(σ.sub.+σ.sub.−+h.c.)] can be synthesized by a singly-controlled R.sub.x(θ′) gate (also referred to as a “singly-controlled X gate”), conjugated by an appropriate network of controlled-NOT gates.

[0039] In certain instances, the two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] implements an operation on the input state c.sub.00,00|0000+c.sub.00,11|0011+c.sub.01,00|0100+c.sub.01,11|0111+c.sub.10,00|1000+c.sub.10,11|1011+c.sub.11,00|11001100+c.sub.11,11|1111. Redundant information encoded in a second set of two qubits can be leveraged to enable circuit optimization. For instance, a hybrid Trotter term between one- and two-body Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−+h.c.)] can be used on a first set of two qubits and a first qubit of a second set, up to a conjugation by a controlled-NOT gate, conditioned on the first qubit of the second set, targeted on a second qubit of the second set, that compresses and uncompresses the redundant information. One with the ordinary skill in the art would readily know that the choice of a first qubit and a second qubit in the second set can be arbitrary.

[0040] An optimized circuit that implements the hybrid Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−+h.c.)] can be synthesized by a doubly-controlled R.sub.x(θ′) gate (also referred to as a “doubly-controlled X gate”), conjugated by an appropriate network of controlled-NOT gates, as shown in FIG. 1.

[0041] A doubly-controlled R.sub.x gate in FIG. 1 can be implemented using single- and/or two-qubit gates. For example, the doubly-controlled R.sub.x gate may be implemented with Hadamard

[00007]$H:=\frac{1}{\sqrt{2}}\left(\begin{array}{cc}1& 1\\ 1& -1\end{array}\right)$

gates,

[00008]$R_z:=\left(\begin{array}{cc}{e}^{-i\frac{\theta }{2}}& 0\\ 0& e^{i\frac{\theta }{2}}\end{array}\right)$

gates, and/or doubly-controlled NOT gates. In one implementation, the doubly-controlled NOT gates may be relative phase doubly-controlled NOT gates, as shown in FIG. 2.

[0042] A relative phase doubly-controlled NOT gate can be implemented using single- and/or two-qubit gates. For example, the doubly-controlled NOT gate may be implemented with Hadamard H gate, T gates, and singly-controlled NOT gates, as shown in FIG. 3.

[0043] In some aspects of the present disclosure, the Trotter term above may be implemented using |0-state initialized ancilla qubit as shown in FIG. 4. A circuit shown in FIG. 4 may require R.sub.z depth of one per two-body Trotter term. A circuit shown in FIG. 1, implemented using a doubly-controlled R.sub.x gate as shown in FIG. 2 or FIG. 4 with relative phase doubly-controlled NOT gates as shown in FIG. 3 decreases the T gate count per two-body Trotter term from 16 to eight.

II. C Variational Ground-State Energy Estimation

[0044] In the variational ground state energy estimation, the ground state energy of the system whose Hamiltonian H is given by equation (1) may be calculated, for example, by the variational quantum eigensolver (VQE), where an ansatz state is created on a quantum computer to evaluate the energy of the ansatz state. In the VQE approach, by iteratively calling the quantum computer to compute the energies of the parametrized ansatz states, the energy may be minimized (locally or globally) to obtain the ground state of the target system.

[0045] In the variational ground state energy estimation, a certain type of ansatz states Ψ.sub.ansatz may be generated from an initial state Ψ.sub.0 using a parametrized unitary ansatz evolution operator Ψ.sub.ansatz, as Ψ.sub.ansatz=U.sub.ansatzΨ.sub.0. The parametrized unitary ansatz evolution operator U.sub.ansatz may be in an exponential form e.sup.Z-Z.sup.†, where Z is parametrized. By varying the parameters in Z, the ansatz state energy Ψ.sub.ansatz|H|Ψ.sub.ansatz=Ψ.sub.0|U.sup.†HU|Ψ.sub.0 may be variationally minimized.

[0046] In some implementations, the initial state may be a ground state Hartree-Fock (HF) wavefunction |Ψ.sub.0 that may be calculated on a classical computer and implemented on a quantum computer. Subsequently, the wavefunction |Ψ.sub.0 may be evolved with a parametrized unitary ansatz evolution operator U.sub.ansatz. In one example, the unitary ansatz evolution operator U.sub.ansatz may be e.sup.Z.sup.UCCSD-A.sup.UCCSD.sup.†, using the unitary coupled cluster singles and doubles (UCCSD) ansatz, where Z.sub.UCCSD=Σ.sub.l=1.sup.2Z.sub.l and Z.sub.l may be the l-body excitation operators. The one- and two-body excitation operators Z.sub.1 and Z.sub.2 may be written in second-quantized form as

Z.sub.1=Σ.sub.p∈vitr,r∈occt.sub.prα.sub.p.sup.†a.sub.n,

Z.sub.2=Σ.sub.p∈virt,r∈occt.sub.pqrsα.sub.p.sup.†a.sub.q.sup.†α.sub.rα.sub.s,  (6)

where t.sub.pr and t.sub.pqrs are variational parameters and “virt” and “occ” denote virtual and occupied levels, respectively. The one- and two-body excitation operators Z.sub.1 and Z.sub.2 may be transformed using the JW transformation to qubit operators, and may be written as a sum of one- and two-body Trotter terms. To minimize the size of the circuit that implements the parametrized unitary ansatz evolution operator U.sub.ansatz, only a subset of all the parameters t.sub.pq and t.sub.pqrs may be considered. In certain implementations, a first-order PF algorithm may be used to implement the ansatz.

Optimized Circuits for Trotter Term Implementation in Pre-FT Quantum Computer

[0047] As shown above, in the variational ground state estimation, implementation requires circuits that implement Trotter terms of the parametrized unitary ansatz evolution operator U.sub.ansatz on a quantum computer. Circuits are optimized such that the number of qubits required for the implementation of the Trotter terms are minimized.

[0048] A standard circuit that implements a two-body Trotter term in U.sub.ansatz using the JW transformation may be well known in the art. An optimized implementation of a two-body Trotter term exp [iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] for the pre-FT regime can be synthesized by the method described in detail in the U.S. Ser. No. 11/010,517 (entitled “Methods and apparatuses for two-qubit gate reduction in quantum circuits”) which is incorporated by reference herein. An optimized circuit that implements the two-body Trotter term exp [iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] can be synthesized with 13 controlled-NOT gates.

[0049] In certain instances, the two-body Trotter term exp [iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] implements an operation on the input state c.sub.00,00|0000+c.sub.00,11|0011+c.sub.11,00|1100+c.sub.11,11|1111. Redundant information encoded between a first set of two qubits and a second set of two qubits can be leveraged to enable circuit optimization. For instance, a one-body Trotter term exp [iθ(σ.sub.+σ.sub.−−h.c.)] can be used on a first qubit of the first set and a first qubit of the second set to implement the two-body Trotter term, up to a conjugation by controlled-NOT gates, conditioned on the first qubit of the first set and the first qubit of the second set, targeted on a second qubit of the first set and a second qubit of the second set, that compresses and uncompresses the redundant information. One with the ordinary skill in the art would readily know that the choice of a first qubit and a second qubit in the first and the second sets can be arbitrary.

[0050] An optimized circuit that implements the one-body Trotter term exp [iθ(σ.sub.+σ.sub.−−h.c.)] can be synthesized by the method described in detail in the U.S. Ser. No. 11/010,517 (entitled “Methods and apparatuses for two-qubit gate reduction in quantum circuits”) which is incorporated by reference herein. An optimized circuit that implements the one-body Trotter term exp [iθ(σ.sub.+σ.sub.−−h.c.)] can be synthesized by two XX(θ′): =exp (−iθ′σ.sub.xσ/2) gates and single-qubit gates.

[0051] In certain instances, the two-body Trotter term exp [iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] implements an operation on the input state c.sub.00,00|0000+c.sub.00,11|0011+c.sub.01,00|0100+c.sub.01,11|0111+c.sub.10,00|1000+c.sub.10,11|1011+c.sub.11,00|1100+c.sub.11,11|1111. Redundant information encoded in a second set of two qubits can be leveraged to enable circuit optimization. For instance, a hybrid Trotter term between one- and two-body terms exp [iθ(σ.sub.+σ.sub.+σ.sub.−−h.c.)] can be used on a first set of two qubits and a first qubit of a second set, up to a conjugation by a controlled-NOT gate, conditioned on that first qubit of the second set, targeted on a second qubit of the second set, that compresses and uncompresses the redundant information. One with the ordinary skill in the art would readily know that the choice of a first qubit and a second qubit in the second set can be arbitrary.

[0052] In some instances, hybrid Trotter terms may be implemented in a pair. In one example, a six-qubit circuit may be considered, where the two terms in a pair to be considered are of the form exp [iθ(α.sub.4.sup.†α.sub.5.sup.†α.sub.0α.sub.3−h.c.)] and exp [iθ(α.sub.4.sup.†α.sub.5.sup.†α.sub.1α.sub.2−h.c.)], prior to the JW transformation, and the input state considered is of the form

[00009]$$\begin{gathered} c_{00,0000}.Math.000000.Math.+c_{00,00001}.Math.000001.Math.+c_{00,0010}.Math.000010.Math.+c_{00,0011}.Math.000011.Math.+ \\ {c}_{00,0100}.Math.000100.Math.+c_{00,0101}.Math.000101.Math.+c_{00,0111}.Math.000111.Math.+c_{00,1001}.Math.001001.Math.+ \\ {c}_{001010},.Math.001010.Math.+c_{00,1011}.Math.001011.Math.+c_{00,1100}.Math.001100.Math.+c_{00,1101}.Math.001101.Math.+c_{00,1111}.Math.001111.Math. \end{gathered}$$$c_{11,0000}.Math.110000.Math.+c_{11,0001}.Math.110001.Math.+c_{11,0010}.Math.110010.Math.+c_{11,0011}.Math.110011.Math.+c_{11,0100}.Math.110100.Math.$$c_{11,0101}.Math.110101.Math.+c_{11,0111}.Math.110111.Math.+c_{11,1000}.Math.111000.Math.+c_{11,1001}.Math.111001.Math.+c_{11,1010}.Math.111010.Math.$$c_{11,1011}.Math.111011.Math.+c_{11,1100}.Math.111100.Math.+c_{11,1101}.Math.111101.Math.+c_{11,1111}.Math.11.Math..$

[0053] An optimized circuit that implements a pair of hybrid Trotter terms for the example described above, as shown in FIG. 5, can be synthesized using 16 controlled-NOT gates, reducing from 30 controlled-NOT gates for a standard construction.

[0054] An optimized circuit that implements U.sub.ansatz using a single transformation can be synthesized by the method described in detail in the U.S. Ser. No. 11/010,517 (entitled “Methods and apparatuses for two-qubit gate reduction in quantum circuits”) which is incorporated by reference herein. In some aspects of the present disclosure, multiple transformations are considered for U.sub.ansatz, carefully chosen to optimize quantum circuits. Details of the multiple transformation, hereafter referred to as β, enabled circuit optimization are discussed below.

[0055] In one example, an upper-triangular basis-transformation matrix may be considered for β:

[00010]$\begin{array}{cc}\beta =\left[\begin{array}{cccc}{\beta }_{n-1,n-1}& {\beta }_{n-1,n-2}& .Math.& {\beta }_{n-1,0}\\ 0& {\beta }_{n-2,n-2}& .Math.& {\beta }_{n-2,0}\\ .Math.& .Math.& & .Math.\\ 0& 0& .Math.& {\beta }_{\mathrm{\beta 0},0}\end{array}\right]& \left(7\right)\end{array}$

[0056] where β.sub.i,j ∈{0,1} for i>j, β.sub.i,jβ.sub.i,j=1, and n is the number of qubits involved in the transformation. The following sets of indices can then be defined, where all matrix operations are performed in modulo-2 space and the main diagonal elements are excluded when generating these sets: [0057] Update set (j): elements of this set are the row indices with non-zero entries in column j of the basis-transformation matrix β. [0058] Parity set P(j): elements of this set are the column indices with non-zero entries in row j of the matrix πβ.sup.−1−β.sup.−1, where π.sub.i,j=1 if i≤j, otherwise 0. [0059] Remainder set RU): elements of this set are the column indices with non-zero entries in row j of the matrix πβ.sup.−1.

[0060] The β-based creation and annihilation operators are

α.sub.j.sup.†=[σ.sub.x.sup.U(J).Math.σ.sub.x.sup.j.Math.σ.sub.z.sup.P(j)−iσ.sub.x.sup.U(j).Math.σ.sub.y.sup.j.Math.σ.sub.z.sup.R(j)]/2,

α.sub.j=[σ.sub.x.sup.U(j).Math.σ.sub.x.sup.j.Math.σ.sub.z.sup.P(j)+iσ.sub.x.sup.U(j).Math.σ.sub.y.sup.j.Math.σ.sub.z.sup.R(j)]/2,  (8)

[0061] It should be noted that any choice of β is allowed for each Trotter term implementation. Following the heuristic methods discussed in detail in the U.S. Ser. No. 11/010,517 (entitled “Methods and apparatuses for two-qubit gate reduction in quantum circuits”) an optimal choice of β for individual Trotter terms may be found to reduce the number of multi-qubit gates. It should be further noted that a transition from one β to the next incurs non-zero multi-qubit gates. Thus, there is a competition between the optimization achieved by the use of individualized β for different Trotter terms and the overhead incurred by the transition between different β. One with ordinary skills in the art would readily know that optimization over the competition can be achieved using standard optimizers known in the art.

[0062] A non-limiting example that uses multiple β is schematically shown in FIG. 6. U.sub.ansatz considered is a sequence of U(α.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s): =exp [it.sub.pqrs(α.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s−h.c.)]. Each (α.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s) can be implemented different β matrices. In this example the first three (α.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s) operators are implemented with β=1 and the latter two are implemented with β≠1.

[0063] Further, in FIG. 6, three different classes of (α.sub.p.sup.†α.sub.q.sup.†α.sub.rα.sub.s) implementations are shown. The first is implemented in the one-body regime. The subsequent two are implemented in the hybrid regime between one- and two-body regimes. The last two are implemented in the two-body regime. Controlled-NOT gates that appear in FIG. 6 correspond to the un-compression step discussed above. The compression counterpart step is not shown since the current example admits an optimization over the compression step by the use of a classical computer, using readily known optimization steps to those with ordinary skills in the art.

III. QIP SYSTEM

[0064] FIG. 7 is a block diagram that illustrates an example of a QIP system 700 in accordance with aspects of this disclosure. The QIP system 700 may also be referred to as a quantum computing system, a computer device, a trapped ion system, or the like.

[0065] The QIP system 700 can include a source 760 that provides atomic species (e.g., a plume or flux of neutral atoms) to a chamber 750 having an ion trap 770 that traps the atomic species once ionized (e.g., photoionized). In one example, a power controller 740 may supply the electrical energy used by the source 760 to generate an atomic flux.

[0066] The imaging system 730 can include a high resolution imager (e.g., CCD camera) for monitoring the atomic ions and measuring a qubit state of each of the atomic ions, while they are being provided to the ion trap or after they have been provided to the ion trap 770. In an aspect, the imaging system 730 can be implemented separate from the optical controller 720. However, the use of fluorescence to detect, identify, and label atomic ions using image processing algorithms may need to be coordinated with the optical controller 720.

[0067] The QIP system 700 may also include an algorithms component 710 that may operate with other parts (not shown) of the QIP system 700 to perform quantum algorithms or quantum operations, including a stack or sequence of combinations of single qubit operations and/or multi-qubit operations (e.g., two-qubit operations) as well as extended quantum computations. As such, the algorithms component 710 may provide instructions to various components of the QIP system 700 (e.g., to the optical controller 720) to enable the implementation of the quantum algorithms or quantum operations.

IV. Computer Device

[0068] Referring now to FIG. 8, illustrated is an example computer device 800 in accordance with aspects of the disclosure. The computer device 800 may represent a computing device, multiple computing devices, or a distributed computing system, for example. The computer device 800 may be configured as a quantum computer (e.g., a quantum information processing (QIP) system), a classical computer, or a combination of quantum and classical computing functions. For example, the computer device 800 may be used to process information using quantum algorithms based on trapped ion technology and may therefore implement methods for performing, optimizing, compiling, and/or executing a quantum circuit as described above. A generic example of the computer device 800 as a QIP system that may implement the various techniques described herein is illustrated in an example shown in FIG. 7.

[0069] In one example, the computer device 800 may include a processor 810 for carrying out processing functions associated with one or more of the features described herein. The processor 810 may include a single or multiple set of processors or multi core processors. Moreover, the processor 810 may be implemented as an integrated processing system and/or a distributed processing system. The processor 810 may include a central processing unit (CPU), a quantum processing unit (CPU), a graphics processing unit (GPU), or combination of those types of processors. In one aspect, the processor 810 may refer to a general processor of the computer device 800, which may also include additional processors 810 to perform more specific functions such as functions for individual beam control.

[0070] In an example, the computer device 800 may include a memory 820 for storing instructions executable by the processor 810 for carrying out the functions described herein. In an implementation, for example, the memory 820 may correspond to a computer-readable storage medium that stores code or instructions to perform one or more of the functions or operations described herein. In one aspect of the present disclosure, the memory 820 may be a non-transitory computer-readable medium that stores code or instructions to perform one or more of the functions, techniques, and/or operations described herein. In one example, the memory 820 may include instructions to perform aspects of methods in accordance with the present disclosures. Just like the processor 810, the memory 820 may refer to a general memory of the computer device 800, which may also include additional memories 820 to store instructions and/or data for more specific functions such as instructions and/or data for individual beam control.

[0071] Further, the computer device 800 may include a communications component 830 that provides for establishing and maintaining communications with one or more parties utilizing hardware, software, and services as described herein. The communications component 830 may carry communications between components on the computer device 800, as well as between the computer device 800 and external devices, such as devices located across a communications network and/or devices serially or locally connected to computer device 800. For example, the communications component 830 may include one or more buses, and may further include transmit chain components and receive chain components associated with a transmitter and receiver, respectively, operable for interfacing with external devices.

[0072] Additionally, the computer device 800 may include a data store 840, which may be any suitable combination of hardware and/or software, that provides for mass storage of information, databases, and programs employed in connection with implementations described herein. For example, the data store 840 may be a data repository for operating system 860 (e.g., classical OS, or quantum OS). In one implementation, the data store 840 may include the memory 820.

[0073] The computer device 800 may also include a user interface component 850 operable to receive inputs from a user of the computer device 800 and further operable to generate outputs for presentation to the user or to provide to a different system (directly or indirectly). The user interface component 850 may include one or more input devices, including but not limited to a keyboard, a number pad, a mouse, a touch-sensitive display, a digitizer, a navigation key, a function key, a microphone, a voice recognition component, any other mechanism capable of receiving an input from a user, or any combination thereof. Further, the user interface component 850 may include one or more output devices, including but not limited to a display, a speaker, a haptic feedback mechanism, a printer, any other mechanism capable of presenting an output to a user, or any combination thereof.

[0074] In an implementation, the user interface component 850 may transmit and/or receive messages corresponding to the operation of the operating system 860. In addition, the processor 810 may execute the operating system 860 and/or applications or programs, and the memory 820 or the data store 840 may store them.

[0075] When the computer device 800 is implemented as part of a cloud-based infrastructure solution, the user interface component 850 may be used to allow a user of the cloud-based infrastructure solution to remotely interact with the computer device 800.

[0076] In some implementations, the computer device 800 may be implemented to perform classical computations, quantum computations, or both. The computer device 800 may be implemented as a classical computer, a quantum computer, or a hybrid classical-quantum computer.

[0077] In one aspect of the present disclosure, the techniques described above may be performed by a quantum computer, a classical computer, or a hybrid classical-quantum computer. For example, the techniques for simulating a quantum circuit, optimizing a quantum circuit, compiling a quantum circuit, and/or executing a quantum circuit may be implemented by the computer device 800.

[0078] In some aspects, the computer device 800 and/or one or more of the subcomponents of the computer device 800 may be configured to and/or define means for implementing the techniques described above.

V. Methods

[0079] In this section, two methods of quantum simulation of a Fermionic system on a quantum computer, the Hamiltonian dynamic simulation and the variational ground state energy estimation, are provided. The Hamiltonian dynamic simulation may be used on a fault-tolerant (FT) quantum computer, and the variational ground state energy estimation may be used on a pre-fault tolerant (pre-FT) quantum computer.

V. A Hamiltonian Dynamics Simulation of Fermionic System

[0080] FIG. 9 depicts a flowchart illustrating a method 900 of performing a Hamiltonian dynamics simulation of a Fermionic system on a quantum information processing system, such as the QIP system 700 shown in FIG. 7.

[0081] The method 900 begins with block 910, in which quantum circuits that implement one-body Trotter terms exp [−iθ(σ.sub.+σ.sub.−+h.c.)] and two-body Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] of a time evolution operator U.sub.evo=e.sup.iHt of a Fermionic system to be simulated, on a plurality of qubits are computed by a processor, such as the processor 810 shown in FIG. 8. Here, H is the system Hamiltonian. A quantum circuit that implements a one-body Trotter term exp [−iθ(σ.sub.+σ.sub.−+h.c.)] on a pair of qubits of the plurality of qubits comprises a singly-controlled X gate and a controlled-NOT gate on the pair of qubits of the plurality of qubits. A quantum circuit that implements a two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] on the first, second, third, and fourth qubits comprises a triply-controlled-X and controlled-NOT gates on the first, second, third, and fourth qubits.

[0082] Quantum circuits that implement hybrid Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] between one-body Trotter terms exp [−iθ(σ.sub.+σ.sub.−+h.c.)] and two-body Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] may also computed by the processor. Each quantum circuit that implements a hybrid Trotter term includes a doubly-controlled X gate.

[0083] In block 920, a quantum circuit that implements a two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] on a first qubit, a second qubit, a third qubit, and a fourth qubit in a selected state, wherein in the selected state, the first and second qubits are in the same qubit state, and the third and fourth qubits are in the same qubit state are compressed by the processor. The selected state may be an input state c.sub.00,00|0000c.sub.00,11|0011+c.sub.11,00|1100+c.sub.11,11|1111. The compressed quantum circuit that implements a two-body term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−+h.c.)] on the first, second, third, and fourth qubits in the selected state comprises a quantum circuit that implements a one-body Trotter term on the first and third qubits, a controlled-NOT gate on the first and second qubits, and a controlled-NOT gate on the second and fourth qubits.

[0084] In block 930, the computed quantum circuits on the plurality of qubits are implemented by an optical controller, such as the optical controller 720 shown in FIG. 7.

[0085] In block 940, a qubit state of the plurality of qubits is measured, by an imaging system at a time t, such as the imaging system 730 shown in FIG. 7.

[0086] In block 950, the measured states of the plurality of qubits, indicating a time evolution of the Fermionic system at the time t are outputted, by the processor.

V. B Variational Ground-State Energy Estimation of Fermionic System

[0087] FIG. 10 depicts a flowchart illustrating a method 1000 of performing an estimation of a ground state energy of a Fermionic system on a quantum information processing system, such as the QIP system 700 shown in FIG. 7.

[0088] The method 1000 begins with block 1010, in which a plurality of qubits are prepared in a first ansatz state, by an optical controller, such as the optical controller 720 shown in FIG. 7. In some embodiments, the first ansatz state is a ground state Hartree-Fock (HF) wavefunction |Ψ.sub.0.

[0089] In block 1020, quantum circuits that implement one-body Trotter terms exp [−iθ(σ.sub.+σ.sub.−−h.c.)] and two-body Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] of a parametrized unitary ansatz evolution operator U.sub.ansatz of a Fermionic system, on a plurality of qubits are computed by a processor, such as the processor 810 shown in FIG. 8. A one-body Trotter term exp [−iθ(σ.sub.+σ.sub.−−h.c.)] on a pair of qubits of the plurality of qubits comprises a singly-controlled X gate and a controlled-NOT gate on the pair of qubits of the plurality of qubits. A quantum circuit that implements a two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] on the first, second, third, and fourth qubits comprises 13 controlled-NOT gates on the first, second, third, and fourth qubits.

[0090] Quantum circuits that implement hybrid Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−−h.c.)] between one-body Trotter terms exp [−iθ(σ.sub.+σ.sub.−−h.c.)] and two-body Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] are also computed by the processor. Each quantum circuit that implements a hybrid Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−−h.c.)] includes 30 controlled-NOT gates.

[0091] In block 1030, a quantum circuit that implements a two-body Trotter term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.− h.c.)] on a first qubit, a second qubit, a third qubit, and a fourth qubit in a selected state, wherein in the selected state, the first and second qubits are in the same qubit state, and the third and fourth qubits are in the same qubit state are compressed, by the processor. The selected state may be an input state c.sub.00,00|0000+c.sub.00,11|0011+c.sub.11,00|1100+c.sub.11,11|1111. The compressed quantum circuit that implements a two-body term exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] on the first, second, third, and fourth qubits in the selected state comprises a quantum circuit that implements a one-body Trotter term on the first and third qubits, a controlled-NOT gate on the first and second qubits, and a controlled-NOT gate on the second and fourth qubits. A compressed quantum circuit that implements a hybrid Trotter terms exp [−iθ(σ.sub.+σ.sub.+σ.sub.−σ.sub.−−h.c.)] includes 16 controlled-NOT gates.

[0092] In block 1040, the computed quantum circuits on the plurality of qubits are implemented by the optical controller.

[0093] In block 1050, a qubit state of each of the plurality of qubits is measured by an imaging system, such as the imaging system 730 shown in FIG. 7.

[0094] In block 1060, the measured qubit states of the plurality of qubits, indicating a first energy of the Fermionic system are outputted by the processor.

[0095] In the method 1000, blocks 1010-1050 are iteratively repeated to compute an energy of the Fermionic system based on the first ansatz state, such that the energy is minimized by varying parameters in the parametrized unitary ansatz evolution operator U.sub.ansatz

[0096] The previous description of the disclosure is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the common principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Furthermore, although elements of the described aspects may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated. Additionally, all or a portion of any aspect may be utilized with all or a portion of any other aspect, unless stated otherwise. Thus, the disclosure is not to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.